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Own An Open Source RISC-V Microcontroller (crowdsupply.com)

"Did you ever think it would be great if hardware was open to the transistor level, not just the chip level?" writes hamster_nz, pointing to a new Crowd Supply campaign for the OnChip Open-V microcontroller, "a completely free (as in freedom) and open source 32-bit microcontroller based on the RISC-V architecture." hamster_nz writes: With a completely open instruction-set architecture and no license fees for the CPU design, the RISC-V architecture is well positioned to take the crown as the 'go to' design for anybody needing a 32-bit in their silicon, and Open-V are crowd-sourcing their funding for an initial manufacturing run of 70,000 chips, offering options from a single chip to a seat in the design review process. This project is shaping up to be a milestone for the coming Open Source Silicon revolution, and they are literally offering a seat at the table. Even if you don't end up backing the project, it makes for very interesting reading.
Their crowdfunding page argues "If you love hacking on embedded controllers, breaking down closed-source barriers, having the freedom to learn how things work even down to the transistor level, or have dreamed of spinning your own silicon, then this campaign is for you."

101 comments

  1. EditorDavid by subk · · Score: 5, Insightful

    Thanks, EditorDavid, for the welcomed break in leftist propaganda posts that don't matter to nerds.

    --
    Now, if you'll excuse me, I have backups to corrupt.
    1. Re:EditorDavid by unixisc · · Score: 2

      What exactly happened here? Suddenly, we have stopped discussing the latest adventures of Trump, Clinton, fake news, Jill Stein and are suddenly discussing things like microcontroller HDLs? I thought that those things were germane to this site 4 years ago, if not more

    2. Re:EditorDavid by Tough+Love · · Score: 1

      Sad for you if you don't understand that politics affects technology.

      --
      When all you have is a hammer, every problem starts to look like a thumb.
    3. Re:EditorDavid by Anonymous Coward · · Score: 0

      the "leftist propaganda" matters to most nerds actually.

    4. Re:EditorDavid by ooloorie · · Score: 0

      Like global warming?

      No, like the idea that the fact that global warming is occurring means that people must vote for corrupt politicians that want to waste trillions on ineffective and harmful policies.

    5. Re:EditorDavid by Anonymous Coward · · Score: 1

      Sad for you if you don't understand that politics affects technology.

      So does constipation, and Swifties clogging the pipes. We need more plunger stories like this.

    6. Re:EditorDavid by dbIII · · Score: 0

      Due to the those events you may have to learn Mandarin to read techie goodness.
      At least that's what those who are panicking are thinking hence all the articles. Who the fuck knows what Trump is going to try.

    7. Re:EditorDavid by K.+S.+Kyosuke · · Score: 1

      leftist propaganda posts

      On /.? As a European, let me say "hahaha".

      --
      Ezekiel 23:20
    8. Re: EditorDavid by Anonymous Coward · · Score: 0

      They might have to if they don't want all that good research to go to waste.

    9. Re:EditorDavid by Anonymous Coward · · Score: 0

      fuck off cum guzzler.

    10. Re:EditorDavid by Anonymous Coward · · Score: 0

      Someone's triggered. Maybe some baby should crawl back to their alt-right save space where only good wholesome far-right circlerjerking is allowed.

      You will never hear the end of it, ever. I suggest you get used to it.

      There is nothing you can do except to fucking leave.

      Don't let the door hit you on the way out.

    11. Re:EditorDavid by arglebargle_xiv · · Score: 1
      It's still propaganda:

      the RISC-V architecture is well positioned to take the crown as the 'go to' design for anybody needing a 32-bit in their silicon

      In whose reality is that going to happen? You've got entire industry branches that exist around building and supporting long-established 32-bit architectures, anything you want from any vendor, and we're supposed to believe that a proof-of-concept run of a handful of CPUs with little to no widespread acceptance and support is now the way to go? I mean, good on them for doing it, it's a cool project, but lets be realistic about how its going to play out.

  2. FPGA by Anonymous Coward · · Score: 0

    If you want hardware open to the transistor level and not just the microcode level, just use an FPGA. Actually FPGA is gate level, not transistor level but still is a lot closer than microcode.

    1. Re:FPGA by ramorim · · Score: 1

      Still, we need more than what the Open Hardware movement can offer to us in FOSH (Free and Open Source Hardware) products. We also need to be able to DIY them, and therefore we need to have access to the right tools so we can create (or, as an option, order) the chips by ourselves ;) Also, we need a tool to (that is easy to) design the chips too, so we can build them later :D

      But, at a start, this action is a very good one...

    2. Re:FPGA by Bruce+Perens · · Score: 4, Interesting

      If you want hardware open to the transistor level and not just the microcode level, just use an FPGA

      I think you mean the bitstream. Gate-array designs, including the design of this chip, are generally coded at a higher level than a single transistor. One can then compile them to the transistor level as part of the preparation for using a fab to create a chip rather than a gate-array program.

      Actually, we would like an Open Hardware gate array. A big problem currently facing us is that the tool chain can't be entirely Open Source because gate-array manufacturers treat their bitstream format as trade-secret. So, we need an open bitstream.

    3. Re:FPGA by ShanghaiBill · · Score: 3, Informative

      If you want hardware open to the transistor level and not just the microcode level ...

      Like most RISC processors, RISC-V doesn't use microcode. Microcode is a CISC thing.

    4. Re:FPGA by Anonymous Coward · · Score: 0

      The Xilinx bitstreams at least are reverse engineerable.
      It's been done before, they just don't look too kindly on it.
      The hardest part is to reverse engineer the position of the different resources and the exact interconnect layout.
      There are already some open source synthesis tools, but I forget their names. They generally rely on vendor tools for bitstream generation though.

    5. Re:FPGA by jackckang · · Score: 3, Informative

      . We also need to be able to DIY them, and therefore we need to have access to the right tools so we can create (or, as an option, order) the chips by ourselves ;) Also, we need a tool to (that is easy to) design the chips too, so we can build them later :D

      But, at a start, this action is a very good one...

      SiFive is working on this exact problem--to let DIYs get access to real, packaged, custom silicon based on either your specification or with your RTL. Stay tuned for some announcements coming up at next weeks (11/29) RISC-V workshop.

    6. Re:FPGA by JoeMerchant · · Score: 1

      So, I was going to make a crack that it's a RISC instruction set, so there's not really that much to open, is there?

      How's the compiler support - got a decent gcc optimizer for it yet?

    7. Re:FPGA by radarskiy · · Score: 1

      -1, misinformative

      RISC-V is an ISA only. It does not oblige implementations to follow any particular microarchitecture.

      The religious wars between CISC and RISC were given up decades ago in favor of data-driven architectural decisions. If using sequenced uops solves the problem, they'll be used. For example, here the Cortex-A57 Software Optimization Guide explicitly refers to uops starting in section 2.1: http://infocenter.arm.com/help...

      In the future there won't be any CISC or RISC, just wankers.

    8. Re:FPGA by TheRaven64 · · Score: 1

      Most FPGAs are nothing like open at the gate level. You provide a proprietary toolchain with HDL and it generates... something. The encoding of that something is proprietary, how it maps to hardware resources is a trade secret (though the tools will tell you what proportion of each type of resources are used).

      --
      I am TheRaven on Soylent News
    9. Re:FPGA by TheRaven64 · · Score: 1

      The optimiser is largely irrelevant, as most optimisations are target independent these days. RISC-V support in GCC and LLVM is currently undergoing upstreaming, but it's a bit slow because the ABI has changed a couple of times. For a microcontroller it's probably fine: the privileged mode part of the spec is still not quite final, so I wouldn't recommend it yet for anything that you might want to run an OS on.

      --
      I am TheRaven on Soylent News
    10. Re:FPGA by TheRaven64 · · Score: 1

      In particular, in the RISC-V case, the exact way of handling unaligned accesses is likely to vary a lot between implementations. In a microcontroller-class implementation, I'd expect it to handle these in microcode. For something particularly area-constrained, you might also implement multiplication and division in microcode.

      --
      I am TheRaven on Soylent News
    11. Re:FPGA by ennesimamail.av · · Score: 1

      having an open "gate array" or FPGA with fully diclosed bistream would be really relevant. morover it could have a RISC-V hard core side by side.

      actually there's anyway a reverse engineering effort of the bitstream for the iCE40 Lattice smaller FPGA (up to 8K LUT), it's project icStorm

      http://www.clifford.at/icestor...

      together with arachne-pnr and yosys, you could put in place a fully open source pipeline to program those little rascals, from Verilog to bitstream.

      this cold be also the starting path toward a similar open source hardware design, suppose. if that's road is not encumbered by patents about this kind of "gate layout", of course.

    12. Re:FPGA by Bruce+Perens · · Score: 1

      if that road is not encumbered by patents about this kind of "gate layout", of course.

      That's the project's main complication other than the actual hardware design. We know lots of gate-array patents are expired, it's been long enough. But the particular features modern developers are used to - for example a particular flavor of LUT or matrix of gates, or a way of programming the device, might still be under patents. So we'd have to do a patent study to inform the design.

      It's still a great project to do and could get significant grants. If there are any EE's out there who are up to the task and want my help to evangelize and help get funding, it's yours.

  3. why? by Anonymous Coward · · Score: 0

    why bother with an actual chip? there are plenty of open source microcontrollers you can use today with any number of FPGAs.

    1. Re:why? by TechyImmigrant · · Score: 1

      why bother with an actual chip? there are plenty of open source microcontrollers you can use today with any number of FPGAs.

      Cost and performance usually.

      --
      I should use this sig to advertise my book ISBN-13 : 978-1501515132.
    2. Re:why? by JoeMerchant · · Score: 2

      Last time an FPGA design was getting me down, it was due to power consumption issues. We could get 4x the battery life with an ARM design as compared to the on-FPGA NEON processor cores we were using.

      FPGA was super flexible, but what we really needed was a couple of ARMs and a tiny bit of programmable silicon for the actual custom bits.

    3. Re:why? by Anonymous Coward · · Score: 0

      If you are in the position of creating a new design requiring a processor + programmable logic, consider an SoC FPGA. Both Xilinx and Altera offer them with hard ARM multicore processors and associated hard peripherals. I used the Altera Cyclone V SoC in a design and found it easy to work with. The uP and FPGA parts are well integrated. They are still FPGAs though so the power consumption might still be an issue for you.

    4. Re:why? by Shirley+Marquez · · Score: 1

      At the lower end, there are the Cypress PSoC 4 and PSoC 5LP chips. Those combine ARM cores with a small amount of programmable logic - not enough to constitute a full-blown FPGA but enough for many purposes. They are inexpensive, and all the digital I/O pins are not only 5V tolerant but 5V capable. (The processor core runs at 1.8V but the chips include level translation.)

  4. overpriced. by Gravis+Zero · · Score: 4, Insightful

    I love RISC-V, I really do but $50 for a chip in bad package is too much. Who can hand solder QFN chips?! $20 is really my limit for a chip of that caliber and it would need to at least be in a QFP package.

    The reason stated for the QFN package was to achieve clock higher frequencies (160MHz) but really, 50MHz is enough.

    --
    Anons need not reply. Questions end with a question mark.
    1. Re:overpriced. by TeknoHog · · Score: 1

      The reason stated for the QFN package was to achieve clock higher frequencies (160MHz) but really, 50MHz is enough.

      If you're into this stuff, you probably already have a suitable FPGA board that gets closer to 160 than 50 MHz.

      --
      Escher was the first MC and Giger invented the HR department.
    2. Re:overpriced. by ShanghaiBill · · Score: 4, Informative

      Who can hand solder QFN chips?!

      Get a tube of solder paste (good old PbSn, not RoHS) and a $29 toaster oven from Walmart for reflow.

      Pro-tip: Use a different toaster oven for grilled cheese sandwiches.

    3. Re:overpriced. by c · · Score: 1

      $50 for a chip in bad package is too much

      Eh?

      $50 for a first run chip, which they're billing as a collectable.

      Looking at the other tiers that have the dev board, the per-chip price ranges from $3 and $10. Which still seems a bit high (I think the STM32's are around $1 each), but it's nothing like $50.

      --
      Log in or piss off.
    4. Re:overpriced. by TechyImmigrant · · Score: 1

      I love RISC-V, I really do but $50 for a chip in bad package is too much. Who can hand solder QFN chips?! $20 is really my limit for a chip of that caliber and it would need to at least be in a QFP package.

      The reason stated for the QFN package was to achieve clock higher frequencies (160MHz) but really, 50MHz is enough.

      As is 640k obviously.

      --
      I should use this sig to advertise my book ISBN-13 : 978-1501515132.
    5. Re:overpriced. by c4757p · · Score: 1

      Who can hand solder QFN chips?!

      Who can't? FFS, they're one of the easiest packages to solder. Grab a firestick and practice...

    6. Re: overpriced. by Anonymous Coward · · Score: 0

      When I bring up a new first run silicon (ARM SoC) at my company they are $15,000 each.

    7. Re:overpriced. by serviscope_minor · · Score: 1

      QFNs aren't that hard to solder. They've got lands up the side, so you can even do them with a normal soldering iron. I've never tried that personally, but I've watched others do it. The technique is similar to the blob and suck medhod of doing fine pitch leaded packages. I have however reworked and replaced DFNs and small LGAs with one of those cheapie 852D air guns off ebay. And I've also soldered them with a $10 stencil and a basic reflow oven.

      I hear other people use a cheap toaster oven rather than spend the $150 of a cheap dedicated unit.

      --
      SJW n. One who posts facts.
    8. Re:overpriced. by K.+S.+Kyosuke · · Score: 1

      640k MHz should indeed be enough for anyone. (At least for ten years or so...)

      --
      Ezekiel 23:20
    9. Re:overpriced. by thegarbz · · Score: 2

      Or just get some skills. I hand soldered several QFN chips with an incredibly small pitch during my thesis. Simple tips:

      - Use very liberal amounts of flux.
      - Ensure the solder mask gives you enough space to place your iron, the solder will wick up to the pins.
      - Solder down 2 opposite pins
      - Check that all pins line up after soldering down the first 2.
      - Check them again.
      - No seriously did you check them? Use a magnifying glass or a microscope. This is your last chance before you royally screw things up.
      - Use tiny amounts of solder and let the solder creep up to the pins.
      - After soldering use solder wick to extract away the rest. Along with additional flux this will ensure you don't end up with any bridges under the chip.

      I find a nice glass of red helps if you have an unsteady hand. (That's red wine, not red bull in case the Slashdot crowd confuses the two :)

    10. Re:overpriced. by Shirley+Marquez · · Score: 1

      At least a QFN can be hand soldered. There are packages that are literally impossible to hand solder, like a BGA.

  5. There is a lot to prove by Anonymous Coward · · Score: 0

    We have had various efforts on open sourced hardware over the years, and they have never made any kind of sense. Verification quality have been spotty and poorly documented, tools have been missing or underdeveloped. This have lead to that any effort in trying to use these design teams would have to invest significant effort in understanding and fixing issues in the deliverables. Contrast with just picking up a license from ARM. Arm will support you fix issues and have a reasonably good track record in delivering on time and at sufficient quality. (And yes you do get the RTL source code so you can inspect it, but you are not allowed to modify it)

    Considering that mask sets cost significant money compared to license costs, there is very little interest in picking up these open hardware licenses.

    Furthermore their approach to nvram seems a bit eh.. cavalier.

    NVRAMs are incredibly hard to do I do not buy that you can develop a brand new reliable NVRAM bitcell without at least 4-5 mask sets for your learning cycles and 3-4 years working closely with the fab to tweak the process.

    Oh and b.t.w. on CMOS NVRAM want to know a reason why those guys are so tight lipped: It largely does not work. (Sure you get to it to work in the lab, but expose it to a bit of temperature and aging and they fail miserably)

    1. Re:There is a lot to prove by TheRaven64 · · Score: 1

      Contrast with just picking up a license from ARM

      One of the reasons RISC-V exists is that this is quite difficult. It can take two years to negotiate a license with ARM. The ARM licenses can also eat up a lot of your profit. Micron is one of the RISC-V backers because the licenses for the ARM cores on their SSDs eat a very noticeable proportion of the per-unit profit.

      --
      I am TheRaven on Soylent News
  6. What a strange timeline we're on. by allaunjsilverfox2 · · Score: 1

    My personal view is that most western societies seem to be on a trajectory of ever closed groups, while the hardware we live on seems to be becoming more and more open.

    --
    Restore the madness of youth's lechery
    1. Re:What a strange timeline we're on. by Anonymous Coward · · Score: 1

      Your view is wrong. Hardware has only gotten more closed with time.

      It used to be the case that the computer you bought came with schematics and a document describing how to program the thing to do whatever you wanted. Now, you're lucky if you can get someone in the depths of a block-box corporation even to acknowledge that there's a bug in the software or hardware.

    2. Re:What a strange timeline we're on. by Anonymous Coward · · Score: 0

      My father's TRS-80 came with schematics. IIRC my first computer, a Zenith AT-class PC, did too.

  7. Garage chip by Z80a · · Score: 1

    This will get really fun the day someone manages to make an CPU on his own garage.
    I hope this person documents it on the net with videos etc..

    1. Re:Garage chip by cruff · · Score: 1

      This will get really fun the day someone manages to make an CPU on his own garage.

      Might be hard with the birds landing in the middle of the clean room. :-)

    2. Re:Garage chip by ShanghaiBill · · Score: 1

      This will get really fun the day someone manages to make an CPU on his own garage.

      That day is in the past, not the future. Some early cpus were taped out, etched, and metallized by hand. Today, you need nano-scale photolithography and a multi-billion dollar fab. You can load this CPU into an FPGA, but if you want it directly in silicon, you ain't gonna do that in no garage.

    3. Re:Garage chip by rectalfeeding · · Score: 1

      This will get really fun the day someone manages to make an CPU on his own garage.

      That day is in the past, not the future. Some early cpus were taped out, etched, and metallized by hand. Today, you need nano-scale photolithography and a multi-billion dollar fab. You can load this CPU into an FPGA, but if you want it directly in silicon, you ain't gonna do that in no garage.

      Today, you need to set your expectations and hopes realistically. If it could be done in the past, it can be done today. You will just have to have expectations of utility more in line with what the folks in the past had, rather than what you might wish for with knowledge of today's commercial tech.

      Set your sights towards a raspberry pi or less, not towards modern high performance products. At least for the start. It may well be that once you get the thin end of the wedge / foot in the door, you can scale up a bit (but still nowhere near that multi-billion dollar fab level).

      Don't discourage people. There is a metric F-ton of things you could do with an Atari-400 and a cellular modem. Probably you could get enough to implement GPG soon thereafter.

    4. Re:Garage chip by Anonymous Coward · · Score: 0

      A raspberry pi or less lol you really have absolutely no idea do you. A Raspberry Pi CPU is hundreds of times more complex than what you could etch out in your garage.

    5. Re:Garage chip by rectalfeeding · · Score: 1

      A raspberry pi or less lol you really have absolutely no idea do you. A Raspberry Pi CPU is hundreds of times more complex than what you could etch out in your garage.

      Call it a 'trumpesque quasi troll'. Realistically I would expect it to be several years before a workable Atari-400 level analog was readily accessible. Multiple aspects of this problem can be worked on in parallel, so during the years that the physical processes are being developed (and coming down in price in various ways due to various innovations and evolutions of existing tech) to get to the A400 level, whatever hurdles would then be encountered subsequently scaling up to the firstgen rpi could have been seen far ahead of time and preemptively optomized for speediest development. This isn't just analagous to the efforts it took to build and engineer this stuff the first time around. We have tons of factors helping us out at this stage in the game. I would be overjoyed with a sega-dreamcast level 3D performance in a 100% FOSS(and hardware) incarnation.

    6. Re:Garage chip by ShanghaiBill · · Score: 2

      Today, you need to set your expectations and hopes realistically ... a raspberry pi or less

      A Raspberry Pi has more transistors than a top end 1980s supercomputer. It is a million times more complex than anything you could ever hope to etch in a garage. Maybe you could do a 4004 (~2000 transistors) with tape and etchant, but a Raspberry Pi has billions.

    7. Re:Garage chip by 110010001000 · · Score: 1

      There is no innovation or evolution in tech that is going to let you fab a 6502 in your garage. Ever.

    8. Re: Garage chip by Anonymous Coward · · Score: 0

      A raspberry pi is basically the guts of a cellphone put onto a board with some usable i/o exposed. Its magnitudes more complex than a classic old 8 bit machine.

    9. Re:Garage chip by JoeMerchant · · Score: 1

      You can fully simulate a 6502 (running full speed) in your phone... who really cares if you can dig the minerals from the earth, grow your own silicon wafers and do lithography in your garage or not? I mean, if you set your mind to it and had a couple of million to blow, I'm sure it's possible in a less than 1000 square foot space, but you'd be better off acquiring used foundry gear and buying components from suppliers, like the real chip fabs do. And then, what's the point? Are you going to make anything that can't be emulated in your phone, or done by a sub $100 Raspberry-Pi-like device? If you do it in Android and/or iOS, your idea can spread over the network to millions of devices in hours - if you build your own silicon, you'll be making a handful of devices that cost more than a phone a-piece, not counting the capital investment.

    10. Re:Garage chip by JoeMerchant · · Score: 1

      Didn't they make 4004s with tape and etchant at the "real" factory?

    11. Re:Garage chip by NormalVisual · · Score: 1

      The photomasks were taped out originally, but it was still a 10 um photolithographic process (huge by today's standards) on a very tiny die that required a lot of specialized equipment. It's possible to make individual discrete components (transistors, fundamental logic gates) yourself, but a die with thousands of transistors on it is still a bit beyond the DIY crowd.

      --
      Please stand clear of the doors, por favor mantenganse alejado de las puertas
    12. Re:Garage chip by Anne+Thwacks · · Score: 1
      Does it have to be small and electronic?

      If I had the time and money, I could make a pneumatic version of the PDP8 in a garage (live in London, and cannot currently afford a garage). It would be about the same size as a PDP8/S and might even go as fast! (Using 8E architecture). Read/write paper tape only - no pneumatic TU56's!

      PDP8 architecture was open source. I think the PDP11/20 was too. I believe Sparc is also open source, even Sparc64, although actual processors like Sun/Oracle/Fujitsu's are not because there is a lot of extra stuff (glue, peripherals) that are not.

      --
      Sent from my ASR33 using ASCII
    13. Re:Garage chip by rectalfeeding · · Score: 1

      There is no innovation or evolution in tech that is going to let you fab a 6502 in your garage. Ever.

      You sound confident in your long term prediction. Time will tell.

    14. Re:Garage chip by K.+S.+Kyosuke · · Score: 1

      Why not something better than the PDP-8? I thought the ISA was quite clumsy..

      --
      Ezekiel 23:20
    15. Re:Garage chip by K.+S.+Kyosuke · · Score: 1

      Just because it is more complex doesn't mean that the complexity is necessary. A large part of current ARMs is vestigial.

      --
      Ezekiel 23:20
    16. Re:Garage chip by JoeMerchant · · Score: 1

      True - it was a guided missile chip - small was a virtue.

      I'd bet that by now, some sod somewhere has put together a 4004 with discrete transistors on breadboards.

  8. RISC-V versus J-core by Anonymous Coward · · Score: 0

    In addition to RISC-V, the other big project to create an open source processor is the J-core project (http://www.j-core.org). The two projects have very different approaches. RISC-V is an entirely new instruction set that requires an entirely new software toolchain. In contrast, J-core is based on an existing instruction set with an established software toolchain, but some work is required to bring that toolchain up-to-date. RISC-V is supported by large corporations such as Google, HP Enterprise, IBM, Microsoft, NVIDIA, and Oracle. In contrast, J-core is much more a grass-roots project.

    It will be interesting to see if either project (or both!) succeed in creating a widely-available open source processor. Right now, both projects are aiming at the level of microcontrollers, but both projects have full-featured processors on their roadmaps.

    1. Re:RISC-V versus J-core by unixisc · · Score: 1

      One thing I'm wondering about RISC-V - I can see the motivation behind a new ISA - making it a FOSH platform, but from a market acceptance POV, who will write code for, or adapt a platform based on a brand new ISA, when there is x86/x64, ARM, SPARC, MIPS and Power. Even Itanium, for anyone who's still into VLIW (even though Itanium 3 is more RISC than VLIW). Maybe the FSF/Libre crowd could build for this - maybe port Libre Linux or Minix to the platform.

      Another thing I wonder - in the 90s, Sun contemplated a series of microprocessors that used Java Bytecode as the instruction set. Has there ever been a study on the feasibility of such a microprocessor? If we could indeed have a pure Java system - a JVM on a chip using Bytecode as the ISP. Then everything written in Dalvik can run natively on it. On a different note, the name j-core seems to suggest a Java processor, even though it's based on Hitachi's SuperH processor

    2. Re: RISC-V versus J-core by Anonymous Coward · · Score: 0

      ARM used to have jazelle that was meant to execute Java bytecode. I think it was used during the j2me age, but no longer used by anyone

    3. Re:RISC-V versus J-core by Anonymous Coward · · Score: 0

      j-core.org will have commercial chips quite a bit earlier, with DDR memory, Ethernet, SMP and Linux.

    4. Re:RISC-V versus J-core by jackckang · · Score: 1

      There is huge momentum behind the RISC-V software ecosystem, and you can see a partial list of all the software that has been written for RISC-V here: https://github.com/arunthomas/... Some highlights: Binutils, GCC, OpenOCD, LLVM, Linux, Fedora, Debian, FreeBSD

  9. The difference between a fairy tale ... by CaptainDork · · Score: 3, Informative

    ... and a sea story:

    A fairy tale starts with, "Once upon a time ... "

    A sea story; "Hey, this ain't no shit ... "

    So, this ain't no shit:

    When I trained on electronics in this man's Navy in 1965, I went to NAS Memphis and we worked on a vacuum tube computer that filled up a whole wall. We'd open the windows in the winter because it was HOT in there.

    There were two tubes per flip-flop module. The tubes burned out often and we'd have to troubleshoot that.

    Our goal was to use a row of toggle switches to turn lights "on" for a binary one, and "off" for a binary zero.

    We would load up one register with four bits and the only other register with four bits and then we'd press a switch that could only execute an add and we'd better get the right binary number on the third row of lights.

    We started (I shit you not) all of our algebra, trig, geometry, etc. including square root extraction by pencil and paper and then moved into the slide rule age.

    The only goddam transistors we saw were the 9-volt radios playing Elvis.

    --
    It little behooves the best of us to comment on the rest of us.
    1. Re:The difference between a fairy tale ... by JoeMerchant · · Score: 1

      So, could the guys on the tube computer get a firing solution any faster, or more accurately, than the guys with the slide rules?

    2. Re:The difference between a fairy tale ... by CaptainDork · · Score: 2

      No firing solutions by any means.

      We were avionics, not ordinance.

      The tube "computer" added two 4-bit numbers.

      That was it.

      --

      The first real computer I saw was the Jezebel made by Magnavox to hunt submarines. $250,000 with one aboard a Grumman twin prop job off a carrier and two installed in P3 Orions (of hurricane fame).

      It had a ferrite core, little iron rings with two wire going through them. When the current went one way, the magnetic field was a "one" and when the current through another wire, the core was reset. The other wire changed magnetic polarity.

      Word was that it was hand-wound by Indians, later known as Native Americans.

      64,000 bits.

      It had its own thermal bath that kept everything hot, but at a steady temperature.

      The computer had glossy buttons, and a Built-In-Equipment-Test (BEST, we called it).

      That test knew what the voltage was supposed to bet at critical points throughout the modular, hybrid circuit boards (very high tech for the times, ca. 1967).

      We'd troubleshoot them puppies down to component parts; had a clean room; and could remove/replace a chip and it looked like factory.

      One day out at sea, on the USS Wasp, I had a crazy core and the test run told me I had a submarine 6 feet above water doing 60 knots!

      Had to ship the core back to the indigenous.

      --
      It little behooves the best of us to comment on the rest of us.
    3. Re:The difference between a fairy tale ... by Anonymous Coward · · Score: 0

      One day out at sea, on the USS Wasp, I had a crazy core and the test run told me I had a submarine 6 feet above water doing 60 knots!

      That doesn't surprise me. Flow resistance of water is much higher than air, so 60 knots should be easily doing for a submarine 6 feet above water.

    4. Re:The difference between a fairy tale ... by Anonymous Coward · · Score: 0

      ur old lol

    5. Re:The difference between a fairy tale ... by Anonymous Coward · · Score: 0

      the word debug should be used instead of troubleshoot

  10. It will only ship in 2019 by Anonymous Coward · · Score: 0

    You have to wait little of a year to get the board. Also it is not specified on what node (i.e. namometer) it is made.

    1. Re: It will only ship in 2019 by Anonymous Coward · · Score: 0

      130 nm, says that on the page

  11. Actual Technology News! by Anonymous Coward · · Score: 0

    Tech news on neo-slashdot? I’m shocked.

  12. lets play yer wrong by Anonymous Coward · · Score: 0

    "It used to be the case that the computer you bought came with schematics and" This is just as wrong. Insofar as the percentage of the population that bought these computers was vanishingly small, instead of ubiquitously large. Apples and Oranges. Different day and age and world. There was never a time that ordinary people purchases such things. It's a nice fantasy though, I'll give you that.

    1. Re:lets play yer wrong by Waffle+Iron · · Score: 2

      "It used to be the case that the computer you bought came with schematics and"

      This is just as wrong. Insofar as the percentage of the population that bought these computers was vanishingly small, instead of ubiquitously large. Apples and Oranges. Different day and age and world. There was never a time that ordinary people purchases such things. It's a nice fantasy though, I'll give you that.

      Plenty of ordinary people bought the original IBM PCs and PC/ATs. They didn't come standard with the schematics, but you could buy technical reference manuals from IBM which included both the schematics and the BIOS source code for the systems.

      Maybe few end-users made use of the available info, but it did ensure that 3rd parties could create a large ecosystem of compatible software, accessories and even competing computer systems. This greatly benefited the end users, whether they cared to dig into the underlying technology or not.

    2. Re:lets play yer wrong by rectalfeeding · · Score: 1

      They didn't come standard with the schematics, but you could buy technical reference manuals from IBM which included both the schematics and the BIOS source code for the systems.

      Well... I'm sure you can buy them today too. It matters a lot what the pricetag is however. And even if you quote me an affordable number from the 80's, I still contend that was for a vanishingly small percentage of the population at large. Compared to probably multiple more powerful devices owned at less than 1/10th the price by just about everyone today.

    3. Re:lets play yer wrong by Anonymous Coward · · Score: 0

      The C64 was bought by a lot of people.
      It did not come with schematics, but there was a book with all schematics, memory layout, register layout and the annotated assembly code of all the roms.

    4. Re:lets play yer wrong by 110010001000 · · Score: 1

      Yeah, good luck trying to get schematics of your MacBook or Lenovo POS. You are living in lala land. The OP is right: they used to make schematics available in the past.

    5. Re: lets play yer wrong by Anonymous Coward · · Score: 0

      The C64 had the schematic right in the manual that shipped with the machine.

    6. Re:lets play yer wrong by JoeMerchant · · Score: 1

      Apples and Ataris - they had schematics, but the really interesting bits, graphics and sound processors, were still closed source, proprietary, and a little buggy in the first couple of generations.

    7. Re:lets play yer wrong by NormalVisual · · Score: 2

      The Apple IIe had some custom silicon, but the II/II+ was made up of entirely off-the-shelf components.

      --
      Please stand clear of the doors, por favor mantenganse alejado de las puertas
    8. Re:lets play yer wrong by Anne+Thwacks · · Score: 1
      I had several PDP11s, at least one of which I used as a personal computer, and they all came with schematics. In fact, DEC supplied complete details of how they worked. I think it was probably necessary before LSI, and people expected it long after.

      I had PC schematics, and BIOS listings. I am fairly sure I had Schematics for the Intel 8080 development system, two different 6502 development systems, and a 16 bit National Semis development system which we used as a word processor.

      Bill Gates is personally responsible for ending the distribution of schematics.

      --
      Sent from my ASR33 using ASCII
    9. Re:lets play yer wrong by dbIII · · Score: 1

      It looks like it's time to clean out my bookshelf since I have published Atari ST schematics on the bottom shelf. I second the above poster, obfiscation started as a Microsoft thing.

    10. Re:lets play yer wrong by dbIII · · Score: 1

      I've just pulled off the shelf "Atari ST INTERNALS" published by Abacus Software (second edition 1987). From page 13 it goes into those custom chips and their pinouts plus various info on them. From page 271 it has the BIOS listing in assembly with comments.

    11. Re:lets play yer wrong by JoeMerchant · · Score: 1

      I used Atari ST Internals to code a horizontal smooth scrolling display, it was buggy - flickery on my 800 that I coded it on, but when the GTIA II came out in the 1200 the same code ran perfectly. I don't think there was ever any publication about that, other than, yeah, the GTIA I had some bugs.

    12. Re:lets play yer wrong by yuriklastalov · · Score: 1

      What do you need schematics for a MacBook for though? It made sense back in the days when everything was written in ASM and ran on the bare metal, but now? How is a schematic going to make your latest hipster iOS app any better?

    13. Re:lets play yer wrong by Anonymous Coward · · Score: 0

      I don't want to run hipster iOS.

    14. Re:lets play yer wrong by dbIII · · Score: 1

      OK then, reality wins!
      By the time I got my ST I didn't have trouble like that but I bow to your experience with those earlier buggy chips I didn't see.

    15. Re:lets play yer wrong by Anonymous Coward · · Score: 0

      Wasn't an Atari 800 a completely different beast from the Atari ST? (68000, 1MB RAM, 192 KB EPROM)

  13. Not Harvard architecture? by cjameshuff · · Score: 2

    The high speed is because they currently don't have any on-chip flash (flash being slower to access than SRAM, and typically being what slows 32-bit microcontrollers down). That means this isn't a single-chip solution like most microcontrollers, though they are working on changing that.

    Instead of flash, they store their program in the same SRAM used to store data (which makes that 8 kB of SRAM a lot more limiting than it would be on a Cortex M0 with the same amount of SRAM plus 16-256 kB flash). Most microcontrollers use a Harvard architecture with separate program and data memory, allowing instructions to be fetched from flash while performing reads from and writes to SRAM. If they don't do this, I wonder what sort of performance they'll see when they have to make regular reads from a slow flash memory in between SRAM accesses. Or will they just load the entire program into SRAM? That's not going to be ideal in terms of power consumption, requiring a much bigger memory array than they'd otherwise use, something that's going to get worse as they try to compete with larger microcontrollers.

    Also, the Harvard architecture has some advantages in security: things can be set up so a very specific sequence of actions has to be performed to enable writing to program memory. With IoT devices, this sort of thing is becoming more important...not an issue at present, with their 8 kB memory, but something to consider when thinking about this thing's future.

    1. Re:Not Harvard architecture? by lerugue · · Score: 1

      Double-gate (EEPROM) is expensive by license and by fabrication. We are diving deep to solve this, by doing an extra effort on designing our own NVRAM cells (single poly) and try to virtualize RAM with the limited NVRAM possible. NVRAM is area expensive and if we reach the goal of $500k plus an additonal $200k you would see speed that you cannot see on regular micros. This is the reason of open source, work around things and do better than closed commercial chips.

    2. Re:Not Harvard architecture? by Anonymous Coward · · Score: 0

      You say "high speed", but is it?

      Compared to a similarly-priced Cortex, the thing is hopelessly slow. Sure, you can find a Cortex M0 that performs about as fast, but the latter will be dirt cheap.

      The problem is that for such odd, small-volume applications you have entirely different cost trade-offs. In particular, you have to avoid a lot of up-front fixed costs, which will then return in the marginal costs. Integrating flash versus separate chips is just one of those trade-offs. There will be many more.

      For instance, I'd be surprised if this was made of 300mm wafers, and even 200mm might be a stretch. The chip is 4mm square, a 300 mm wafer gets you about 70.000 mm2, a 200 mm wafer gets you 30.000 mm2. The proposed 70.000 pieces would be a mere 4 wafers at 300mm, or just 9 at 200mm.

    3. Re:Not Harvard architecture? by cjameshuff · · Score: 1

      It runs at 160 MHz. Processors that run directly from flash are much slower (around 32-48 MHz...ST's Cortex M0 processors run at 48 MHz). The only flash-based processors that run at comparable speeds do so with complex hardware to read instructions ahead of time in large chunks, storing them in SRAM until the processor requests them (ST's ART Accelerator, for example)...which can result in difficult to predict variations in execution speed when branches result in the needed code being something other than what was preloaded. Luis mentioned working on some method to "virtualize RAM" in the other reply, which might be a somewhat similar system, which again would sacrifice determinism for speed.

  14. my previous bookmark on open source RISC-V by epine · · Score: 1

    Analyzing the RISC-V Instruction Set Architecture â" Andreas Olofsson, August 2014

    The RISC-V architecture is not revolutionary, but it is an excellent general purpose architecture with solid design decisions. The true breakthrough here is really the open source licensing model and the maturity of the design as compared to most other open source hardware projects. ... A royalty free 64-bit RISC-V core would have a raw silicon cost of a couple of cents in current CMOS process nodes. Now that is exciting!

  15. My question is: by Anonymous Coward · · Score: 0

    Why the fuck does everybody insist on these crowdfunds being for microcontroller chips, rather than a Pi SoC package, or AMRISC20000 (Cyrix 486SL with memory controller PCI bus and almost full set of PC compatible peripheral controllers)?

    SPI is out of patent protection, SDRAM is out of patent protection, PCI is out of patent protection.

    For 500k and that many units they should be able to produce a chip in a 144+ QFP package that could actually be used to *RUN A SYSTEM WITH LINUX OFF OF*!!!

    Instead they are producing something that anyone who actually needs can buy for a dime a dozen (even a RISC-V one!) from already established vendors. I mean seriously, who wants to buy a RISC-V to use with 8k of SRAM and no external memory bus? I can find a dozen other much better ships for that usecase, but it's been 7 years since I could find one that met the PC goals of security, reliability and user control and ownership of its operating characteristics.

    AMD, Intel, and ARM are all getting further from the user's control of the system, and all we're getting as we near the decade mark is 'expensive microcontrollers' as seed projects.