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AMD Unveils Vega GPU Architecture With 512 Terabytes of Memory Address Space (hothardware.com)
MojoKid writes: AMD lifted the veil on its next generation GPU architecture, codenamed Vega, this morning. One of the underlying forces behind Vega's design is that conventional GPU architectures have not been scaling well for diverse data types. Gaming and graphics workloads have shown steady progress, but today's GPUs are used for much more than just graphics. In addition, the compute capability of GPUs may have been increasing at a good pace, but memory capacity has not kept up. Vega aims to improve both compute performance and addressable memory capacity, however, through some new technologies not available on any previous-gen architecture. First, is that Vega has the most scalable GPU memory architecture built to date with 512TB of address space. It also has a new geometry pipeline tuned for more performance and better efficiency with over 2X peak throughput per clock, a new Compute Unit design, and a revamped pixel engine. The pixel engine features a new draw stream binning rasterizer (DSBR), which reportedly improves performance and saves power. All told, Vega should offer significant improvements in terms of performance and efficiency when products based on the architecture begin shipping in a few months.
With Rizen coming out soon and a new GPU design that looks very advanced, AMD is set to make substantial progress in market share, as long as they don't screw up. I'm rooting for them. I had switched all of our shops new PC's to Intel when they released their 6th gen Core series as AMD was just too far behind. Teh consumer PC's were all AMD for the past five years or so. I wanna go back to AMD, as long as the new stuff performs. Don't let us down AMD!
Lisandro you COULD RTFA, you know? It's even an effing meme around here.
The HBCC gives the GPU access to 512TB (half a petabyte) of virtual address space and gives the GPU fine-grained control, for adaptable and programmable data movement. Often, more memory is allocated for a particular workload than is necessary; the HBCC will allow the GPU to better manage disparities like this for more efficient use of memory. The huge address space will also allow the GPU to better handle datasets that exceed the size of the GPU’s local cache. AMD showed a dataset being rendered in real-time on Vega using its ProRender technology, consisting of hundreds of gigabytes of data. Each frame with this dataset takes hours to render on a CPU, but Vega handled it in real-time.
The "news for nerds" version of this story's headline is "AMD Unveils Vega GPU Architecture With 49 bits of Memory Address Space"
See that "Preview" button?
But this is not new at all. IIRC Nvidia's CUDA 5 already gives you 49 bits of unified address space. Don't really know the addressing limitations on previous AMD architectures, but I doubt it was substantially lower.
Realistically, large address spaces when you can only practically fill 0.05-0.1% means little for performance. I don't want to attack AMD with this, who usually manufacture really good GPU hardware, but this sounds like a marketing gimmick and nothing more. I particularly enjoyed the "hours to real-time" comparison... against a CPU.
They're actually using NVMe drives as the extra "memory". This works out well for huge datasets where you take a performance hit streaming it from the host. Load up the data on one of those 4GiB/s NVMe SSDs. They already have a product out that does this and it makes certain workloads much faster. Just waiting to see an 8x PCIe 4.0 NVMe XPoint SSD. Will be wicked fast for what they use it.
There is already technology available to feed this monster. Things like the EMC DSSD can have 1/2 PB of NVMe flash connected via a PCIe bridge, and presented as a single shared memory mapped space to an entire rack if servers. I assume that is the use case for these cards, mostly in the supercomputing space.