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IBM Research Alliance Has Figured Out How To Make 5nm Chips (cnet.com)
IBM, GlobalFoundries, and Samsung said Monday that they have found a way to make thinner transistors, which should enable them to pack 30 billion switches onto a microprocessor chip the size of a fingernail. The tech industry has been fueled for decades by the ability of chipmakers to shoehorn ever smaller, faster transistors into the chips that power laptops, servers, and mobile devices. But industry watchers have worried lately that technology was pushing the limits of Moore's Law -- a prediction made by Intel co-founder Gordon Moore in 1965 that computing power would double every two years as chips got more densely packed. From a report: Today's chips are built with transistors whose dimensions measure 10 nanometers, which means about 1,000 fit end-to-end across the diameter of a human hair. The next generation will shrink that dimension to 7nm, and the IBM-Samsung development goes one generation beyond that to 5nm. That means transistors can be packed four times as densely on a chip compared with today's technology. "A nanosheet-based 5nm chip will deliver performance and power, together with density," said Huiming Bu, IBM's director of silicon integration and device research. Take all those numbers with a nanograin of salt, though, because chipmakers no longer agree on what exactly they're measuring about transistors. And there's also a long road between this research announcement and actual commercial manufacturing. IBM believes this new process won't cost any more than chips with today's transistor designs, but its approach requires an expensive shift that chipmakers have put off for years: the use of extreme ultraviolet light to etch chip features onto silicon wafers.
I'll just leave this here.
https://en.wikipedia.org/wiki/...
yvan eht nioj
We need to switch from nanometers to picometers. 5 nm is 5000 picometers. The diameter of silicon atom is 210 picometers, thus 5nm will be equal to approx 24 silicon atom diameters, which will provide a valuable perspective. I do understand that measuring lakes in olympic swiming pools will be used to compare measuring transistors with the silicon atom radius, however in this situation there is a limit on how small transistors can exist in practice.
"but its approach requires an expensive shift that chipmakers have put off for years: the use of extreme ultraviolet light"
Actually, EUV has been planned for 5nm all along (even for 7nm). It make the process cheaper, not more expensive (by reducing the number of masks)
But EUV is much, much slower. For volume production, you end up with fewer wafers per day.
Christ, stop spamming us with his mental illness.
W..w..W - Willy Waterloo washes Warren Wiggins who is washing Waldo Woo.
The way we are building processors (primarily lithography) is old, tired and reaching it's limits. What we need now is to focus on figuring out how to make small machines that can work cooperatively to build new things, including copies of themselves. It's been known for quite some time that future of computing is in massive distributed systems, so why aren't we applying the same concepts to manufacturing processors?
Anons need not reply. Questions end with a question mark.
EUV has been worked on for a while, but at the scales they're ending up on, there's more problems that they don't address in the article. Electromigration starts to become a real problem when the transistors are only a few 10s of atoms wide for example.
But 'm sure that the shift to EUV is expensive which is what it is saying.
I'm trying but you keep posting it.
W..w..W - Willy Waterloo washes Warren Wiggins who is washing Waldo Woo.
Immersion steppers have higher throughput, but as they require more production steps they are effectively slower.
You are so dating yourself. Just ten seconds on Wikipedia concerning EUV lithography would shave a decade off your musty knowledge.
The whole point of the post-2009 lithographic era is that nothing traditionally used as a benchmark of progress comes for free.
Advantage: fewer masks
Disadvantage: vastly longer step time
Moore's law is still hobbling along, but it definitely lost a testicle circa 2004–2009. You can see it in any honest graph.
Even this article lies a bit.
The chips are down for Moore's law — 9 February 2016
Transistors per chip still kinda going up on the same trend, as always.
But what they don't tell you is that there's an entire CPU inside your CPU devoted to turning those nice transistors off if they work too hard.
Welcome to union rules.
It's just like the gig economy where you only get twenty hours per week on average, but they won't tell which hours ahead of time, so you can't actually get yourself another 20-hour gig to achieve full-time gainful employment.
Official unemployment down; hours and hours of Counter-Strike alone at home (waiting for the phone to ring) way way up.
... for suing the correct definition of Moore's law!
I understood that when founders anouce improved density nowadays, it is more because of 3D stacking rather than miniaturization.
But the mention of ultraviolet light suggest this time it is indeed about miniaturization. Anyone has more information?