Can We Surpass Moore's Law With Reversible Computing? (ieee.org)
"It's not about an undo button," writes Slashdot reader marcle, sharing an article by a senior member of the technical staff at Sandia National Laboratories who's studying advanced technologies for computation. "Just reading this story bends my mind." From IEEE Spectrum:
[F]or several decades now, we have known that it's possible in principle to carry out any desired computation without losing information -- that is, in such a way that the computation could always be reversed to recover its earlier state. This idea of reversible computing goes to the very heart of thermodynamics and information theory, and indeed it is the only possible way within the laws of physics that we might be able to keep improving the cost and energy efficiency of general-purpose computing far into the future...
Today's computers rely on erasing information all the time -- so much so that every single active logic gate in conventional designs destructively overwrites its previous output on every clock cycle, wasting the associated energy. A conventional computer is, essentially, an expensive electric heater that happens to perform a small amount of computation as a side effect...
[I]t's really hard to engineer a system that does something computationally interesting without inadvertently incurring a significant amount of entropy increase with each operation. But technology has improved, and the need to minimize energy use is now acute... In 2004 Krishna Natarajan (a student I was advising at the University of Florida) and I showed in detailed simulations that a new and simplified family of circuits for reversible computing called two-level adiabatic logic, or 2LAL, could dissipate as little as 1 eV of energy per transistor per cycle -- about 0.001 percent of the energy normally used by logic signals in that generation of CMOS. Still, a practical reversible computer has yet to be built using this or other approaches.
The article predicts "if we decide to blaze this new trail of reversible computing, we may continue to find ways to keep improving computation far into the future. Physics knows no upper limit on the amount of reversible computation that can be performed using a fixed amount of energy."
But it also predicts that "conventional semiconductor technology could grind to a halt soon. And if it does, the industry could stagnate... Even a quantum-computing breakthrough would only help to significantly speed up a few highly specialized classes of computations, not computing in general."
[I]t's really hard to engineer a system that does something computationally interesting without inadvertently incurring a significant amount of entropy increase with each operation. But technology has improved, and the need to minimize energy use is now acute... In 2004 Krishna Natarajan (a student I was advising at the University of Florida) and I showed in detailed simulations that a new and simplified family of circuits for reversible computing called two-level adiabatic logic, or 2LAL, could dissipate as little as 1 eV of energy per transistor per cycle -- about 0.001 percent of the energy normally used by logic signals in that generation of CMOS. Still, a practical reversible computer has yet to be built using this or other approaches.
The article predicts "if we decide to blaze this new trail of reversible computing, we may continue to find ways to keep improving computation far into the future. Physics knows no upper limit on the amount of reversible computation that can be performed using a fixed amount of energy."
But it also predicts that "conventional semiconductor technology could grind to a halt soon. And if it does, the industry could stagnate... Even a quantum-computing breakthrough would only help to significantly speed up a few highly specialized classes of computations, not computing in general."
Moore's Law is about device sizes and economics, not about energy use.
Yeah, this one was a bit of a brain burner. I actually had to RTFA to get a clue as well. Hopefully we get more of these articles. Wouldn't that be nice: tech-heavy stories on a tech-site...
I'm still going to point out some silliness in the article, mainly, this quote:
There’s not much time left to develop reversible machines, because progress in conventional semiconductor technology could grind to a halt soon. And if it does, the industry could stagnate, making forward progress that much more difficult. So the time is indeed ripe now to pursue this technology, as it will probably take at least a decade for reversible computers to become practical.
That seems like a stretch. As soon as we actually hit the wall, there's going to be a great incentive to push forward with alternative technology. In the meantime, the world is not going to collapse because we can't keep increasing our computational power at the same ridiculous rate. In fact, it might actually be nice to take a bit of a breather and just work at hardening and optimizing our existing infrastructure (hah!).
Rather, it sounds like a marketing pitch for more funding, and seem more than a little self-serving. Still, that's fine. I hope there remains some amount of funding for blue-sky projects like this and quantum computing. Even if it doesn't pan out as hoped, it's very likely we still learn valuable things.
Irony: Agile development has too much intertia to be abandoned now.
Passive logic predates active logic by many hundreds of years. However, although it theoretically requires less energy than active logic using the same technology*, it requires energy. As a result, after a few layers of passive logic (generally two) you require active logic to restore the noise margin. You then discover that the passive logic is slower because the losses in it, while small, are effectively series resistance, and what ever follows it is effectively a capacitance, however small. This is an RC delay circuit. The result is the more layers of passive logic, the slower the whole thing is. To make it go faster, you reduce the passive layers and increase the number of active stages.
There is another issue too - all the stray Rs and Cs are somewhat indeterminate in value (generally very temperature sensitive), so, in order to make sure everything is in sync, you use clocked logic, and to make it go faster, you keep the layers of logic between registers short (that is what pipelining does).
In short, in the real world there is a tradeoff between pumping power in to make it go faster, and not pumping power in, and having it go slow.
This was well known by 1970, and most probably known by all interested parties in 1941.
Anyone who thinks that logic requires data to be cleared before it is over-written, is still using core memories from the 1970's. No one clears the old result and then writes a new one. The new result overwrites the old one. Preferably with due allowance to avoid the data being used during the transition (requires clocking, requires active devices).
In short, unless I am completely wrong - in which case, much better written documents are required - the authors of the report have no clue at all.
* Passive logic as implemented in Victorian railway signalling requires at least a million times more energy per signal transition than (active) 1970's TTL.
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