Japan's Fujitsu and RIKEN Have Dropped the SPARC Processor in Favor of an ARM Design Chip Scaled Up For Supercomputer Performance (ieee.org)

Japan's computer giant Fujitsu and RIKEN, the country's largest research institute, have begun field-testing a prototype CPU for a next-generation supercomputer they believe will take the country back to the leading position in global rankings of supercomputer might. From a report: The next-generation machine, dubbed the Post-K supercomputer, follows the two collaborators' development of the 8 petaflops K supercomputer that commenced operations for RIKEN in 2012, and which has since been upgraded to 11 petaflops in application processing speed. Now the aim is to "create the world's highest performing supercomputer," with "up to one hundred times the application execution performance of the K computer," Fujitsu declared in a press release on 21 June. The plan is to install the souped-up machine at the government-affiliated RIKEN around 2021. If the partners achieve those execution speeds, that would place the Post-K machine in exascale territory (one exaflops being a billion billion floating point operations a second). To do this, they have replaced the SPARC64 VIIIfx CPU powering the K computer with the Arm8A-SVE (Scalable Vector Extension) 512-bit architecture that's been enhanced for supercomputer use, and which both Fujitsu and RIKEN had a hand in developing. The new design runs on CPUs with 48 cores plus 2 assistant cores for the computational nodes, and with 48 cores plus 4 assistant cores for the I/O and computational nodes. The system structure uses 1 CPU per node, and 384 nodes make up one rack.

Comments

Yes but

[Anonymous Coward]

Can it run Crysis ?

Re: Yes but

[fubarrr]

No

Fujitsu SPARC M3000 & Solaris 10

[buzz_mccool]

For many years my daily driver was a M3000 Fujitsu 4 core 2.86Ghz SPARCVII with 64GB of RAM and a internal RAID disk running Solaris 10. It still would be too had my employer not moved to a combination of Windows and Linux. Very reliable, scalable, hardware and OS.

Re:Fujitsu SPARC M3000 & Solaris 10

[Anonymous Coward]

Yeah, but its still Oracle.

512 bits eh?

[CajunArson]

To do this, they have replaced the SPARC64 VIIIfx CPU powering the K computer with the Arm8A-SVE (Scalable Vector Extension) 512-bit architecture that's been enhanced for supercomputer use, and which both Fujitsu and RIKEN had a hand in developing.

So the next-generation ARM miracle chip is basically copying AVX-512. Except it has noticeably fewer cores than a Knights Landing part.

ARM vs. x86: Completely fucking meaningless in this context.

Re:512 bits eh?

[Anonymous Coward]

SVE is a flexible in terms of vector length, with maximum width of 2048 bits. The 512 was likely selected due to power, bandwidth and chip real-estate reasons. We should know more after the Hot Chip representation, available free for everybody at this December the latest.

Re:512 bits eh?

[CajunArson]

"SVE is a flexible in terms of vector length, with maximum width of 2048 bits."

AVX can get wider too if it makes sense. The fact that an exotic purpose-built supercomputer chip that won't be in real operation until 2021 is clearly taking design cues from a 2017-era consumer-grade part that you can use to play video games kind of shows how this nonsense about "ARM" vs. "x86" doesn't mean anything in the real world.

Incidentally, for all the crap about "RISC" that gets tossed around here like a magic get-out-of-thinking-free card, anybody who actually knows what RISC actually means would tell you that any and all SIMD units violate RISC's principles.

Re:512 bits eh?

[dfghjk]

"anybody who actually knows what RISC actually means would tell you that any and all SIMD units violate RISC's principles."

No, SIMD units do not "violate RISC's principles" and your saying so only demonstrates your own shallow understanding of what these principles are. RISC may mean "reduced instruction set computing" but that doesn't mean the end game is the smallest instruction set.

RISC is about making an architecture that is easy to implement by eliminating instructions that aren't needed for good performance. In doing this, designers can spend their gates on performance wins rather than on logic that can just as easily be reproduced in software. RISC is about putting gates where they count and not wasting them where they don't.

When you view RISC by it's actual principles, and not just by what the letters stand for, it's quite easy to see how SIMD units are entirely compatible. Of course, RISC as a differentiator has been obsolete for decades now and only exists as a point of argument for people who don't understand. RISC was an interesting topic...in 1988. You're 30 years behind.

Re:512 bits eh?

[Anonymous Coward]

To further make the point: Really Invented by Seymour Cray (RISC)

Re:512 bits eh?

[technosaurus]

They likely chose 512 so that they didn't need to make all the necessary compiler improvements from scratch.

Re:512 bits eh?

[CajunArson]

Oh, it's the usual "ANYTHING THAT'S GOOD IS AUTOMATICALLY RISK AND ANYTHING I DON'T LIKE IS AUTOMATICALLY INTEL'S FAULT" reasoning that's one reason this site is dying.

Anyhoo, a *real* RISC CPU engineer hates all SIMD instructions and this guy at least has the balls to call out ARM too: https://www.sigarch.org/simd-i...

Not that I agree with his assessment, but he has intellectual honesty, which is more than can say for the usual koolaid ARM crowd around here.

Re:512 bits eh?

[tempmpi]

You don't understand what "this guy" (David Patterson and Andrew Waterman) is writing. Their main complaint with regular SIMD is that it makes the instruction set grow quickly over time, as CPU performance is scaled up and SIMD units are made wider but old instructions still need to be supported for backward compatibility. They support vector instructions similar to ARM SVE, as those allow scaling up the performance by adding wide execution units without requiring the introduction of new instructions at the same time. As an additional benefit, those instructions can reduce the code size compared to regular SIMD. So by the standard of that article ARM SVE is not SIMD. The SIMD instructions they call harmful are only those older ones such as ARM Neon, SSE, AVX, AVX2, ... that use a fixed SIMD size.

And at the same time, their main complaint with those instruction sets is how they evolve over time when backward compatibility is required. If you are building a CPU for a specific purpose, let's say HPC or an embedded application, where you don't have to support old code, regular SIMD with only vector size support can be a very good choice and very RISC-like choice.

Re:512 bits eh?

[tempmpi]

AVX can get wider too if it makes sense.

No, if you want to make AVX wider, then you would need to introduce a new instruction set. Intel did this several times. They started floating point SIMD with SSE which is 128-bit, then introduced the new AVX instruction set to support 256-bit wide SIMD and then AVX-512 to support 512-bit wide SIMD. If they want to scale up to 1024 or 2048-bit wide SIMD in the future than again, they will have to add new instructions and still need to support the old instructions for legacy software.

With traditional SIMD, your instruction set and the maximum width of your execution units are coupled. SVE removes this coupling. You can write SVE code now for a CPU with a 512-bit wide execution unit and would get a speedup later, without recompilation, if someone builds a CPU with a 2048-bit wide execution unit.

Re:512 bits eh?

[unixisc]

RISC and SIMD address totally different issues. RISC is about the architecture of one CPU. SIMD is about how multiple CPUs work concurrently on various data sets

Hot stuff!

[Sponge Bath]

FTA: "30 to 40 megawatts..."

"first, a feeble spark, next a flickering flame, then a mighty blaze, ever increasing in speed and power." - Nikola Tesla

K is faster than what LINPACK indicates

[u19925]

K was listed at number 10 in Nov-2017 benchmark and about 1/9th the speed of the fastest machine. But on HPCG benchmark (http://www.hpcg-benchmark.org ), it was listed number 1. Even now, it is number 2 behind the Summit in HPCG. Not bad for a computer debuted in 2011. Hope they can maintain performance on HPCG as well.

The proposed computer's LINPACK power efficiency is good but not that impressive. Summit is 8.8 MW and proposed computer is 8 times faster at about 4-5 times power consumption. So efficiency increase by a factor of 2 in 3 years (it is expected to be ready by 2021).

Um, yeah...

[Anonymous Coward]

Cray has been doing this for a while

Re:well duh

[Anonymous Coward]

WHY not. Sparc is GPL'd and people still buy Oracle software that runs on sparc platforms.

ARM supercomputers

[DontBeAMoran]

Remember over a decade ago when people were claiming that Apple replacing PowerPC CPUs for Intel CPUs would never ever happen?

We still have people here on Slashdot and on Mac-related forums claiming that Apple will never ever replace Intel CPUs with their own ARM CPUs.

We now have supercomputers built with ARM CPUs. Given Apple's love of computing-power-to-watts ratios, and their need to control as many parts of their hardware as possible, it's only a matter of time. ARM-powered Macs are coming.

Re:ARM supercomputers

[iggymanz]

You mean we have ARM based supercomputers planned or being built.... are there any running yet?

Re:ARM supercomputers

[DontBeAMoran]

Funny, but I remember the exact same predictions 5 years ago. Also 10 years ago. It's always "ARM is coming, real soon now!!"

Except that 5 or 10 years ago, Apple didn't have ARM CPUs powerful enough to hold their own against Intel's i3/i5/i7 CPUs. And now they're designing their own, custom-made for their needs. And seeing the low-power, low-end CPU they're using in their MacBooks, Apple could swap to ARM tomorrow and the MacBook computing power would actually increase while lowering the cost.

And ARM computers are important because watt-for-watt, ARM will give you a laptop that lasts a lot longer on the same battery, giving the chance for Apple to either make a laptop that still runs 10 hours on a single charge while lowering the cost and weight, or making a laptop with the same battery and weight that will run for 20 to 30 hours.

Re:ARM supercomputers

[DontBeAMoran]

Sure there are! Haven't you seen the new amazing cluster of 16 Raspberry Pi Zero?

Re:ARM supercomputers

[iggymanz]

my beolwulf cluster of old cell phones can kick its ass, if I can find all the chargers

Re:ARM supercomputers

[serviscope_minor]

Maybe you're right, but not for the reasons you state:

We now have supercomputers built with ARM CPUs.

Yes, but we also have SPARC powered supercomputers and we haven't had SPARC laptops since Tadpole in the 1990s. What makes for a good supercomputer and a good laptop are quite different things. Part of what makes for a good supercomputer is a fast, very wide floating point unit. But even more, supercomputers live and die on the interconnect. One thing you'll notice is that The Riken, stil very competetive and #1 on some benchmarks has an on die interconnect. Those things add up to making a good supercomputer.

What makes ARM useful in this regard is that it's a flexible enough design that they can add on their fast, wide vector FP unit and the interconnect, not to mention a fast, wide memory bus, but no longer have to maintain a now ageing CPU core.

  In the other direction, Intel are already targeting the power balance for laptops. So, it doesn't mean we won't see ARM laptops, but the fact they're good for supercomputers has little bearing.

Re:ARM supercomputers

[Anonymous Coward]

So, aside from pulling a bunch of numbers out of your ass, what else have you got?

Ah, here we go. "...giving the chance for Apple to either make a laptop that..." No. Someone isn't paying attention. What Apple will do is to produce a laptop as thin as a sheet of paper with no change in battery life. That thin laptop will have the highest rate of service returns ever due to bending issues, it will lack any ports at all except for a proprietary Apple Universal Socket (Courage!), and it will sell for the Amazing Low Price of $9,999. It will sell by the millions to the Apple faithful!

Sure, I'm making that up. So are you.

Re:ARM supercomputers

[Anonymous Coward]

I need to amend my comment above. Looking through /. history, I have found a second ARM supercomputer, again proposed and under construction.

https://it.slashdot.org/story/18/06/18/218228/hpe-announces-worlds-largest-arm-based-supercomputer

Beyond that however, my conclusions remain unchanged. The GP's assertion that there is:

1). A tidal wave of ARM supercomputers coming;
2). It is now "only a matter of time" until Apple uses ARM in their laptops.

Neither assertion stands up. And it is patently ridiculous to make definitive statements about how a couple of supercomputer demo projects will inevitably lead to a specific Apple tech deployment. If that were true then we'd all be running vector processors at the consumer level, since vector supercomputers were all the rage in the 1970's.

Guess what didn't happen? Consumerization of vector processors.

Can we please stop with this outdated joke?

[DontBeAMoran]

Nothing can run Crysis.

ARM supercomputer?

[Anonymous Coward]

For PlayStation 6?

It's hard how to success a combination of an ARM-supercomputer and a GPU.

Misleading headline?

[Anonymous Coward]

The headline implies that Fujitsu will no longer commercially produce computers with SPARC CPUs. The summary only talks about a supercomputer which will use the Arm8A-SVE. Not good form.

How expensive are one of these systems?

[Anonymous Coward]

I have never actually been able to find pricing or used Fujitsu Sparc systems in the US. Given that they were the last performant developers of SPARC processors, unless the open source community buys off the IP or something, I don't forsee them being developed further. A sad time for an ecosystem that truly needs more diversity rather than less.

Re:well duh

[Anne Thwacks]

WHY not. Sparc is GPL'd and people still run OpenBSD on Sparc systems.

Looks like a Borg component

[mnemotronic]

You will be armsimilated. All your Linux are belong to us.

Re: The Truth About Reverend Al Sharpton

[Anonymous Coward]

I just don't know what the chuff you've been smoking son but damn I want some. Lol.

Why ARM? Why not PowerPC or MIPS?

[Anonymous Coward]

The ARM architecture started out as a small, simple architecture, for small microprocessors, which could be thrown into SoCs. ARM has been coming up with all sorts of modifications to the architecture, to expand it into larger roles. Why not use a somewhat popular architecture, which is already big, like PowerPC, on the IBM side, or MIPS, which was in Silicon Graphics big computers.

Re: Why ARM? Why not PowerPC or MIPS?

[Anonymous Coward]

It started out as a processor for desktop computers (Acorn RISC PC). That got steamrolled by the Wintel monopoly, but the architecture turned out to be really good for power-challenged mobile devices (where Microsoft and Intel have both consistently failed miserably)

Re:Why ARM? Why not PowerPC or MIPS?

[Anonymous Coward]

I guess because recently SoftBank purchased ARM Holdings ?

That's a terrible chipset, not the good one

[davecb]

That was the glow-in-the-darek, go as fast as possible, not-parallel-enough Intel-like kludge. if you want a good SPARC, look at the T5. The T5 was small, cool, heavily parallel and utterly not what Oracle wanted (;-))