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Samsung Chips Will Get Faster and Easier on Your Battery in 2020 (cnet.com)

Processor progress is harder to come by these days, but Samsung says it'll build chips next year that will give you a bit more battery life or a little more speed. From a report: Through improvements charted by Moore's Law, chip electronic components called transistors get steadily smaller. On Monday, Samsung said it's taken the next step along the Moore's Law path, shrinking a transistor measurement to 5 billionths of a meter -- 5nm -- from 7nm. To get some idea of just how teensy that is, about 2,000 would fit end to end across the width of a human hair. The new petite size means the Korean company will be able to add more electronic abilities to its chips. It also means the chips will get either a 10% speed boost or a 20% savings in power. The development could help not only Samsung, which builds the Exynos processor for its own phones, but also Qualcomm and other companies that rely on Samsung's foundry business to build their chips.

41 comments

  1. Removable batteries? by fbobraga · · Score: 1, Interesting

    If yes, take all my money!

    1. Re:Removable batteries? by tiberius0 · · Score: 1

      Don't worry, in another ten generations of product releases, the batteries will last at least twice as long as the product ever will ;)

    2. Re:Removable batteries? by RhettLivingston · · Score: 1

      Don't worry, in another ten generations of product releases, the batteries will last at least twice as long as the product ever will ;)

      Extrapolating the rate of deterioration in consumer appliance and device reliability from the past four decades forward, that will happen even with zero improvement in battery technology.

    3. Re:Removable batteries? by NFN_NLN · · Score: 1

      > Don't worry, in another ten generations of product releases, the batteries will last at least twice as long as the product ever will ;)

      These energy efficient chips will allow phone manufacturers to create even thinner batteries. These ultra thin batteries will need to work even harder and go through ever more charging cycles decreasing the life of the battery and ultimately the run-time of the phone.

  2. Great job, advertisement boffins. by Anonymous Coward · · Score: 0

    Thanks for explaining nanometers, that really makes this basic, boring and otherwise pointless Samsung advertisement worth reading. (/S)

  3. The problem isn't the CPU by EmagGeek · · Score: 5, Insightful

    The problem isn't the CPU. The problem is all the Apps that insist on running constantly in the background, using GPS and other tracking sensors to spy on you.

    I have a Moto G4 and I couldn't figure out why the battery was only lasting 6-8 hours. One day I finally quit Facebook and uninstalled the Apps for Facebook and Messenger, and voila! Now I get 24+ hours of battery life easily.

    Get app developers under control and you get battery usage under control.

    1. Re:The problem isn't the CPU by fbobraga · · Score: 1

      the batteries of my Galaxy S5 with lineageos.org, if in stand by, lasts more then 24h... (and with removable batteries!)

    2. Re:The problem isn't the CPU by EmagGeek · · Score: 1

      I am currently running Lineage on the G4 but it is no longer supported it seems. I also have a Moto G6 running AOSP 9.0 Treble and an old OPO still on Lineage OS, not sure which version... The OPO was a really promising phone except for the cheap radio they put in it that doesn't do many LTE bands.

      When I switched to Ting I had to get the Moto because the OPO can't pick up T-Mobile anywhere.

    3. Re:The problem isn't the CPU by Ogive17 · · Score: 1

      I had to turn off wifi for my phone. At home when I'm sleeping, the battery would drain 40%. Wifi off, it only drops 2-3%. I hate to think what my phone is doing when idle and connected to wifi. I have auto-sync to the cloud turned off (any pictures/contacts that are meaningful are backed up my own way)

      I've scanned my devices and do not believe my network is compromised but I'm far from an expert.

      --
      "Action without philosophy is a lethal weapon; philosophy without action is worthless."
    4. Re:The problem isn't the CPU by thegarbz · · Score: 1

      You talk about spying and then mention apps which have core features that rely heavily on push notifications / constant server connections, and despite your assertion imagine a world where you could get the functionality you clearly voluntarily used AND get good battery life.

      In other news, I turned my smartphone dumb and I get much better battery life now!

    5. Re: The problem isn't the CPU by Anonymous Coward · · Score: 0

      That is super shady. 40 percent in 8 hours, it's doing something.

    6. Re:The problem isn't the CPU by Anonymous Coward · · Score: 0

      sometimes dumb is smarter.

    7. Re:The problem isn't the CPU by Anonymous Coward · · Score: 0

      Check the build guide, https://wiki.lineageos.org/devices/athene/
      It is still supported. I just made a build of a much older phone (was just downloading update before) It is easy if you know linux.
      For me the hardest part was figuring out which lib I needed on my own distro because was different than from ubuntu ones.

      I intend to do more test to bump the version from 14.1 (currently) to 15.1 I think I might work.

  4. Where's Intel? by Anonymous Coward · · Score: 0

    Meanwhile Intel is still struggling at 14nm. They used to lead the market. What happened?

    1. Re:Where's Intel? by Anonymous Coward · · Score: 0

      They got fat in monopoly and shit the bed inescapably. Now it's all bed sores and trying to febreeze the room so the maid doesn't notice.

  5. OK by Anonymous Coward · · Score: 0

    Okay

  6. wrong by Anonymous Coward · · Score: 0

    A human hair is 100k nanometers wide; that means 20k of these would fit across one, not 2k.

    1. Re: wrong by Anonymous Coward · · Score: 0

      This. 80 or more microns not 2.

  7. Chips should be faster by theheavenbeauty · · Score: 1

    Currently i don't like samsung phone because of higher rates and low specs they should improve their chips, i mean processing time and all and even battery life. Most of the samsung mobile phone have Battery issue so that should be fixed from upcoming smartphones. Anyone great post thank you for uploading this.

    1. Re:Chips should be faster by Anonymous Coward · · Score: 0

      "Anyone great post thank you for uploading this." - Are you undergoing roadside brain surgery? This is a joke advertisement wrapped in Moore's law like it's news.

      Samsung phone idiots will always be Samsung phone idiots regardless of nanometers. If you want to pay $1000 more for 10% more whizbang, you're double the idiot.

    2. Re: Chips should be faster by Anonymous Coward · · Score: 0

      Blatant spam.

  8. 5nm is NOT a true process by Anonymous Coward · · Score: 4, Informative

    5nm, of course, is just a tweak of the 7nm process- where only certain chip elements have the smaller size. The power and or clock improvements are real.

    Samsung competes with TSMC, which has its 7mn+ process coming later this year to same effect.

    The real story is not this nonsense, but the issue of EUV (use of ultra-violet wavelengths with masks) and possibly larger wafers. Both these techs have been delayed for a decade now, cos of fundamental issues. Intel has crashed and burnt over both, having now the WORST process tech amongst the giants.

    EUV is currently used as little as possible, and only on layers where trad wavelengths can no longer be forced to give improvements. No fab has proven the feasibility of going full UV, even after 15 years of research in this area by the tool makers.

    Current 7nm has two tweaks available for minor improvement- and this article talks of one of these tweaks. After both tweaks have been rolled out, a wholly new process is going to prove to be insanely expensive and difficult, and is probably FIVE to ten years out.

    AMD's answer is CHIPLETS- lots of smaller chips sitting on the same substrate- so a 'chip' is improved by using more chiplets. AMD's new Zen2/Ryzen 3 release in a few months time is a chiplet design, where 4 chiplets (CPU or GPU clusters) can sit around the same I/O chiplet.

    PS as process shrinks finally end (we don't know how many more we have left, but they will have exponentially longer gaps between each new process to come), there is another option. Circuit improvement. Current circuits are usually sub-optimal, being cheaply placed by very poor chip CAD software that is designed to make the chip design process EASY, not good or efficient.

    By allowing far better CAD algorithms, of Human input from 1st class Human circuit designers, a current process could probably see a 2-5 times improvement in many areas. With a tweaked 7nm being around for maybe as long as 10+ years in the worst outcome, there is loads of opportunity for superior circuit design to provide significant improvements (the very reason Apple now designs its own chips).

    1. Re:5nm is NOT a true process by thegarbz · · Score: 2

      By allowing far better CAD algorithms, of Human input from 1st class Human circuit designers, a current process could probably see a 2-5 times improvement in many areas. With a tweaked 7nm being around for maybe as long as 10+ years in the worst outcome, there is loads of opportunity for superior circuit design to provide significant improvements (the very reason Apple now designs its own chips).

      I call bullshit on this last part. If there was a 2-5x speed improvement to be had by optimising by human experts we would be having those. I mean how many experts in the world would we need? There's only a few major players in this market and I guarantee you they aren't mashing the autoroute key and calling it a day.

    2. Re:5nm is NOT a true process by radarskiy · · Score: 1

      "If there was a 2-5x speed improvement to be had by optimising by human experts we would be having those. "

      Except when the next process was coming in two years, you work on that because it halves your marignal cost so you never get the opportunity to do the one-time non-recurring engineering for design and process improvements. For the lead vehicle on an Intel process, for example, there was typically less than 1Q to tape-in once test chip data was available.

      You can't choose to slow down to do that work because your competition will just beat you to market with whatever they can get working on their process. Now, everyone has to slow down their process shifts so doing design refinements becomes viable.

    3. Re:5nm is NOT a true process by SoftwareArtist · · Score: 1

      AMD's answer is CHIPLETS- lots of smaller chips sitting on the same substrate- so a 'chip' is improved by using more chiplets.

      Chiplets are not an alternative to using a smaller process. They don't make your processor any faster or more efficient. A chip made up of chiplets doesn't work any better than a single larger chip.

      There are two reasons that chiplets are useful. One is that you can mix different processes. Use a very expensive 7nm process for the performance critical parts of the chip, and a cheaper 12nm process for the parts that don't matter that much. The other is that it helps your yields. If you split a big chip up into four chiplets and there's a defect in one, you only have to throw out one of the four chiplets, instead of throwing out the whole chip.

      Chiplets make it less expensive to move to a new process. But you still need to get that process working.

      --
      "I'm too busy to research this and form an educated opinion, but I do have time to tell everyone my uninformed opinion."
  9. Marketing and manufacturing capability.. by willy_me · · Score: 4, Informative

    The quoted manufacturing capability is no longer accurate. It is now artificial. Back in the day, a 65nm process was indicative of a manufacturing process that could create features with a minimum pitch of 65nm. Then people started to create FinFET transistors - a process that allows for denser transistors. But how to sell such a process? The answer is to call it a 0.6*65nm process -- when it is actually still a 65nm process. The idea is that the new FinFET transistors result in the same transistor density that would have been achieved with traditional transistors and a 0.6*65nm process.

    So the quoted pitch is now an indicator of transistor density -- sort of. Marketing also has a say so one should not read too much into it. Smaller is better but only for the same fab. It is not a good metric for comparison between fabs.

    NOTE: The 65nm and 0.6 numbers are just for this example. Actual values will differ. I believe 14nm parts use a 22nm process - but one should verify if you want exact numbers.

    1. Re:Marketing and manufacturing capability.. by SemiChemE · · Score: 2

      Your description isn't terribly accurate either. Back in the days of planar semiconductors, the process node (eg. 45nm, 32nm, 22nm) referred to the minimum feature size, which was also at least approximately the minimum gate length. There are other features, particularly some metal line widths in the Back End Of Line (BEOL) that were also close to the nominal node size. The problem in modern technology is that as you scale down the gate length, short-channel effects, particularly Drain Induced Barrier Lowering (DIBL) begins to dominate. This effect degrades transistor performance, such that it is no longer practical to scale gate lengths much below ~20nm. We could easily print 7nm gates, but the resulting devices would be power hungry, hot and slow, not exactly the combination anybody wants!

      Now having said that, some gate scaling is still possible, but whereas in the past, gates were routinely scaled by ~30% between each node, today gate scaling is on the order of a few percent and even that requires a lot of work to optimize the device junctions, so as to constrain DIBL. Nevertheless, there are still gains to be had by scaling other aspects of the device. Moving to Finfets, where the gate wraps around a "fin" of silicon provides two advantages. First, the fin itself has a vertical dimension, which corresponds roughly to the width of conventional planar device. This means that if we want more current per unit area, instead of widening the transistor, we can make the fin taller (within limits). So, we are kind of scrunching the transistors into a smaller space. The other and perhaps more important advantage is that because the gate wraps around a very thin fin of silicon, it has better control of the silicon channel, reducing DIBL and other short channel effects. Thus, thinning down the fin provides not only a density benefit, but also a performance benefit.

      In today's technology nodes, the smallest dimensions no longer correspond to the gate length, but they do correspond roughly to the fin size. As far as I'm aware, all of today's 7nm processes consist of Fins in the 6-9nm range. I believe there are also some metal lines that are of similar size, which helps in providing more flexibility in routing the connections between various circuits.

      Finally, regarding comparing technologies between fabs, the comparison is somewhat complicated by some specific design choices about the basic SRAM and Logic cells and how they are allowed to be connected. In particular, Intel's 10nm process, uses a very aggressive BEOL. This allows them to make small cells of comparable density to the 7nm process of Samsung and TSMC. By contrast, Samsung and TSMC have a relaxed BEOL, so they sacrifice some density, but retain a lead in the raw transistor performance. The end result is that intel's 10nm process and 7nm processes of their competitors are all very comparable.

  10. Can we get small phones again? by Anonymous Coward · · Score: 1

    The consumer wants tablet sized phones is a lie. Phones got bigger because there is no space for a battery that can keep alive a modern processor for a day.

  11. 5 nm node doesn't mean 5 nm transistors by hankwang · · Score: 1

    From TFS: "shrinking a transistor measurement to ... 5 nm -- from 7nm."

    These node names have long lost their correspondence to actual dimensions on a chip. For 7 nm (easier to find data on than 5 nm) the transistor density is 60-80 transistors per square m, about 120 nm for a square transistors.

    Source: https://en.m.wikipedia.org/wik...

    1. Re:5 nm node doesn't mean 5 nm transistors by Anonymous Coward · · Score: 0

      And don't forget 3d / layering. Even 14nm is more compact than 5nm if you layer it twice. The whole slashvertisement is amateur hour.

    2. Re:5 nm node doesn't mean 5 nm transistors by SWPadnos · · Score: 1

      And don't forget 3d / layering. Even 14nm is more compact than 5nm if you layer it twice. The whole slashvertisement is amateur hour.

      If the measurements are actually 14nm and 5nm (not market-speak that approximates them), you'd actually need 8 layers of 14nm to surpass one layer of 5nm. You get almost 8x as many 25nm^2 (5x5) features in an area of 196 nm^2 (14x14).

      --
      - The Sigless Wonder
    3. Re:5 nm node doesn't mean 5 nm transistors by Anonymous Coward · · Score: 0

      In a perfect layout that'd be true. It also forgets about the infeasibility of 3d stacking 14nm for CPU ~4ghz targets due to heat envelopes. (It was a loose hypothetical to illustrate a point)

  12. BetterBatteryStats & Wakelock Detector. by Anonymous Coward · · Score: 0

    They show you precisely what wastes your battery.

    You can then deinstall or reconfigure those apps, disable that hardware, or use an autostart manager, to disable certain services.

    Beware though, as
    1. some software will fall into an infinite loop, if an important service isn't available,
    2. others will do that too, if you blocked them from accessing a server (e.g. with a host file / name server ad blocker that does not run a dummy server), and
    3. If an app is killed or uninstalled while a wake lock is still registered, that wake lock will keep the phone active until it is fully rebooted!
    4. If it's you baseband system that is buggy and hanging, you can't do shit about it, unless you have a known good version of Android from your phone's vendor.
    5. You SIM card can be buggy, hang, and suck power TOO! An often overlooked fact.

  13. mewres lawr by Anonymous Coward · · Score: 0

    I had predicted that next year that smartphones would fill an entire two car garage and require the power of 1000 suns to operate but guess what I was wrong!

  14. You meant EUV = *extreme* UV. by Anonymous Coward · · Score: 0

    Because reguar UV has already been used for a long time, no?

    Also, my bet is on entirely new techiques, like photonic cirquits or other sub-atomic exotic materials.
    Especially when combined with high-temperature superconductors.

    I mean we are already in the range, where superconducting CPUs would be not cheap to run, but definitely feasible. Offering clock speeds and efficiencies (minus the cooling, of course) unfathomable before.

    And from what I can tell, we already havd most photonic cirquit building blocks.

    1. Re:You meant EUV = *extreme* UV. by Anonymous Coward · · Score: 0

      I thought the move from silicon to diamond was the next step. Not that I know anything.

  15. I disagee. And I agree. by Anonymous Coward · · Score: 1

    My main beef is with tiny keyboards and buttons. Much smaller than a human finger. And resulting cancers like autocorrect.

    My second beef is the lack of information displayable at the same time.

    And my third beef is phones so large that I can't hold one and type with the same hand, and that it does not fit in my damn pocket!
    While being pointlessly thin.

    I already buy thick rugged phones (Thanks Shenzen!), so breakage and battery life are no issues for me.

    And I *hate* folding phones!
    Flip phones already were annoying.
    (Hell, screen unlock is retarded nowadays! Noka 5800's unlock was *perfect*! A small mecanical ridged slider on the side, that you pulled down and released. To lock or unlock. With a spring strong enough to never ever unlock accidentially, no matter you pocket's border or contents.)

    What I want is all of that in one!
    A big high-res viewport from a small device. And a big physical keyboard opening up on slide-unlock, faster than Android's current unlock.
    And yes, that *is* possible.

  16. To get an idea of just how large that is ... by Anonymous Coward · · Score: 0

    ... a human red blood cell is typically less than 10 um in diameter at the widest point.

    In other words you could lay approximately 50 human red blood cells end-to-end along a single 5 nm transistor.

    We're making great progress but don't close your eyes to vacuum tube technology or others which have the potential to bring us down another order of magnitude over the coming centuries.

    1. Re:To get an idea of just how large that is ... by Woeful+Countenance · · Score: 1

      ... a human red blood cell is typically less than 10 um in diameter at the widest point.

      In other words you could lay approximately 50 human red blood cells end-to-end along a single 5 nm transistor.

      1 micrometer is 1000 nanometers, so a blood cell 8 um in diameter would be 1600 times as wide as a 5-nm transistor (if a 5-nm transistor were actually 5 nm in width).

  17. Rubbish reporting by Tough+Love · · Score: 1

    Any self respecting geek knows that the 5nm process node name bears hardly any relation to transistor dimensions, or any other dimension. In fact, the spacing between metal traces in Samsung's so-called 5nm process is somewhere around 32nm, the public not really knowing for sure because Samsung has not yet released details of this node.

    The real news is, the near-complete break with deep UV in favor of EUV. And as we all know (right?) EUV photolithography is still not ready for prime time. Last I heard, there is no good way to protect the photomask from being degraded by dust particles, in other words, the pellicle problem. Without this, production volume will be seriously degraded, yields will be low, and parts prohibitively expensive. This isn't the only open question about EUV, just the most glaringly obvious one. It's hard to know everything that goes on in the secret research labs of course, but I'm going to call BS on 2020 EUV high volume production. Sample parts, maybe.

    7nm is going to be the reigning node for quite some time, I'm afraid.

    --
    When all you have is a hammer, every problem starts to look like a thumb.