...On a floppy, somewhere among the thousands in boxes on the floor of my room. Star Control in team vs. team mode is pretty much SpaceWar only better, though:/. I still have that on floppies somewhere, too.
Actually, it would be interesting if they got Linux going on the StrongARM. Linux on the Newton... Or any Linux Handheld/Wearable
Interestingly, there's a prof at the University of Toronto who walks around with a wearable computer running Linux and has a number of projects going with similar devices. Most readers here should like him, as he habitually refers to certain Microsoft products as "Virus95" and "VirusNT".
More information can be found at http://www.wearcomp.org/.
I'm a bit worried about this. Corel's software is less than wondrously stable. Hopefully this will be confined to their applications, as opposed to any modifications that they make to the kernel.
Two keyboards would probably be harder to do.
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Wouldn't it be easier to wire the output of two keyboards together, a full one on each side?
That would probably be more difficult to make, ironically. Specs for the signals being sent are reportedly very difficult to actually find, and I strongly suspect that there is state information stored in the keyboard, which means messy synchronization between them. In my younger days, I installed my own int 9 handler on an x86, and was amazed at the strangeness that came down the line (multiple codes encoding certain single keys, among other things).
By all means go for it if you want to, but I'd probably stick to soldering if I were to do this myself:).
Depending on the setup, two USB keyboards might be an option. You might be able to get away with just writing a custom driver to merge the input streams and duplicate the output stream.
The workstations were originally huge and were used for high end stuff until recently but the fact that a kids game system can perform the same amount of calculations if not more then a 25,000 system is an embaresment. TOdya's workstions are only a few grand thanks to less engineering and more common snense and better technology. To day a workstation cost under 10,000.
Neither a kid's game system nor a PC can do the work of a true workstation. Go to http://www.spec.org for performance figures for PCs, workstations, and servers. Go to, oh, http://www.sgi.com for information on what a really good rendering box can do, and how much it costs. Go to http://www.3dlabs.com for information on what a really good graphics card (the kind used in rendering boxes) can do. Vastly more powerful than a game box or a PC, and vastly more expensive, due to demand and the economies of small-run production.
Again, I must remind the non-US readers of/. that in the US we have been brought up to understand the word, "Communisim" as a synonym for "bad" or "bad for you/us".
And by this logic, the correct definition of "hacker" is...
That doesn't mean that I support the idea of the government of any country being able to put back doors in Joe Average's computer system. However, they do seem to have a good grasp of the problems that easily available strong encryption pose to law enforcement.
As far as I can tell, the sections deleted fall into two categories:
Admitting that competent criminals can easily use encryption that their government can't break. This is true. There isn't much that they can do about it, and they know it, but they'd rather not proclaim this to the masses at large, because a large fraction of the criminal population is lacking in common sense and won't clue into the need to use this for a while if left alone. That still leaves the competent criminals, of course.
Asking for the power to legally break into peoples' computer systems and to bug commercial programs to echo data back to them. I tend to agree that this might be the only practical way to monitor encrypted communications and so gain incriminating evidence. However, I have doubts about it being worth the cost in practice (it's too easy to abuse this power, which means that eventually the intelligence agency would). The fact that the Australian government was reluctant to release this information shows that they know how well this would fly with the public.
Anyone reasonably competent could figure out the above on their own, so it's not really secret. What this document says to me is that the agency writing it _was_ reasonably competent, and realizes that it's up the creek.
No consumer level ( 3DLabs gamma chip doesn't count) 3D Geometry hardware is announced by any of the major players so if you expect to see anything shipping in 99 I think you are dreaming. Just look how long it took 3DLabs, NVidia, ATI,... to ship the latest chips after they were announced.
Geometry acceleration will almost certainly start showing up by 1H00, when 0.18 is in full swing and another round of cards show up, and may be showing up in 2H99 with the current round of new cards. Which you believe depends on the veracity of the rumour mill and the competence of the card manufacturers.
Putting geometry acceleration on the cards is a Good Thing from the graphics card manufacturer's point of view. This frees up the processor in CPU-limited cases, and frees up the bus if some of your models can stay resident on the card and just be transformed instead of reloaded. Card manufacturers have stated for a while that they want to put geometry acceleration on cards, and since the middle of last year have been saying that it will show up Real Soon Now (tm). Whichever manufacturers _do_ manage to get good geometry acceleration out there with good drivers will decimate the members of the competition who put out cards without acceleration, at least in the short term. It is in their interests to implement this as quickly as possible.
Now, the rumour mill. Rumours include, but are not limited to:
Matrox putting a general-purpose RISC core on one of their new cards coming out. They have the beginnings of this on the G200 already. Two Matrox cards are rumoured to be ready to ship, but tied up in NEC's fab lines as they work on the Dreamcast. One is the G400, rumoured to be a pair of G200s at 0.25 micron. One is the G300, which is an unknown quantity.
3DLabs putting one of their high-end geometry chips on some versions of the Permedia 3 card. This wouldn't hurt sales of their high-end cards, which are multi-chip, have vast amouns of RAM, and are in general designed to be better cards than anything on the consumer end.
Vague talk about the TNT2 having some geometry acceleration. As opposed to just being a shrink of the TNT to 0.25 micron. I'm doubtful of this one.
Take your pick, but it wouldn't surprise me if at least one of these turned out to be true, and these aren't the only cards coming out this year.
This also doesn't address the fact that for doing certain things ( wieghted meshes, physics,...) a geometry accellerator isn't going to help.
Quite true. However, there is enough geometry grunt work being done in most cases that a geometry accelerator would certainly help.
VME backplanes lining the basement of every home, and a card in every slot... O:)
I have actual uses for something like that, too. Now I just need to find a few hundred $million and fill my basement with xylene... O:)
For the flamers: Yes, I know that at least half of the cards will be RAM cards instead of processor cards, and I know that communications bandwidth will limit the classes of problems that I can use this for. Let me dream:).
I'm not quite clear here... if Intel wants KNI to become a new processor standard, and wants everybody to write software for it, wouldn't it behoove them to publish the instruction set themselves, not leave it to hackers to reverse engineer it???
It most certainly would, which is why the full instruction set manual is up on their web page in plain view for anyone who wants to look at it.
Ideally they'd have released it before the PIII launch, but now that the PIII has been officially released, it's definitely publically available.
Someone please correct me if I have made some mistake in my brief analysis.
Re. 3D graphics, you are most certainly correct. As of roughly 2H99, enough 3D graphics cards with geometry acceleration will exist to make SSE useless to the gamers who would otherwise have cared about it.
Re. 2D graphics, the situation here is a bit odder. 2D acceleration has existed for a while, but most image processing programs use software filtering for better control over the output. Filtering is one thing that AltiVec will be good at, so I expect to see a horde of Mac users proclaiming that the G4 is the ultimate in computing because it runs Photoshop five times faster than a PII. If your main use of your computer is image processing in Photoshop, I guess that's a good point. If your main use is Quake, then it will be less relevant.
I've been dabbling in rendering and ray-tracing for a while, but would be more interested in a cheap 8-way SMP system than a SSE system for the time being (regrettably, these don't seem to exist).
You've got a cable capable of sending a whole spectrum of light, so why wouldnt you divide it up into the different colors? The fact that dividing it up into different areas of the spectrum is a new idea and hasnt been utilized for years now almost disgusts me.
This is called "frequency domain multiplexing" and has been used for years with analog transmission. Some schemes of fiber transmission use it too.
However, it doesn't matter whether you transmit at a low data rate on several frequencies or at a high data rate on one frequency, because the physical effect is the same. When you modulate data on to a carrier, you blur out the carrier's frequency spectrum. The amount by which the carrier spreads out is directly related to the bandwidth/sampling rate of the data being modulated on to it. If you have a beam of light at, say, 600 nm (frequency 5.0e14 Hz), and modulate data on to it at 100 THz (1.0e14 Hz), your resulting beam will actually have its spectrum spread from (roughly) 4.0e14 Hz to (roughly) 6.0e14 Hz (about 500 nm to 750 nm.
So, in summary, you _do_ use a range of frequencies even when you are doing time-domain multiplexing on a single-frequency carrier.
...As that is when 0.15 micron hits the fabs. I saw 3 years quoted in the article that you reference, and no references to anything shorter (though it's possible that I just missed it).
I agree that I'm mainly nit-picking, but this whole E2k thing has me uptight about people talking about technology that isn't in production yet:).
Ok, seeing as there are now several posts giving different estimates, I'll explain where my estimate comes from, and what some of the limits to bandwidth for fiber and for optical data transmission come from.
The theoretical upper limit to data transmission using visible light can be estimated by considering the properties of the visible light beam that is carrying the signal. Treat the beam as a stream of photons. We'll call the "amplitude" of the modulated signal in any time slice the number of photons that arrive in that time slice. Due to the nature of light, the shortest timeslice that it is meaningful to define is the time required for the light to propagate one wavelength. Picking 600 nm for simplicity of calculation, that gives 5.0e14 time slices (and hence samples) per second.
Now, we have to figure out how many amplitude levels are available to us in each sample. The short answer is that we can stuff in as many as we want, but at an ever-increasing power cost. The measurement of the number of photons in a given sample isn't perfect. Even under the best conditions possible, the error will be roughly on the order of the square root of the number of photons transmitted. So, in order to get n data levels, we'll need about n squared photons per sample. The energy of each photon is equal to Planck's constant times the frequency of the photon, or about 3.3e-19 J. As we need 2^n levels to transmit n bits of information, the energy required per sample is (in the worst case) 3.3e-19 * 2^(2n).
Let's say that we want no more than about 10 watts of power dissipated in the worst case. This gives us 2.0e-14 J/sample, which means that 2^(2n) must be equal to about 60600. For simplicity, we'll bump the power up slightly and call this 65536 (2^16). This gives n=8. So, at something like 11 watts, the maximum data rate that can be achieved using a visible light carrier is somewhere in the realm of 4.0e15 bps.
You can get higher bandwidth by increasing the power, but this gets very ugly very quickly. Therefore claims of anything greater than this over a single fiber or single laser beam should be taken with a very large grain of salt.
In practice, this is not what limits the maximum data rate over fiber. As you modulate a carrier, you spread out its frequency spectrum. This means that your 600 nm laser beam, after being chopped up into sample elements and modulated, winds up not being purely 600 nm any more. For relatively low data rates, this isn't much of a problem. However, when the frequency of modulation approaches that of the frequency of the carrier itself, it starts becoming significant. An optical fiber, like any other optical medium, transmits different wavelengths at different speeds. This causes signals that are time-domain modulated to smear out, limiting the data rate that can be used. Similarly, a fiber's transmitting properties only apply over a certain frequency range. No matter what the modulation method used, the optical properties of the fiber will place limits on what can be reliably transmitted. Further, signal boosting for transmission over long distances is performed by feeding the signal into an erbium-doped fiber configured to act as a laser. This will have an even narrower range of operating frequencies than the fiber itself has.
I am not an expert on the optical properties of fibers or on erbium-doped fiber lasers. People with more knowledge re. this than myself have posted on slashdot already, and have given estimates in the range of 1.0e11 and up. However, the fundamental limits to optical data transmission remain very high, as illustrated above.
Carefull with that word, "limitless." Even fiber has a finite bandwidth, even if it is very large. I don't know for sure what it is, but since we can propagate femtosecond optical pulses in fiber, I would guess on the order of 10's of THz.
A week or two ago I posted an estimate on this based on signal processing; the ultimate limit for all techniques using visible light is on the order of 1.0e15-1.0e17 bps, which leaves plenty of breathing room.
In practice, the optical properties of the fiber will impose a more strict limit. Another person has posted an estimate in this thread (2.0e14 bps and up, IIRC).
For a more detailed description of where my estimate comes from, read through the posts on the "chaotic laser" thread (or select "User Info" above).
Can anyone with a K6-3, the spec benchmark code, and a good compiler give me Int and FP performance figures for the K6-3, and for an equivalently clocked P-II (2, not 3) with the same OS and compiler? AMD has historically had bad floating-point performance, and I'm curious to see whether this has changed with the K6-3. The article primarily hyped the cache architecture, which suggests that no other significant improvements were made.
I'm also curious to see how a K6-3 FP benchmark optimized for 3D-Now stacks up against a P-III (3) FP benchmark optimized for KNI. KNI has higher potential calculation ability, but it's open to question how effectively it can be used. However, these benchmarks will probably have to wait until Intel and AMD perform their own tests and submit them to spec.org.
0.18 micron will hit the fab lines in 2H this year, IIRC. 0.15 should hit about a year and a half after that, with volume processor fabrication a few months later. This chip isn't going to be on the market any time soon.
Yes, I know that IBM can fabricate things at 0.15 micron right now. They can probably do 0.13 for you if you ask nicely and pay large amounts of money. This is done using an electron synchrotron X-ray source and custom masks and processes. It can generate chips in research and proof-of-concept quantities, but is expensive and doesn't have the volume for actual production. Rest assured that many people, at IBM and elsewhere, are trying to figure out how to do volume production at those linewidths. However, don't expect it in the immediate future.
Also, IIRC Slashdot posted an article about an earlier version of this chip that you can have fabricated now, so this post shouldn't be a surprise to most people here.
It will also be nice to have Altivec, even in a worse case scenerio it will still be about twice as fast as Streaming SIMD, because it is twice as wide.
The width won't help much if you are performing operations that AltiVec isn't designed for.
Both AltiVec and KNI have considerable strengths. AltiVec, if I understand correctly, is optimized for DSP-style operations; multiply-accumulate and similar operations useful in filtering. KNI, if I understand correctly, is optimized for geometry operations, like componentwise multiplication of floating-point vectors. At something like signal processing or 2D image processing/filtering, AltiVec has a clear advantage. At something like 3D geometry processing or ray-tracing, KNI has the advantage. Which is more useful to you depends on what you are doing.
In practice, IMO AltiVec will speed Photoshop up some more and that's about it. IMO, KNI would have been useful a year ago for gaming but will now be useless because graphics cards will be able to do geometry transformations themselves. So, IMO neither is likely to be as big an advantage as their respective makers claim them to be.
Have you ever actually played the same game on both and overclocked Celeron and on a K6-2.
In the future, try reading my message before replying.
Tom of Tom's Hardware Page _did_ carefully benchmark several games on Celerons, K6-2s, and PIIs. The K6-2 loses by a fair margin. Go to http://www.tomshardware.com for the actual figures.
By Intels own admission, the Merceds x86 performance will not match a dedicated implementation.
the Merced will most likely be more extensible than the x86, will perform better than_the_x86_,
Sorry, I should have included the caveat:
A Merced chip running software written for the Merced will perform a task more effectively than an x86 running software written for the x86. A Merced running software written for the x86 will run more slowly than an x86 running software for the x86, as stated in my other message. The point is that RISCian programs can be written for the Merced, while old programs can still run.
The PIII probably says more about troubles ahead for Intel. The less than exciting improvements in the PIII vs. PII shows that the chip family is probably nearing the end of it's life. There's just not much more to squeeze out of that archetecture.
Intel has almost certainly known this for a while, but couldn't switch to a new architecture without losing their market share. Now, however, they've found a solution that works in their grand tradition of throwing silicon at problems.
The Merced chip has been in development for a while. It has very significant problems, but it is designed to be a completely new architecture with a somewhat more sane design. Intel has decided to avoid breaking compatibility with older chips by giving it all of the old x86 operating modes, in which the chip cripples itself to act like it has the x86 register set, and emulates the x86 instruction set (not a big step, as most x86 compatible machines break x86 instructions down into RISCian micro-instructions already for easier scheduling). The cost for doing this is extra silicon (higher price and lower initial chip yields), but that's never stopped Intel before.
A cleanly designed x86 clone will still do a much better job of running x86 code, and a cleanly designed RISC processor without x86 support cruft will still do a better job of running software in general, but Intel should be able to pull off this switch pretty effectively.
New code will run more quickly than it could on an x86 machine, and old code will still run, so IMO people will probably spring for the Merced.
Also, there are no current use for 3D in home or biz apps. Maybe games but the K6-2 and a 3D graphics card should beat the expensive PIII.
Check out Tom's Hardware Page for benchmarks. The geometry stage of the pipeline is still handled by the CPU, which means that floating-point is important, which means that the K6-2 loses. The best solution for gaming seems to be an overclocked Celeron (though Intel isn't going to like that any more than it likes the K6-2).
In theory, KNI should be very useful for 3D games. However, It will rapidly become a non-issue as geometry acceleration moves to consumer graphics cards this summer.
And I was under the impression that 3D gaming was one of the primary drivers of the consumer computing market nowadays. You don't need a PII-450 to run spreadsheets.
Once hardware vendors start releasing P3 optimized OpenGL and display drivers, we will see a teriffic performance boost from P3's. And no, I don't work for Intel, but I happen to be writing P3 optimized stuff right now, and believe me it's really something:)
About a 25% speed increase under real-world conditions, from what I've heard elsewhere.
This is definitely worthwhile, but it unfortunately won't mean much when graphics cards with geometry acceleration come out on the consumer market (this summer IIRC).
You must have a 3D solution before you have a fast 3D solution. When Intel or AMD accelerates all current OpenGL processes, then I'll take notice.
Actually, MMX and 3D-now have been supported for a while, and people have been working on KNI drivers for a little while also (the figures I've heard state a performance boost of about 25%).
Of course, as was pointed out, the graphics card will usually be better at accelerating graphics than the processor. KNI will be coming out just in time to meet graphics cards with geometry processing, which renders it useless.
MMX is very nice for accelerating 2D graphics operations. If I wanted to do, say, alpha blending of a 2D sprite in software, I'd love to use MMX for it. However, we've had graphics cards that do 2D acceleration for quite a while now. So, MMX is just used as a way to move memory around twice as quickly (it has 64-bit registers which can be loaded or unloaded in a single operation, as opposed to 32 bits per operation for EX).
3DNow is a nice solution for packing SIMD floating-point instructions into the old Intel register model. Unfortunately, this means that you can't operate on very many floating-point numbers at a given time, which makes real performance gains marginal (you have extra overhead for massaging the data into a form that can be readily fed into the new registers).
KNI is looking like a somewhat nicer solution, as Intel has the clout to introduce new registers and make software vendors support them quickly. However, it's still a bit cramped, and will shortly become useless when on-card geometry acceleration is introduced into the consumer market some time this summer.
So, while I agree that in the long term KNI won't amount to much, I think that you are incorrect about it and similar additions not being used.
Slashdot Mirror
...On a floppy, somewhere among the thousands in boxes on the floor of my room. Star Control in team vs. team mode is pretty much SpaceWar only better, though :/. I still have that on floppies somewhere, too.
Interestingly, there's a prof at the University of Toronto who walks around with a wearable computer running Linux and has a number of projects going with similar devices. Most readers here should like him, as he habitually refers to certain Microsoft products as "Virus95" and "VirusNT".
More information can be found at
http://www.wearcomp.org/.
I'm a bit worried about this. Corel's software is less than wondrously stable. Hopefully this will be confined to their applications, as opposed to any modifications that they make to the kernel.
That would probably be more difficult to make, ironically. Specs for the signals being sent are reportedly very difficult to actually find, and I strongly suspect that there is state information stored in the keyboard, which means messy synchronization between them. In my younger days, I installed my own int 9 handler on an x86, and was amazed at the strangeness that came down the line (multiple codes encoding certain single keys, among other things).
By all means go for it if you want to, but I'd probably stick to soldering if I were to do this myself
Depending on the setup, two USB keyboards might be an option. You might be able to get away with just writing a custom driver to merge the input streams and duplicate the output stream.
Neither a kid's game system nor a PC can do the work of a true workstation. Go to http://www.spec.org for performance figures for PCs, workstations, and servers. Go to, oh, http://www.sgi.com for information on what a really good rendering box can do, and how much it costs. Go to http://www.3dlabs.com for information on what a really good graphics card (the kind used in rendering boxes) can do. Vastly more powerful than a game box or a PC, and vastly more expensive, due to demand and the economies of small-run production.
And by this logic, the correct definition of "hacker" is...
I think I'll take cover now O:).
As far as I can tell, the sections deleted fall into two categories:
This is true. There isn't much that they can do about it, and they know it, but they'd rather not proclaim this to the masses at large, because a large fraction of the criminal population is lacking in common sense and won't clue into the need to use this for a while if left alone. That still leaves the competent criminals, of course.
I tend to agree that this might be the only practical way to monitor encrypted communications and so gain incriminating evidence. However, I have doubts about it being worth the cost in practice (it's too easy to abuse this power, which means that eventually the intelligence agency would). The fact that the Australian government was reluctant to release this information shows that they know how well this would fly with the public.
Anyone reasonably competent could figure out the above on their own, so it's not really secret. What this document says to me is that the agency writing it _was_ reasonably competent, and realizes that it's up the creek.
Geometry acceleration will almost certainly start showing up by 1H00, when 0.18 is in full swing and another round of cards show up, and may be showing up in 2H99 with the current round of new cards. Which you believe depends on the veracity of the rumour mill and the competence of the card manufacturers.
Putting geometry acceleration on the cards is a Good Thing from the graphics card manufacturer's point of view. This frees up the processor in CPU-limited cases, and frees up the bus if some of your models can stay resident on the card and just be transformed instead of reloaded. Card manufacturers have stated for a while that they want to put geometry acceleration on cards, and since the middle of last year have been saying that it will show up Real Soon Now (tm). Whichever manufacturers _do_ manage to get good geometry acceleration out there with good drivers will decimate the members of the competition who put out cards without acceleration, at least in the short term. It is in their interests to implement this as quickly as possible.
Now, the rumour mill. Rumours include, but are not limited to:
They have the beginnings of this on the G200 already. Two Matrox cards are rumoured to be ready to ship, but tied up in NEC's fab lines as they work on the Dreamcast. One is the G400, rumoured to be a pair of G200s at 0.25 micron. One is the G300, which is an unknown quantity.
This wouldn't hurt sales of their high-end cards, which are multi-chip, have vast amouns of RAM, and are in general designed to be better cards than anything on the consumer end.
As opposed to just being a shrink of the TNT to 0.25 micron. I'm doubtful of this one.
Take your pick, but it wouldn't surprise me if at least one of these turned out to be true, and these aren't the only cards coming out this year.
This also doesn't address the fact that for doing certain things ( wieghted meshes, physics,...) a geometry accellerator isn't going to help.
Quite true. However, there is enough geometry grunt work being done in most cases that a geometry accelerator would certainly help.
I have actual uses for something like that, too. Now I just need to find a few hundred $million and fill my basement with xylene... O:)
For the flamers: Yes, I know that at least half of the cards will be RAM cards instead of processor cards, and I know that communications bandwidth will limit the classes of problems that I can use this for. Let me dream
How does the cost of this quad PPC box compare with that of, say, an Alpha box of comparable floating-point capability?
It most certainly would, which is why the full instruction set manual is up on their web page in plain view for anyone who wants to look at it.
Ideally they'd have released it before the PIII launch, but now that the PIII has been officially released, it's definitely publically available.
The URL is http://developer.intel.com/de sign/pentiumiii/manuals/.
some mistake in my brief analysis.
Re. 3D graphics, you are most certainly correct. As of roughly 2H99, enough 3D graphics cards with geometry acceleration will exist to make SSE useless to the gamers who would otherwise have cared about it.
Re. 2D graphics, the situation here is a bit odder. 2D acceleration has existed for a while, but most image processing programs use software filtering for better control over the output. Filtering is one thing that AltiVec will be good at, so I expect to see a horde of Mac users proclaiming that the G4 is the ultimate in computing because it runs Photoshop five times faster than a PII. If your main use of your computer is image processing in Photoshop, I guess that's a good point. If your main use is Quake, then it will be less relevant.
I've been dabbling in rendering and ray-tracing for a while, but would be more interested in a cheap 8-way SMP system than a SSE system for the time being (regrettably, these don't seem to exist).
This is called "frequency domain multiplexing" and has been used for years with analog transmission. Some schemes of fiber transmission use it too.
However, it doesn't matter whether you transmit at a low data rate on several frequencies or at a high data rate on one frequency, because the physical effect is the same. When you modulate data on to a carrier, you blur out the carrier's frequency spectrum. The amount by which the carrier spreads out is directly related to the bandwidth/sampling rate of the data being modulated on to it. If you have a beam of light at, say, 600 nm (frequency 5.0e14 Hz), and modulate data on to it at 100 THz (1.0e14 Hz), your resulting beam will actually have its spectrum spread from (roughly) 4.0e14 Hz to (roughly) 6.0e14 Hz (about 500 nm to 750 nm.
So, in summary, you _do_ use a range of frequencies even when you are doing time-domain multiplexing on a single-frequency carrier.
I agree that I'm mainly nit-picking, but this whole E2k thing has me uptight about people talking about technology that isn't in production yet
The theoretical upper limit to data transmission using visible light can be estimated by considering the properties of the visible light beam that is carrying the signal. Treat the beam as a stream of photons. We'll call the "amplitude" of the modulated signal in any time slice the number of photons that arrive in that time slice. Due to the nature of light, the shortest timeslice that it is meaningful to define is the time required for the light to propagate one wavelength. Picking 600 nm for simplicity of calculation, that gives 5.0e14 time slices (and hence samples) per second.
Now, we have to figure out how many amplitude levels are available to us in each sample. The short answer is that we can stuff in as many as we want, but at an ever-increasing power cost. The measurement of the number of photons in a given sample isn't perfect. Even under the best conditions possible, the error will be roughly on the order of the square root of the number of photons transmitted. So, in order to get n data levels, we'll need about n squared photons per sample. The energy of each photon is equal to Planck's constant times the frequency of the photon, or about 3.3e-19 J. As we need 2^n levels to transmit n bits of information, the energy required per sample is (in the worst case) 3.3e-19 * 2^(2n).
Let's say that we want no more than about 10 watts of power dissipated in the worst case. This gives us 2.0e-14 J/sample, which means that 2^(2n) must be equal to about 60600. For simplicity, we'll bump the power up slightly and call this 65536 (2^16). This gives n=8. So, at something like 11 watts, the maximum data rate that can be achieved using a visible light carrier is somewhere in the realm of 4.0e15 bps.
You can get higher bandwidth by increasing the power, but this gets very ugly very quickly. Therefore claims of anything greater than this over a single fiber or single laser beam should be taken with a very large grain of salt.
In practice, this is not what limits the maximum data rate over fiber. As you modulate a carrier, you spread out its frequency spectrum. This means that your 600 nm laser beam, after being chopped up into sample elements and modulated, winds up not being purely 600 nm any more. For relatively low data rates, this isn't much of a problem. However, when the frequency of modulation approaches that of the frequency of the carrier itself, it starts becoming significant. An optical fiber, like any other optical medium, transmits different wavelengths at different speeds. This causes signals that are time-domain modulated to smear out, limiting the data rate that can be used. Similarly, a fiber's transmitting properties only apply over a certain frequency range. No matter what the modulation method used, the optical properties of the fiber will place limits on what can be reliably transmitted. Further, signal boosting for transmission over long distances is performed by feeding the signal into an erbium-doped fiber configured to act as a laser. This will have an even narrower range of operating frequencies than the fiber itself has.
I am not an expert on the optical properties of fibers or on erbium-doped fiber lasers. People with more knowledge re. this than myself have posted on slashdot already, and have given estimates in the range of 1.0e11 and up. However, the fundamental limits to optical data transmission remain very high, as illustrated above.
A week or two ago I posted an estimate on this based on signal processing; the ultimate limit for all techniques using visible light is on the order of 1.0e15-1.0e17 bps, which leaves plenty of breathing room.
In practice, the optical properties of the fiber will impose a more strict limit. Another person has posted an estimate in this thread (2.0e14 bps and up, IIRC).
For a more detailed description of where my estimate comes from, read through the posts on the "chaotic laser" thread (or select "User Info" above).
I'm also curious to see how a K6-3 FP benchmark optimized for 3D-Now stacks up against a P-III (3) FP benchmark optimized for KNI. KNI has higher potential calculation ability, but it's open to question how effectively it can be used. However, these benchmarks will probably have to wait until Intel and AMD perform their own tests and submit them to spec.org.
Yes, I know that IBM can fabricate things at 0.15 micron right now. They can probably do 0.13 for you if you ask nicely and pay large amounts of money. This is done using an electron synchrotron X-ray source and custom masks and processes. It can generate chips in research and proof-of-concept quantities, but is expensive and doesn't have the volume for actual production. Rest assured that many people, at IBM and elsewhere, are trying to figure out how to do volume production at those linewidths. However, don't expect it in the immediate future.
Also, IIRC Slashdot posted an article about an earlier version of this chip that you can have fabricated now, so this post shouldn't be a surprise to most people here.
The width won't help much if you are performing operations that AltiVec isn't designed for.
Both AltiVec and KNI have considerable strengths. AltiVec, if I understand correctly, is optimized for DSP-style operations; multiply-accumulate and similar operations useful in filtering. KNI, if I understand correctly, is optimized for geometry operations, like componentwise multiplication of floating-point vectors. At something like signal processing or 2D image processing/filtering, AltiVec has a clear advantage. At something like 3D geometry processing or ray-tracing, KNI has the advantage. Which is more useful to you depends on what you are doing.
In practice, IMO AltiVec will speed Photoshop up some more and that's about it. IMO, KNI would have been useful a year ago for gaming but will now be useless because graphics cards will be able to do geometry transformations themselves. So, IMO neither is likely to be as big an advantage as their respective makers claim them to be.
In the future, try reading my message before replying.
Tom of Tom's Hardware Page _did_ carefully benchmark several games on Celerons, K6-2s, and PIIs. The K6-2 loses by a fair margin. Go to http://www.tomshardware.com for the actual figures.
the Merced will most likely be more extensible than the x86, will perform better than_the_x86_,
Sorry, I should have included the caveat:
A Merced chip running software written for the Merced will perform a task more effectively than an x86 running software written for the x86. A Merced running software written for the x86 will run more slowly than an x86 running software for the x86, as stated in my other message. The point is that RISCian programs can be written for the Merced, while old programs can still run.
Intel has almost certainly known this for a while, but couldn't switch to a new architecture without losing their market share. Now, however, they've found a solution that works in their grand tradition of throwing silicon at problems.
The Merced chip has been in development for a while. It has very significant problems, but it is designed to be a completely new architecture with a somewhat more sane design. Intel has decided to avoid breaking compatibility with older chips by giving it all of the old x86 operating modes, in which the chip cripples itself to act like it has the x86 register set, and emulates the x86 instruction set (not a big step, as most x86 compatible machines break x86 instructions down into RISCian micro-instructions already for easier scheduling). The cost for doing this is extra silicon (higher price and lower initial chip yields), but that's never stopped Intel before.
A cleanly designed x86 clone will still do a much better job of running x86 code, and a cleanly designed RISC processor without x86 support cruft will still do a better job of running software in general, but Intel should be able to pull off this switch pretty effectively.
New code will run more quickly than it could on an x86 machine, and old code will still run, so IMO people will probably spring for the Merced.
Check out Tom's Hardware Page for benchmarks. The geometry stage of the pipeline is still handled by the CPU, which means that floating-point is important, which means that the K6-2 loses. The best solution for gaming seems to be an overclocked Celeron (though Intel isn't going to like that any more than it likes the K6-2).
In theory, KNI should be very useful for 3D games. However, It will rapidly become a non-issue as geometry acceleration moves to consumer graphics cards this summer.
And I was under the impression that 3D gaming was one of the primary drivers of the consumer computing market nowadays. You don't need a PII-450 to run spreadsheets.
About a 25% speed increase under real-world conditions, from what I've heard elsewhere.
This is definitely worthwhile, but it unfortunately won't mean much when graphics cards with geometry acceleration come out on the consumer market (this summer IIRC).
Actually, MMX and 3D-now have been supported for a while, and people have been working on KNI drivers for a little while also (the figures I've heard state a performance boost of about 25%).
Of course, as was pointed out, the graphics card will usually be better at accelerating graphics than the processor. KNI will be coming out just in time to meet graphics cards with geometry processing, which renders it useless.
MMX is very nice for accelerating 2D graphics operations. If I wanted to do, say, alpha blending of a 2D sprite in software, I'd love to use MMX for it. However, we've had graphics cards that do 2D acceleration for quite a while now. So, MMX is just used as a way to move memory around twice as quickly (it has 64-bit registers which can be loaded or unloaded in a single operation, as opposed to 32 bits per operation for EX).
3DNow is a nice solution for packing SIMD floating-point instructions into the old Intel register model. Unfortunately, this means that you can't operate on very many floating-point numbers at a given time, which makes real performance gains marginal (you have extra overhead for massaging the data into a form that can be readily fed into the new registers).
KNI is looking like a somewhat nicer solution, as Intel has the clout to introduce new registers and make software vendors support them quickly. However, it's still a bit cramped, and will shortly become useless when on-card geometry acceleration is introduced into the consumer market some time this summer.
So, while I agree that in the long term KNI won't amount to much, I think that you are incorrect about it and similar additions not being used.