They are identicle in features (dual channel) except the 939 lacks one pin. That pin just happens (wink) to be a HyperTransport link that was removed.
That is not at all correct. The two sockets are actually significantly different from one another. You can find a comparison of the two layouts of the two chips bellow:
As you can see looking at the pin-outs (pages 26 and 22 respectively) there are a LOT more than just one pin that has changed.
This means there are not enough links to support multi-processor setups because you can't have the links to the other processors because you don't have enough.
Dual-core chips don't use any external hypertransport links anyway, so this is a non-issue. Everything is handled inside the chip. As such, a dual-core Socket 939 chips is DEFINITELY possible, though whether it will actually happen or not is another question.
This is basically a marketing move to segment the workstation market from the desktop market. There is no (techincial) reason they couldn't have used socket 940 for dual channel desktop processors.
Actually there is a good technical reason why AMD introduced Socket 939 for desktop processors, they have a LOT more power and grounding pins. This allowed motherboard makers to design 4-layer motherboards using this socket while Socket 940 required more expensive 6 or 8-layer motherboards.
So if you chop a HT link off the Opteron, you get two. That should be enough to connect to the chipset and one other processor, right? Shouldn't a 939 be technically capable of dual processor configurations (although AMD has certainly disabled it)? Just wondering.
If you have a look at the pin-out diagrams you'll see that AMD has completely removed all the pins for two of the three hypertransport links and replaced them primarily with power and grounding pins on Socket 939 vs. the old Socket 940. As such there really and truly is only one hypertransport link on this new socket and it is not capable of classic SMP configurations.
However, as mentioned above, these dual-core designs are handle all inside the chip and only require a single HT link to the outside world, so they could certainly work in a socket 939 product. Whether such a product ever makes it to market or not is another question, though there are some hints that AMD might release a dual-core Athlon64 FX chip in socket 939.
The dual-core chips are, at least initially, going to be targetted at the high-end (and high-$$$) market, ie the server and workstation market where the Opteron currently competes. At least according to this roadmap though, AMD will also be bringing out a dual-core Athlon64 FX chip. This chip could very well be in a socket 939 format (presumably all Athlon64 FX chips going forward will use that platform).
Whoever wrote that article over at Anand was a bit confused or simply didn't bother reading up on this or even looking at their own pictures. If you look at the die photos it should be fairly easy to tell that there are *NOT* two memory controllers, just one. The memory controller and hypertransport controllers go around the outside of the main processor core(s) on the die. There's just one memory controller, 128-bits wide, just like in the single-core Opterons.
That memory controller might be updated to support DDR2 memory (this would fall into AMD's timeline for supporting DDR2), so we might see some extra memory bandwidth in that sense, but there will be no need for extra pins. AMD should have no trouble making this fit in Socket 940 as they have mentioned several times in recent interviews.
Of course it requires a few caveats, but it's mostly correct. The Opteron has a rather impressive level of bandwidth/processor and extremely low latency to that memory. The integrated memory controller REALLY helps here and I suspect that for over 95% of the cases AMD is correct that they could drop a second core into the picture and still get very good scaling without having to worry about memory bandwidth.
Ohh, and as for cache, that fortunately isn't a problem at all as each core comes with it's own 1MB of L2 cache (and of course it's own 128K of L1 cache as well). Combine that with the huge amount of I/O bandwidth they've got with Hypertransport and really the chip is well designed to accept a second core.
I would really like to be able to use them in my client installations but I can't really recommend them for anyplace that doesn't have 7x24 staff within hearing distance of any audible thermal alarms.
As mentioned in another post, the P4 clock throttling will typically not prevent the system from crashing, particularly with the latest and greatest (and rather power hungry) revision of the P4 except maybe if the system is still idle, and even than it's hit and miss. All it will do is give you a bit more time between when the "Fan is not working" alarm first goes off and when the system locks up.
I believe Sun and IBM (among some others) will sell you systems that really and truly CAN stay up and running after a fan failure. If your customers really need that level of uptime, perhaps they would be better served by one of those systems? (I'm actually being serious here, Intel and AMD systems just aren't designed with extremely high reliability and uptime in mind, such designs cost money).
I did learn that there are some MB's which will try to save the AMD CPU from cooking itself and that is encouraging.
This is now included on-die with the Athlon64 and Opteron chips, no more motherboard intervention required. Either way, all AthlonXP boards had this feature enabled, though it sometimes wasn't enough to save the chip if the heatsink was not installed in the first place (or yanked off a running system).
Still - I won't be recommending AMD for Aunt Tillie or my small customers until the AMD CPU's or virtually every AMD capable MB out there has some way of protecting the AMD CPU's from self destruction.
If all you're worried about is fan failures than you should be plenty safe with any AthlonXP or Athlon64/Opteron board. These boards have always shut down just fine if the fan fails.
Most of the stories about AMD chips frying themselves was pure fear-mongering and stupidity, or at the very least it was lazyness. A few people did fry their chips by failing to install the heatsink properly. I've installed a few AthlonXP heatsinks and they are not difficult at all, but apparently some people just slap the things on upside-down and backwards and killed their chips as a result.
Otherwise most of this started with a particular hardware review website that wanted to get MANY page hits (and they succeeded beyond their wildest imaginations) with a video of an AthlonXP frying itself because they yanked the heatsink off the thing while the system is running, while proceeded to show a faked shot of a P4 surviving the same exercise (read Intel's tech docs sometime and/or try running a chip consume 20-30W of power without a heatsink and you'll see why I say this test was faked). While very sensationlized and widely touted across the web, IMO the video did a great diservice to both AMD (people think their chips will fry themselves under anything resembling normal use) and Intel (people think their chips are invulnerable and will run with no cooling).
This feature caused some businesses I know to forgo choosing any AMD cpu, since it couldn't protect itself in the event of an unattended fan failure.
AMD processor will shut down if their CPU fan fails, just like pretty much all previous processors. Intel P4 chips MIGHT just throttle back, though according to Intel tech-docs they will only throttle down to 30% of their full speed at an absolute minimum, so it's quite possible that the chips will still be consume 20-30W of power. What that means is that the chip will still almost certainly crash under extended use and heavy workloads.
First question - does the clocking down feature really exist on Intel CPU's?
Yes. It's a nice little feature that can buy you an extra few minutes to shut down your PC in the event of a fan failure. On a system without this feature the processor would overheat and crash in fairly short period of time, probably 5 minutes or less, if the fan died. With this clock throttling feature it would probably take 10 to 15 minutes before the system locked up.
Does AMD have this feature yet?
Rumor has it that the Athlon64/Opteron die is capable of the same sort of clock throttling, but the feature has not been sufficiently tested yet and is not enabled. At least some of these new chips are using a second generation of the Athlon64 die and therefore *MIGHT* have clock throttling as a feature, but until it's actually tested, enabled and working, the answer to your question is no.
As a quick note: despite what you might see in some faked videos on some rather questionable hardware websites, a P4 will definitely *NOT* run at all without any heatsink at all! Do NOT try yanking the heatsink off your processor in the middle of running a Quake 3 Timedemo, it WILL crash and there's a good chance that you will damage the processor in the process.
Given that the memory controller in the Athlon64 is part of the CPU, doesn't it stand that memory settings and CPU settings are kind of one and the same for these chips?
Just remember, Itanium 2s do exist, but they are hardly something to benchmark a lot.
Itaniums actually are benchmarked quite a bit, probably more than their sales figures would justify. They are, of course, also not the only 64-bit chips out there. IBM's got their PowerPC 64-bit chips, SUN and Fujisu have their SPARC chips, HP's got PA-RISC, Alpha and even some old servers running 64-bit MIPS chips (their Non-Stop line)... just to name a few.
I would assume with a starting price of about 3 grand a chip
Not that far off the starting price if you count the high-end ones. Intel does sell a couple "workstation" Itanium2 chips for ~$750 or $1000, but they will only work in 1 and 2P setups. For a 4P+ setup the cheapest chips they'll sell you do indeed come in at around the $2500-$3000 mark, and the top-end ones will set you back over $5000... what's more, those are the prices from Intel! HP adds about a 50-60% mark-up to those prices for the chips they sell!
which is meant to be used in up to an 8-way configuration, probably about 3 people have them.
Itanium sales ahve been somewhat weak, last year they sold approximately 20,000 servers. Sales have picked up fairly consistently throughout last year and apparently are continuing to pick up this year, but right now it's still looking like the chip is largely just a replacement for HP's old PA-RISC servers and SGI's old MIPS servers.
And they can't run 32 bit code natively, it must be done in emulation.
My understanding is that these chips actually do have a full 32-bit x86 core included in the chip right alongside the 64-bit IA-64 core, however it turns out that it's faster to run things in emulation that to use the integrated core.
However, when the Itanium 2 is used in it's native 64-bit mode, without any 32-bit emulation, it would be worth the money.
Here's the real kicker though, often it's NOT worth the money! In many of the tests done so far comparing 64-bit Itanium to 64-bit Opteron, the Opterons actually come out ahead! It's often a tight race, and certainly the Itanium2 does win it's fair share of benchmarks, but it's definitely not the straight-up win that Intel would like to have us believe. These two chips are actually very competitive in terms of performance.
The big advantage that Itanium2 has is that it's well supported at the high-end by both HP and SGI, so where the Opteron is only available in up to 4-CPU servers you can plop down a few million and pick up a 64 to 256-CPU system with Itanium chips.
I fail to see how this is all that impressive. It's not like AMD *could* clock the Athlon64 up to 3.4GHz on a 130nm manufacturing process like Intel has done with their P4 chips. Nothing at all against AMD's process engineers, they are absolutely top-notch, but it's just that the two chips are designed differently.
Intel chose to get their performance by clocking their chips very highly, the classic "speed demon" design. AMD chose to get their performance by getting their chips to do more per clock cycle, more of a "brainiac" design. These two design philosophies are not exactly mutually exclusive, but there are trade-offs required for each. In the end, the only thing that really matters is which company made the best trade-offs between "speed demon" and "brainiac".
Right now it looks like that company is AMD, though keep in mind that the P4 was released nearly 4 years ago while the Athlon64 core is only 1 year old. Intel must be well on their way to bringing out their next generation core (typically released about 5 or 6 years after the last one first showed up) while AMD still has a ways to go with their core.
Same chip as a Athlon mobile, probably pin compatible.
Same chip, not pin-compatible. The Geode NX comes in a 453-pin chip and is designed to be soldered right onto boards. Socket-A uses 462 pins (if my memory is working right) and fits in a ZIF socket.
It is, however, electrically compatible, so it's fairly straightforward for a company to modify a product to use these new chips instead of the desktop Athlons.
Yes, but a 1GHz AthlonXP-M chip (basically what these Geode NX chips are) will run circles around an Efficeon running at 1GHz. The 1GHz Efficeon will typically give you performance in the same sort of range of a 500MHz AthlonXP.
Ohh, and the Transmeta chips are more expensive to boot.
Well, I'll answer you second question first because it's a quick and easy: Yes. Less power consumption == less heat. Your processor is not giving off any energy as noise and (hopefully) it's not glowing so it's not giving off any light energy. There might be a TINY fraction of energy given off as a signal on the bus, but for all practical purposes *ALL* energy consumed has to be given off as heat.
Now, to get back to the first question, the AthlonXP-M is available with power consumption of 25W, 45W or 62W TDP (Thermal Design Power), depending on the model you get.
These new products are rated at 9W TDP for the "1500@6W" model and somewhat higher for the 1750@14W model (the wattage listed in the chips model number is a "typical" wattage, while TDP is the maximum, hence the disparity in numbers).
Otherwise the processors are basically the same as the AthlonXP-M chips. Basically these are just "Low Voltage" and "Ultra-Low Voltage" versions of the AthlonXP-M chips, to use Intel's name for things. They are very directly competing with Intel's ULV Pentium-M chips that run at 1.0GHz and have a TDP of 7W. Performance and power consumption should be about the same, though the AMD chips sell for about 1/3 to 1/4 the price of what the Intel chips sell for.
As compared to desktop chips they consume quite a bit less power. Power consumption isn't quite such a big deal for desktop chips, so the numbers aren't pushed as much, but generally you're looking at 50-100W or more for a top-end desktop chip. AMD's AthlonXP 3200+ processor is rated for 76.8W.
Note that the definition of TDP (Thermal Design Power) varies from one chip to another. AMD defines the TDP of their desktop AthlonXP chips as the maximum power it will consume while running an absolute worst-case bit of code. They define their TDP for their mobile AthlonXP-M, mobile and desktop Athlon64 and workstation/server Opteron chips as being the maximum power consumption for any chip in that line (eg all of the "Low Power" AthlonXP-M chips are rated for 25W, regardless of clock speed, and all the "Mainstream" AthlonXP-M chips are rated for 45W, even though there is some overlap in clock speeds between the two lines).
Intel's TDP is defined slightly differently again. The Pentium-M and Celeron-M is defined much like AMD's desktop AthlonXP chips, ie absolute maximum power the chip can consume. The Mobile Pentium4-M is defined like AMD's mobile chips and their Athlon64/Opteron line, ie maximum for the line of processors. And then there's Intel's desktop P4 chips, which use a TDP that is kinda-sorta-almost the maximum power the chip will consume.
Ohh, and it just goes downhill from there. Don't even bother trying to figure out how Transmeta calculates the power consumption of their chips, because as best as I can tell they are just pulling numbers from a hat! Maybe there more info if you sign a bunch of NDAs as a developer, but from what I've seen on their website the actual power consumption of Crusoe and Efficeon chips seems to be firmly in the hands of the marketing department, not the actual specs.
I know that reading the article before posting isn't a very popular passtime, but if you had bothered takign the time you would have seen that your questioned is answered there.
The Geode GX is what AMD calls the system-on-chip Cyrix/National Semi product that was purchased a little while back. The Geode NX is the new Athlon-based chip. Basically the Geode NX is just an "Ultra Low Voltage" AthlonXP-M, to use Intel's name for things.
Transmeta's going to have to go a LONG way to getting either efficient or fast processors. Right now they are neither, just slow.
It's not even like their chips are really power efficient for the performance that they give, Intel's ULV Celeron chips will blow the Transmeta Efficeon out of the water in terms of performance and they do so with the same power consumption. VIA's got the same level of performance and power consumption as Transmeta's chips but with a MUCH lower price tag.
Basically all Transmeta has going for it is a bit of marketing. Their technology, while somewhat interesting from an academic point of view, really doesn't work very well. The fact that Efficeon's performance is still very weak may be the final nail in the coffin for Transmeta. These days you can scale nearly any chip down to the same power consumption that Transmeta offers, and Intel does just that with their Ultra-Low Voltage chips.
If anything is going to knock Intel out on the low-power side of things, it won't be Transmeta. More likely it will be something along the lines of an ARM processor... of course, Intel is probably the leading manufacturer of high-performance/low-power ARM chips.
It's not "desktops", but rather "retail desktops", and that is only a small portion of the market. Note that Dell doesn't sell ANY machines into the retail market, and the bulk of the desktops that HPaq sells are not sold at retail either.
Also the analyst that wrote the article clearly has a very short memory, because AMD had over 50% of the retail desktop market for several months in the earlier days of the Athlon.
As for the laptop market, AMD actually has a REALLY good product for the mobile market. While the Pentium-M might be the best choice, it's an *expensive* chip. AMD's AthlonXP-M manages nearly the same performance and in the same power consumption range. The only real advantage to the Pentium-M is that it's dynamic power-saving technology is a little bit better.
However, if you compare the AthlonXP-M to the Celeron-M or, worse yet, the Mobile Celeron (totally different chip from the Celeron-M), AMD comes out head and shoulders ahead for the same price. Since the Celeron-M has it's dynamic power saving technology mostly disabled and slightly lower performance than the Pentium-M (half the cache and lower clock speeds), the AthlonXP-M is both faster and consumes less power.
Just to throw some numbers at that hard drive stat of yours...
Mean Time Between Failures means the number of drive-hours between a hard drive failure within the warranty, ie it's exactly what we need to solve this problem. Low-end IDE drives have an MTBF of somewhere around 500,000 hours.
So, if we figure that Google has 78,000 servers, each with a single IDE drive (apparently that is how they have them setup), they should have 1 drive failure every 6.4 hours, or about 3-4 drives a day. Definitely a non-trivial amount, and obviously some days will be a lot worse than others, but certainly not hundreds per day, let alone thousands. Even if the MTBF is somewhat overstated and is only 300,000 hours you're still looking at single-digit drive failures per day on average.
You don't need any open hardware or any trash like that, the DRM stuff is implemented almost entirely in software. The only hardware portion is a secure "nexus", a portion of memory that can not be accessed by other applications.
There absolutely no good reason at all why DRM has to be implemented in any operating system just because the hardware supports it. If you ignore the feature (or, better yet, make use of it to improve security for sensitive applications).
Despite the tin-foil hat crowds comments, all of these TCP, NGSCB and Palladium technologies will NOT in ANY way prevent you from installing Linux or any other operating system you so chose. People primarily make these comments because they are morons who take/. stories as the word of God and don't bother reading the publicly available specifications.
For those that are actually interested in any fact, Intel's website has tons of info. The chip in question is actually almost never used in mobile phones, it's an XScale chip that is primarily used for PDAs. Nice little chip, 624MHz clock speed with only about 1W maximum power consumption, plus dynamic power saving technology.
The Top500 list uses Linpack exclusively for it's test. Linpack can be split to run on clusters VERY easily, it could even fall under the catagory of "embarassingly parallel" problems. These sorts of tasks do exist in reality, but they definitely aren't the only kinds of problems you'll encounter.
If you need to access remote memory in a super cluster, such as the ones mentioned above, you take a BIG hit in terms of performance. Think about running from swap space vs. running an application out of memory and you'll be on the right track. In these sorts of situations a system like that Cray down in slot 19 could easily beat out nearly anything above it on that list (almost all of which are superclusters except for Earth Simulator at #1).
As others have mentioned, the guy was clearly talking from a marketing standpoint rather than a "chose the best solution for the job" standpoint, however what he said isn't entirely without value. There are a lot of tasks out there where that Big Mac supercluster that people keep touting would suck-ass. Even with their high-bandwidth, low-latency infiniband interconnect you're still looking at a good 3 orders of magnitude lower performance for remote memory vs. local memory.
Uhh.. AMD developed hypertransport mostly on their own. Alpha Processor Inc. had a small hand in it, not DEC/Compaq. EV7 uses a processor interconnect that achieves a similar goal, but they are definitely not the same bus and AMD most certainly did not just license and enhance an DEC/Compaq bus.
Hypertransport runs natively at a WIDE range of speeds. It's a unidirectional point-to-point bus capable of running at 2-bits up to 32-bits and from 100MHz up to 800MHz (200MT/s and 1600MT/s DDR) and beyond for the next revision of the specification. Data rates can range from the fairly low 50MB/s right up to 6.4GB/s.
Hypertransport doesn't really have that much to do with memory latency, the integrated memory controller is what is responsible for the low-latency memory. Hypertransport allows for low-latency I/O, some of which could be memory I suppose.
As for the 256KB of L1 cache, I have not heard any plans about that, but it's definitely not in the works for the K8 core. Maybe for the follow-up K9 core to be released in 2006, though I wouldn't hold my breath on that one if I were you. Shrinking die sizes are more likely to result in larger L2 caches, not larger L1 caches.
Why in the hell would AMD do something so incredibly stupid as to buy Transmeta? Transmeta's chips might not consume much power, but their performance absolutely STINKS! Compare the fastest Transmeta chips to Intel's 800MHz ULV Celeron and the Intel chip has lower power consumption AND better performance, all from a smaller die (cheaper to make, though the selling price might be different).
Transmeta's product line is VERY weak. The only company they are really competitive with is VIA, who produce slightly faster processors that consume the same amount of power. Of course, VIA sells their chips for about 1/4 of what Transmeta sells for. The only reason why Transmeta sells anything at all is that they got some marketing hype behind them.
Intel playing catch-up to AMD IS big news, not because it's illegal (it isn't) but because it has always been the other way around.
It hasn't "always" been the other way around, especially not in recent years. If you look at some recent innovations in x86 chips, AMD has been right up there. AMD introduced 3DNow! before Intel brought out their similar SSE instruction set. SSE quickly became more popular, but AMD was leading the way with 3DNow! AMD was also the first to introduce dynamic power management way back in their mobile K6-2 chips and PowerNow! Intel followed up with a weak implementation of SpeedStep a little later but didn't really match up until the release of the Pentium-M last year. With the Athlon64 and Opteron though AMD really pushed things forward, not only with x86-64 but also with technology like integrating the memory controller and hypertransport. They are also now implementing dynamic power management for desktop processors, something that Intel is likely to do in the future.
AMD has also been doing some pretty decent advances on the process side of things, implementing both copper and SOI before Intel. Intel's been doing their own bit of innovation with things like strained silicon and high-k dialectrics, but both companies have been doing their fare share of innovation.
I don't remember if AMD won or lost on the 80386. But it certainly didn't last until the 486.
What lasted until the 486 was the legal battle. AMD did end up losing but not until after they had reverse engineered Intel's 486. AMD later did their own version of the 486. The first version of AMD's 486 just changed the microcode, enough to make it a "legal copy" so to speak. Later they designed an entirely new chip called the 5x86 that offered decent performanced compared to Intel's early Pentiums but at a much lower price and with cheaper 486 motherboards.
AMD's "586"-class chip, the K5, was a dog.
The problem with the K5 wasn't so much that it was a dog-slow processor, it was more simply that it was over a year later. If the K5 had arrived in 1994 or even in early 1995 it would have been a decent competitor to the Pentiums at the time. However it didn't make it to market until 1996 and the clock speeds just weren't there.
Intel put tighter patents on the PII socket so AMD built the Athlon on DEC's Alpha socket electrical design.
The patents had nothing to do with the socket and everythign to do with the bus. One of the important outcomes of the legal battle you mentioned was that AMD was given the right to produce chips compatible with the Pentium bus but NOT the Pentium Pro bus. The PII (and PIII that followed) switched to use the PentiumPro bus rather than the old Pentium bus, so AMD needed to find another solution. The EV6 bus from the Alpha design team was a nice and easy solution offering pretty good performance at the time.
Intel didn't have to change the ISA (drop the NX, for instance) in order to be legal.
Intel didn't have to do much of anything to make the chip legal, as the original poster in the thread mentioned, Intel and AMD have cross-licensing agreements that cover them for this sort of thing.
Either they goofed, or they sabotaged their own 64-bit x86 upgrade (as others here have suggested) in order to create a niche for the Itanic.
My understanding of things is that this feature just wasn't implemented in time for this spin of the silicon. It's expected to show up in the next generation of Intel 64-bit x86 chips, probably ariving in early to mid 2005.
Please tell me WHAT is wrong with x86? Ok, some people don't like programming assembly for it, others love it (as one x86 assembly fan put it: "there's a perfect instruction to do exactly what you want no matter what it is"). Besides which assembly programming for high-end microprocessors really doesn't make much sense anymore except in very odd situations.
No multi-purpose registers? x86-64 has 16 general purpose registers and 16 double-precision floating point registers (the latter capable of holding 2 DP or 4 SP floating point variables in vector mode if you so desire). Sure many other architectures have 32 of each type of register, but the difference isn't that significant.
10 years ago Alpha was stomping all over x86 in raw number crunching, especially in floating point. Now the two fastest processors in the world for integer stuff are x86 and two of the top 4 for floating point as well. Relative to RISC chips x86 is doing BETTER now than it was 10 years ago, not worse.
Opterons are more than capable of doing more than 8-way SMP systems with shared memory. They would do it in EXACTLY the same way that Sun manages to get more than 4 UltraSparc III chips in a shared memory system, ie with crossbars.
The 8-CPU limit for Opteron is only for GLUELESS SMP, not for SMP altogether. However with extra glue chips to hold them together (and software to run on it) there isn't really a limit on the number of chips in an Opteron server.
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They are identicle in features (dual channel) except the 939 lacks one pin. That pin just happens (wink) to be a HyperTransport link that was removed.
That is not at all correct. The two sockets are actually significantly different from one another. You can find a comparison of the two layouts of the two chips bellow:
Socket 939 description.
Socket 940 description.
As you can see looking at the pin-outs (pages 26 and 22 respectively) there are a LOT more than just one pin that has changed.
This means there are not enough links to support multi-processor setups because you can't have the links to the other processors because you don't have enough.
Dual-core chips don't use any external hypertransport links anyway, so this is a non-issue. Everything is handled inside the chip. As such, a dual-core Socket 939 chips is DEFINITELY possible, though whether it will actually happen or not is another question.
This is basically a marketing move to segment the workstation market from the desktop market. There is no (techincial) reason they couldn't have used socket 940 for dual channel desktop processors.
Actually there is a good technical reason why AMD introduced Socket 939 for desktop processors, they have a LOT more power and grounding pins. This allowed motherboard makers to design 4-layer motherboards using this socket while Socket 940 required more expensive 6 or 8-layer motherboards.
So if you chop a HT link off the Opteron, you get two. That should be enough to connect to the chipset and one other processor, right? Shouldn't a 939 be technically capable of dual processor configurations (although AMD has certainly disabled it)? Just wondering.
If you have a look at the pin-out diagrams you'll see that AMD has completely removed all the pins for two of the three hypertransport links and replaced them primarily with power and grounding pins on Socket 939 vs. the old Socket 940. As such there really and truly is only one hypertransport link on this new socket and it is not capable of classic SMP configurations.
However, as mentioned above, these dual-core designs are handle all inside the chip and only require a single HT link to the outside world, so they could certainly work in a socket 939 product. Whether such a product ever makes it to market or not is another question, though there are some hints that AMD might release a dual-core Athlon64 FX chip in socket 939.
The dual-core chips are, at least initially, going to be targetted at the high-end (and high-$$$) market, ie the server and workstation market where the Opteron currently competes. At least according to this roadmap though, AMD will also be bringing out a dual-core Athlon64 FX chip. This chip could very well be in a socket 939 format (presumably all Athlon64 FX chips going forward will use that platform).
Can't wait to see the heat sink that goes with it!
Sure it can't be any worse than this Prescott heatsink/jet engine!
Whoever wrote that article over at Anand was a bit confused or simply didn't bother reading up on this or even looking at their own pictures. If you look at the die photos it should be fairly easy to tell that there are *NOT* two memory controllers, just one. The memory controller and hypertransport controllers go around the outside of the main processor core(s) on the die. There's just one memory controller, 128-bits wide, just like in the single-core Opterons.
That memory controller might be updated to support DDR2 memory (this would fall into AMD's timeline for supporting DDR2), so we might see some extra memory bandwidth in that sense, but there will be no need for extra pins. AMD should have no trouble making this fit in Socket 940 as they have mentioned several times in recent interviews.
Of course it requires a few caveats, but it's mostly correct. The Opteron has a rather impressive level of bandwidth/processor and extremely low latency to that memory. The integrated memory controller REALLY helps here and I suspect that for over 95% of the cases AMD is correct that they could drop a second core into the picture and still get very good scaling without having to worry about memory bandwidth.
Ohh, and as for cache, that fortunately isn't a problem at all as each core comes with it's own 1MB of L2 cache (and of course it's own 128K of L1 cache as well). Combine that with the huge amount of I/O bandwidth they've got with Hypertransport and really the chip is well designed to accept a second core.
I would really like to be able to use them in my client installations but I can't really recommend them for anyplace that doesn't have 7x24 staff within hearing distance of any audible thermal alarms.
As mentioned in another post, the P4 clock throttling will typically not prevent the system from crashing, particularly with the latest and greatest (and rather power hungry) revision of the P4 except maybe if the system is still idle, and even than it's hit and miss. All it will do is give you a bit more time between when the "Fan is not working" alarm first goes off and when the system locks up.
I believe Sun and IBM (among some others) will sell you systems that really and truly CAN stay up and running after a fan failure. If your customers really need that level of uptime, perhaps they would be better served by one of those systems? (I'm actually being serious here, Intel and AMD systems just aren't designed with extremely high reliability and uptime in mind, such designs cost money).
I did learn that there are some MB's which will try to save the AMD CPU from cooking itself and that is encouraging.
This is now included on-die with the Athlon64 and Opteron chips, no more motherboard intervention required. Either way, all AthlonXP boards had this feature enabled, though it sometimes wasn't enough to save the chip if the heatsink was not installed in the first place (or yanked off a running system).
Still - I won't be recommending AMD for Aunt Tillie or my small customers until the AMD CPU's or virtually every AMD capable MB out there has some way of protecting the AMD CPU's from self destruction.
If all you're worried about is fan failures than you should be plenty safe with any AthlonXP or Athlon64/Opteron board. These boards have always shut down just fine if the fan fails.
Most of the stories about AMD chips frying themselves was pure fear-mongering and stupidity, or at the very least it was lazyness. A few people did fry their chips by failing to install the heatsink properly. I've installed a few AthlonXP heatsinks and they are not difficult at all, but apparently some people just slap the things on upside-down and backwards and killed their chips as a result.
Otherwise most of this started with a particular hardware review website that wanted to get MANY page hits (and they succeeded beyond their wildest imaginations) with a video of an AthlonXP frying itself because they yanked the heatsink off the thing while the system is running, while proceeded to show a faked shot of a P4 surviving the same exercise (read Intel's tech docs sometime and/or try running a chip consume 20-30W of power without a heatsink and you'll see why I say this test was faked). While very sensationlized and widely touted across the web, IMO the video did a great diservice to both AMD (people think their chips will fry themselves under anything resembling normal use) and Intel (people think their chips are invulnerable and will run with no cooling).
This feature caused some businesses I know to forgo choosing any AMD cpu, since it couldn't protect itself in the event of an unattended fan failure.
AMD processor will shut down if their CPU fan fails, just like pretty much all previous processors. Intel P4 chips MIGHT just throttle back, though according to Intel tech-docs they will only throttle down to 30% of their full speed at an absolute minimum, so it's quite possible that the chips will still be consume 20-30W of power. What that means is that the chip will still almost certainly crash under extended use and heavy workloads.
First question - does the clocking down feature really exist on Intel CPU's?
Yes. It's a nice little feature that can buy you an extra few minutes to shut down your PC in the event of a fan failure. On a system without this feature the processor would overheat and crash in fairly short period of time, probably 5 minutes or less, if the fan died. With this clock throttling feature it would probably take 10 to 15 minutes before the system locked up.
Does AMD have this feature yet?
Rumor has it that the Athlon64/Opteron die is capable of the same sort of clock throttling, but the feature has not been sufficiently tested yet and is not enabled. At least some of these new chips are using a second generation of the Athlon64 die and therefore *MIGHT* have clock throttling as a feature, but until it's actually tested, enabled and working, the answer to your question is no.
As a quick note: despite what you might see in some faked videos on some rather questionable hardware websites, a P4 will definitely *NOT* run at all without any heatsink at all! Do NOT try yanking the heatsink off your processor in the middle of running a Quake 3 Timedemo, it WILL crash and there's a good chance that you will damage the processor in the process.
Given that the memory controller in the Athlon64 is part of the CPU, doesn't it stand that memory settings and CPU settings are kind of one and the same for these chips?
Just remember, Itanium 2s do exist, but they are hardly something to benchmark a lot.
Itaniums actually are benchmarked quite a bit, probably more than their sales figures would justify. They are, of course, also not the only 64-bit chips out there. IBM's got their PowerPC 64-bit chips, SUN and Fujisu have their SPARC chips, HP's got PA-RISC, Alpha and even some old servers running 64-bit MIPS chips (their Non-Stop line)... just to name a few.
I would assume with a starting price of about 3 grand a chip
Not that far off the starting price if you count the high-end ones. Intel does sell a couple "workstation" Itanium2 chips for ~$750 or $1000, but they will only work in 1 and 2P setups. For a 4P+ setup the cheapest chips they'll sell you do indeed come in at around the $2500-$3000 mark, and the top-end ones will set you back over $5000... what's more, those are the prices from Intel! HP adds about a 50-60% mark-up to those prices for the chips they sell!
which is meant to be used in up to an 8-way configuration, probably about 3 people have them.
Itanium sales ahve been somewhat weak, last year they sold approximately 20,000 servers. Sales have picked up fairly consistently throughout last year and apparently are continuing to pick up this year, but right now it's still looking like the chip is largely just a replacement for HP's old PA-RISC servers and SGI's old MIPS servers.
And they can't run 32 bit code natively, it must be done in emulation.
My understanding is that these chips actually do have a full 32-bit x86 core included in the chip right alongside the 64-bit IA-64 core, however it turns out that it's faster to run things in emulation that to use the integrated core.
However, when the Itanium 2 is used in it's native 64-bit mode, without any 32-bit emulation, it would be worth the money.
Here's the real kicker though, often it's NOT worth the money! In many of the tests done so far comparing 64-bit Itanium to 64-bit Opteron, the Opterons actually come out ahead! It's often a tight race, and certainly the Itanium2 does win it's fair share of benchmarks, but it's definitely not the straight-up win that Intel would like to have us believe. These two chips are actually very competitive in terms of performance.
The big advantage that Itanium2 has is that it's well supported at the high-end by both HP and SGI, so where the Opteron is only available in up to 4-CPU servers you can plop down a few million and pick up a 64 to 256-CPU system with Itanium chips.
I fail to see how this is all that impressive. It's not like AMD *could* clock the Athlon64 up to 3.4GHz on a 130nm manufacturing process like Intel has done with their P4 chips. Nothing at all against AMD's process engineers, they are absolutely top-notch, but it's just that the two chips are designed differently.
Intel chose to get their performance by clocking their chips very highly, the classic "speed demon" design. AMD chose to get their performance by getting their chips to do more per clock cycle, more of a "brainiac" design. These two design philosophies are not exactly mutually exclusive, but there are trade-offs required for each. In the end, the only thing that really matters is which company made the best trade-offs between "speed demon" and "brainiac".
Right now it looks like that company is AMD, though keep in mind that the P4 was released nearly 4 years ago while the Athlon64 core is only 1 year old. Intel must be well on their way to bringing out their next generation core (typically released about 5 or 6 years after the last one first showed up) while AMD still has a ways to go with their core.
Same chip as a Athlon mobile, probably pin compatible.
Same chip, not pin-compatible. The Geode NX comes in a 453-pin chip and is designed to be soldered right onto boards. Socket-A uses 462 pins (if my memory is working right) and fits in a ZIF socket.
It is, however, electrically compatible, so it's fairly straightforward for a company to modify a product to use these new chips instead of the desktop Athlons.
Yes, but a 1GHz AthlonXP-M chip (basically what these Geode NX chips are) will run circles around an Efficeon running at 1GHz. The 1GHz Efficeon will typically give you performance in the same sort of range of a 500MHz AthlonXP.
Ohh, and the Transmeta chips are more expensive to boot.
Well, I'll answer you second question first because it's a quick and easy: Yes. Less power consumption == less heat. Your processor is not giving off any energy as noise and (hopefully) it's not glowing so it's not giving off any light energy. There might be a TINY fraction of energy given off as a signal on the bus, but for all practical purposes *ALL* energy consumed has to be given off as heat.
Now, to get back to the first question, the AthlonXP-M is available with power consumption of 25W, 45W or 62W TDP (Thermal Design Power), depending on the model you get.
These new products are rated at 9W TDP for the "1500@6W" model and somewhat higher for the 1750@14W model (the wattage listed in the chips model number is a "typical" wattage, while TDP is the maximum, hence the disparity in numbers).
Otherwise the processors are basically the same as the AthlonXP-M chips. Basically these are just "Low Voltage" and "Ultra-Low Voltage" versions of the AthlonXP-M chips, to use Intel's name for things. They are very directly competing with Intel's ULV Pentium-M chips that run at 1.0GHz and have a TDP of 7W. Performance and power consumption should be about the same, though the AMD chips sell for about 1/3 to 1/4 the price of what the Intel chips sell for.
As compared to desktop chips they consume quite a bit less power. Power consumption isn't quite such a big deal for desktop chips, so the numbers aren't pushed as much, but generally you're looking at 50-100W or more for a top-end desktop chip. AMD's AthlonXP 3200+ processor is rated for 76.8W.
Note that the definition of TDP (Thermal Design Power) varies from one chip to another. AMD defines the TDP of their desktop AthlonXP chips as the maximum power it will consume while running an absolute worst-case bit of code. They define their TDP for their mobile AthlonXP-M, mobile and desktop Athlon64 and workstation/server Opteron chips as being the maximum power consumption for any chip in that line (eg all of the "Low Power" AthlonXP-M chips are rated for 25W, regardless of clock speed, and all the "Mainstream" AthlonXP-M chips are rated for 45W, even though there is some overlap in clock speeds between the two lines).
Intel's TDP is defined slightly differently again. The Pentium-M and Celeron-M is defined much like AMD's desktop AthlonXP chips, ie absolute maximum power the chip can consume. The Mobile Pentium4-M is defined like AMD's mobile chips and their Athlon64/Opteron line, ie maximum for the line of processors. And then there's Intel's desktop P4 chips, which use a TDP that is kinda-sorta-almost the maximum power the chip will consume.
Ohh, and it just goes downhill from there. Don't even bother trying to figure out how Transmeta calculates the power consumption of their chips, because as best as I can tell they are just pulling numbers from a hat! Maybe there more info if you sign a bunch of NDAs as a developer, but from what I've seen on their website the actual power consumption of Crusoe and Efficeon chips seems to be firmly in the hands of the marketing department, not the actual specs.
I know that reading the article before posting isn't a very popular passtime, but if you had bothered takign the time you would have seen that your questioned is answered there.
The Geode GX is what AMD calls the system-on-chip Cyrix/National Semi product that was purchased a little while back. The Geode NX is the new Athlon-based chip. Basically the Geode NX is just an "Ultra Low Voltage" AthlonXP-M, to use Intel's name for things.
Transmeta's going to have to go a LONG way to getting either efficient or fast processors. Right now they are neither, just slow.
It's not even like their chips are really power efficient for the performance that they give, Intel's ULV Celeron chips will blow the Transmeta Efficeon out of the water in terms of performance and they do so with the same power consumption. VIA's got the same level of performance and power consumption as Transmeta's chips but with a MUCH lower price tag.
Basically all Transmeta has going for it is a bit of marketing. Their technology, while somewhat interesting from an academic point of view, really doesn't work very well. The fact that Efficeon's performance is still very weak may be the final nail in the coffin for Transmeta. These days you can scale nearly any chip down to the same power consumption that Transmeta offers, and Intel does just that with their Ultra-Low Voltage chips.
If anything is going to knock Intel out on the low-power side of things, it won't be Transmeta. More likely it will be something along the lines of an ARM processor... of course, Intel is probably the leading manufacturer of high-performance/low-power ARM chips.
It's not "desktops", but rather "retail desktops", and that is only a small portion of the market. Note that Dell doesn't sell ANY machines into the retail market, and the bulk of the desktops that HPaq sells are not sold at retail either.
Also the analyst that wrote the article clearly has a very short memory, because AMD had over 50% of the retail desktop market for several months in the earlier days of the Athlon.
As for the laptop market, AMD actually has a REALLY good product for the mobile market. While the Pentium-M might be the best choice, it's an *expensive* chip. AMD's AthlonXP-M manages nearly the same performance and in the same power consumption range. The only real advantage to the Pentium-M is that it's dynamic power-saving technology is a little bit better.
However, if you compare the AthlonXP-M to the Celeron-M or, worse yet, the Mobile Celeron (totally different chip from the Celeron-M), AMD comes out head and shoulders ahead for the same price. Since the Celeron-M has it's dynamic power saving technology mostly disabled and slightly lower performance than the Pentium-M (half the cache and lower clock speeds), the AthlonXP-M is both faster and consumes less power.
Just to throw some numbers at that hard drive stat of yours...
Mean Time Between Failures means the number of drive-hours between a hard drive failure within the warranty, ie it's exactly what we need to solve this problem. Low-end IDE drives have an MTBF of somewhere around 500,000 hours.
So, if we figure that Google has 78,000 servers, each with a single IDE drive (apparently that is how they have them setup), they should have 1 drive failure every 6.4 hours, or about 3-4 drives a day. Definitely a non-trivial amount, and obviously some days will be a lot worse than others, but certainly not hundreds per day, let alone thousands. Even if the MTBF is somewhat overstated and is only 300,000 hours you're still looking at single-digit drive failures per day on average.
You don't need any open hardware or any trash like that, the DRM stuff is implemented almost entirely in software. The only hardware portion is a secure "nexus", a portion of memory that can not be accessed by other applications.
/. stories as the word of God and don't bother reading the publicly available specifications.
There absolutely no good reason at all why DRM has to be implemented in any operating system just because the hardware supports it. If you ignore the feature (or, better yet, make use of it to improve security for sensitive applications).
Despite the tin-foil hat crowds comments, all of these TCP, NGSCB and Palladium technologies will NOT in ANY way prevent you from installing Linux or any other operating system you so chose. People primarily make these comments because they are morons who take
For those that are actually interested in any fact, Intel's website has tons of info. The chip in question is actually almost never used in mobile phones, it's an XScale chip that is primarily used for PDAs. Nice little chip, 624MHz clock speed with only about 1W maximum power consumption, plus dynamic power saving technology.
The Top500 list uses Linpack exclusively for it's test. Linpack can be split to run on clusters VERY easily, it could even fall under the catagory of "embarassingly parallel" problems. These sorts of tasks do exist in reality, but they definitely aren't the only kinds of problems you'll encounter.
If you need to access remote memory in a super cluster, such as the ones mentioned above, you take a BIG hit in terms of performance. Think about running from swap space vs. running an application out of memory and you'll be on the right track. In these sorts of situations a system like that Cray down in slot 19 could easily beat out nearly anything above it on that list (almost all of which are superclusters except for Earth Simulator at #1).
As others have mentioned, the guy was clearly talking from a marketing standpoint rather than a "chose the best solution for the job" standpoint, however what he said isn't entirely without value. There are a lot of tasks out there where that Big Mac supercluster that people keep touting would suck-ass. Even with their high-bandwidth, low-latency infiniband interconnect you're still looking at a good 3 orders of magnitude lower performance for remote memory vs. local memory.
Uhh.. AMD developed hypertransport mostly on their own. Alpha Processor Inc. had a small hand in it, not DEC/Compaq. EV7 uses a processor interconnect that achieves a similar goal, but they are definitely not the same bus and AMD most certainly did not just license and enhance an DEC/Compaq bus.
Hypertransport runs natively at a WIDE range of speeds. It's a unidirectional point-to-point bus capable of running at 2-bits up to 32-bits and from 100MHz up to 800MHz (200MT/s and 1600MT/s DDR) and beyond for the next revision of the specification. Data rates can range from the fairly low 50MB/s right up to 6.4GB/s.
Hypertransport doesn't really have that much to do with memory latency, the integrated memory controller is what is responsible for the low-latency memory. Hypertransport allows for low-latency I/O, some of which could be memory I suppose.
As for the 256KB of L1 cache, I have not heard any plans about that, but it's definitely not in the works for the K8 core. Maybe for the follow-up K9 core to be released in 2006, though I wouldn't hold my breath on that one if I were you. Shrinking die sizes are more likely to result in larger L2 caches, not larger L1 caches.
Why in the hell would AMD do something so incredibly stupid as to buy Transmeta? Transmeta's chips might not consume much power, but their performance absolutely STINKS! Compare the fastest Transmeta chips to Intel's 800MHz ULV Celeron and the Intel chip has lower power consumption AND better performance, all from a smaller die (cheaper to make, though the selling price might be different).
Transmeta's product line is VERY weak. The only company they are really competitive with is VIA, who produce slightly faster processors that consume the same amount of power. Of course, VIA sells their chips for about 1/4 of what Transmeta sells for. The only reason why Transmeta sells anything at all is that they got some marketing hype behind them.
Intel playing catch-up to AMD IS big news, not because it's illegal (it isn't) but because it has always been the other way around.
It hasn't "always" been the other way around, especially not in recent years. If you look at some recent innovations in x86 chips, AMD has been right up there. AMD introduced 3DNow! before Intel brought out their similar SSE instruction set. SSE quickly became more popular, but AMD was leading the way with 3DNow! AMD was also the first to introduce dynamic power management way back in their mobile K6-2 chips and PowerNow! Intel followed up with a weak implementation of SpeedStep a little later but didn't really match up until the release of the Pentium-M last year. With the Athlon64 and Opteron though AMD really pushed things forward, not only with x86-64 but also with technology like integrating the memory controller and hypertransport. They are also now implementing dynamic power management for desktop processors, something that Intel is likely to do in the future.
AMD has also been doing some pretty decent advances on the process side of things, implementing both copper and SOI before Intel. Intel's been doing their own bit of innovation with things like strained silicon and high-k dialectrics, but both companies have been doing their fare share of innovation.
I don't remember if AMD won or lost on the 80386. But it certainly didn't last until the 486.
What lasted until the 486 was the legal battle. AMD did end up losing but not until after they had reverse engineered Intel's 486. AMD later did their own version of the 486. The first version of AMD's 486 just changed the microcode, enough to make it a "legal copy" so to speak. Later they designed an entirely new chip called the 5x86 that offered decent performanced compared to Intel's early Pentiums but at a much lower price and with cheaper 486 motherboards.
AMD's "586"-class chip, the K5, was a dog.
The problem with the K5 wasn't so much that it was a dog-slow processor, it was more simply that it was over a year later. If the K5 had arrived in 1994 or even in early 1995 it would have been a decent competitor to the Pentiums at the time. However it didn't make it to market until 1996 and the clock speeds just weren't there.
Intel put tighter patents on the PII socket so AMD built the Athlon on DEC's Alpha socket electrical design.
The patents had nothing to do with the socket and everythign to do with the bus. One of the important outcomes of the legal battle you mentioned was that AMD was given the right to produce chips compatible with the Pentium bus but NOT the Pentium Pro bus. The PII (and PIII that followed) switched to use the PentiumPro bus rather than the old Pentium bus, so AMD needed to find another solution. The EV6 bus from the Alpha design team was a nice and easy solution offering pretty good performance at the time.
Intel didn't have to change the ISA (drop the NX, for instance) in order to be legal.
Intel didn't have to do much of anything to make the chip legal, as the original poster in the thread mentioned, Intel and AMD have cross-licensing agreements that cover them for this sort of thing.
Either they goofed, or they sabotaged their own 64-bit x86 upgrade (as others here have suggested) in order to create a niche for the Itanic.
My understanding of things is that this feature just wasn't implemented in time for this spin of the silicon. It's expected to show up in the next generation of Intel 64-bit x86 chips, probably ariving in early to mid 2005.
Please tell me WHAT is wrong with x86? Ok, some people don't like programming assembly for it, others love it (as one x86 assembly fan put it: "there's a perfect instruction to do exactly what you want no matter what it is"). Besides which assembly programming for high-end microprocessors really doesn't make much sense anymore except in very odd situations.
No multi-purpose registers? x86-64 has 16 general purpose registers and 16 double-precision floating point registers (the latter capable of holding 2 DP or 4 SP floating point variables in vector mode if you so desire). Sure many other architectures have 32 of each type of register, but the difference isn't that significant.
10 years ago Alpha was stomping all over x86 in raw number crunching, especially in floating point. Now the two fastest processors in the world for integer stuff are x86 and two of the top 4 for floating point as well. Relative to RISC chips x86 is doing BETTER now than it was 10 years ago, not worse.
Opterons are more than capable of doing more than 8-way SMP systems with shared memory. They would do it in EXACTLY the same way that Sun manages to get more than 4 UltraSparc III chips in a shared memory system, ie with crossbars.
The 8-CPU limit for Opteron is only for GLUELESS SMP, not for SMP altogether. However with extra glue chips to hold them together (and software to run on it) there isn't really a limit on the number of chips in an Opteron server.