It seems like the real question is not whether
and what kind of Linux software runs on it, but
whether the global shared memory system is cache coherent, and what are the performance characteristics of the coherence mechanism.
And since everyone's plugging their favorite SGI
competitor's machine, don't forget
NEC.
Yes, freedoms are granted by the government. Your own argument confirms it - the rights enumerated in the Bill of Rights
are there specifically to give them to the citizenry. The Constitution describes the structure of the government and the
abilities of each branch. The Bill of Rights grants citizens rights under the law.
Sheesh...
The Constitution enumerates government
powers, not citizen rights. Have you never
read the 9th and 10th Amendments?
The enumeration in the Constitution, of certain rights, shall not be construed to deny or
disparage others retained by the people.
The powers not delegated to the United States by the Constitution, nor prohibited by it to the
states, are reserved to the states respectively,
or to the people.
Our legislators are not sufficiently apprised of the rightful limits of
their power; that their true office is to declare and enforce only our
natural rights and duties, and to take none of them from us. No man
has a natural right to commit aggression on the equal rights of
another; and this is all from which the laws ought to restrain him;
every man is under the natural duty of contributing to the necessities
of the society; and this is all the laws should enforce on him; and, no
man having a natural right to be the judge between himself and
another, it is his natural duty to submit to the umpirage of an
impartial third. When the laws have declared and enforced all this,
they have fulfilled their functions; and the idea is quite unfounded,
that on entering into society we give up any natural right.
Yes, reviewers are paid to give rave reviews,
just like search engines are paid to increase
web page rankings.
Once, after I gave a
rave review,
I got an email several months later from John
Wiley & Sons, offering me $50 to review a similar book of theirs.
(This was back when Amazon.com put email addresses next to reviewers' names.)
I don't remember if the paid review was to be
submitted to a bookseller's site, or to more conventional book review media.
Adaptec 2400A Supports RAID 1+0
on
IDE RAID Examined
·
· Score: 2, Interesting
The article is misleading because the Adaptec
2400A actually supports RAID 1+0 (striped mirrors), which is more fault-tolerant
than RAID 0+1 (mirrored stripes).
Useful article on the subject of RAID 1+0 vs. RAID 0+1.
But this is probably Adaptec's fault, since they label RAID 1+0 and RAID 0+1 opposite from standard convention.
I connect different power supply lines to each of the mirrors' halves, so that one half of each mirror is powered by one line, and the other half is supplied by another line.
If a power supply fails only partially, it
usually does so on one of the peripheral power lines. With the right power supply wiring, and
the 2400A set up in RAID 1+0 mode, a power supply failure will not usually result in any lost data, since it will be isolated to one half of each mirror.
Power supplies have been failing on me more often than drives have lately, even when they are used well within their rated limits.
Don't power both drives of a mirror with the same
peripheral power cable!!! On many power suppplies, those separate peripheral power connector lines are on separate circuits, which means one may fail while the other doesn't. It's best to spread the chances of failure out as evenly as possible across the RAID.
Two-channel IDE RAID cannot support RAID 1+0,
only RAID 0+1.
Four IDE channels are necessary for RAID 1+0 to
be effective, because if one drive fails in a two-channel configuration, the other drive sharing the same channel can stop working too, especially if the failing drive was the master.
Adaptec also offers
open-source drivers for the 2400A, while the article
neglects to mention that, and
in doing so implies that only 3ware and HighPoint do.
Also, the article's table has read/write speeds of the Promise FastTrak shown backwards (133 vs 100).
Nonethless, the article's comments about the 2400A's slow rebuild time are accurate.
It takes around 8 hours to rebuild my 120 GB
1+0 RAID (four 60 GB 7200 RPM drives).
And keep in mind that the 2400A is a SCSI RAID solution retrofitted onto an IDE interface -- some of the 2400A's firmware is shared with Adaptec's SCSI RAID firmware. So the 2400A is not really built or optimized for IDE from the ground up.
But if you need RAID 1+0 or RAID 5 data protection, and you have 4 inexpensive IDE drives to use, the 2400A is nice. It's twice saved me from losing any data. Don't expect blazing-fast performance, though -- just consistently good performance, very low CPU usage, and very strong reliability.
He should open his own store on his web site, and
use all of his publicity against eBay to increase
sales. He should have opened his store right before publicizing the eBay incident, so that the
publicity would maximize his sales.
With registration required, they can track your
activity and put a stop to it as soon as they
see too many "downloads" going on, something
harder (but not impossible) for them to do when you can download anonymously.
I think another reason they require registration, is to prevent robots from archiving their stories permanently, since they try to make money by selling access to stories more than a week or two old.
Lots of robots don't even request/robots.txt, but proceed to download and index stories.
Requiring registration is more than 10 times as effective in stopping robots, as/robots.txt is.
Note that the NYTimes and other sites often
allow backdoor entry with referers. For example, one
of my favorite news portals is
MyNewsFirst.com.
When you click on a NYTimes story listed there, you don't have to register, because it sends either a "passthrough referer", or an extra query string certificate (e.g. &partner=mynewsfirst), which bypasses the registration requirement.
I'm just glad most RealCities
newspapers aren't doing it yet, since they
provide geographically diverse news.
You're absolutely right. Americans have lost
their Revolutionary spirit, and are willing to
bow to any leader or "God" that comes their way. That's why America risks becoming the next Nazi Germany. Hitler was popularly elected, after all, and he could flourish in America's current ultra-patriotism.
It seems to me that the cable company is using
the government to enforce something for which
their technology is inadequate.
Why must bandwidth be throttled at the modem?
Why not limit bandwidth consumption at the ISP's
end?
This seems to be part of a recurring theme, of
companies using government to enforce technology
in spite of its limitations, and making it a crime to circumvent those limitations:
You have cellular phone companies who lobby for
the 1986 ECPA law, which bans listening to analog cellular frequencies or modifying scanners to receive them.
This to make up for analog cellular's privacy deficiencies, and give the illusion of cellular phone privacy.
You have cable companies, who were originally pirates of broadcast programs, scrambling their signals and making it illegal to use a descrambler other than their own (which you cannot own or modify, only lease).
This to create a scarcity that does not exist naturally, so that prices can
be inflated.
And now you have ISPs making it illegal to
modify modems, because their routers are unable to
manage bandwidth effectively. And they enlist the
FBI to prosecute as criminal, modifications of their modems.
Next thing you know, it will all be done in software, and any reverse engineering or modification of software will be a crime.
All of your executables will be scanned for
checksums, under a Palladium-like scheme, and
if it indicates one of your executables has been
modified, the ISP will be notified through spyware, and the FBI
will be called out to seize your computer. If their investigation finds that you intentionally modified the files, you will be arrested and all of your property (not just computer) will be seized.
First of all, IA-64 is now called IPF (Itanium
Processor Family), although I've heard rumors that
this is changing again, to a third name.
Although the initial acceptance of Itanium-based servers and workstations has been slow, there is little doubt that it will eventually succeed in becoming the
next-generation platform.
Actually, as/. readers know, there have been
some doubts. Itanium is 5 years late. Right now Itanium ranks lowest in
SPEC numbers, and Itanium 2 (McKinley), while
it addresses some of the problems, can't expect
to compete with Hammer or Yamhill when it comes
to integer code.
For tight floating-point loops, Itanium 2
is great -- 4 FP loads + 2 FMAs per clock. But
on integer code with lots of
unpredictable branches, the entire IPF architecture leaves a lot to be desired.
Speculation and predication were supposed to
address that, but it is very hard for compilers
to exploit speculation, and predication does not
address issues such as the limitations of static scheduling.
(Also, Itanium 2 removes any benefit that the
SIMD instructions had on Itanium, because on
Itanium 2, SIMD instructions such as FPMA are
split and issued to both FPU ports, negating
any performance benefit they had on Itanium.
So while Itanium can perform 8 FP ops per clock with FPMA, Itanium 2 can only perform 4 FP ops
per clock.
This does not look good for the future of IPF
implementations.
But Itanium 2's bigger memory bandwidth is
probably more important than SIMD instructions
anyway. Itanium 2 is built more for servers,
while Itanium is built more for workstations,
which might benefit from SIMD MMU instructions,
although the rest of Itanium, and its
price/performance, make almost anything else
better.)
Superscalar processors with dynamic scheduling
are improving much better than was expected
during IPF's design (witness the P4 and AMD chips). So Itanium's static instruction
scheduling design may be a liability more than
an asset today. It puts considerable burden on
the compiler.
The
x86 emulation and stacked register windows take up a lot of real estate on the chip, which could be
better used for something else.
The IA64 can be thought of as a traditional RISC CPU with an almost unlimited number of
registers.
Nonsense!!! No CPU has unlimited registers.
When writing code by hand or with a compiler,
registers are a limited resource which are used
up quickly.
And even though IPF has "stacked" general purpose registers
which are windowed in a circular queue with a
lazy backing store, these windows are of limited
utility in real code. How many times does real
code use subroutine calls which can take heavy advantage of register windows, before call branch penalties start to negate any benefit the windowing provides?
It's a great idea in theory,
but windowing just adds to the complexity of the
implementation, taking up real estate that could be better used elsewhere.
The IA64 has another very important property: It is both PA-RISC 8000 compatible and IA32
compatible. You can thus boot Linux/IA64, HP-UX 11.0, and Windows on an Itanium-powered box.
Absolutely false: PA-RISC emulation was
dropped years ago, before the first implementation, although it was originally
planned. Also, HP-UX 11.0, which is PA-RISC only, is not supported on IPF. Only HP-UX 11.20 and later are supported. HP-UX 11.22 is the first customer-visible release of HP-UX on IPF.
The endianism (bit ordering) is still
"little," just like on the IA32, so you don't have to worry about that at all.
Misleading -- the endianism is still a part of
the processor state (i.e. context-dependent).
This means it can be both big and little endian,
and can switch when an OS switches context. HP-UX, for example, is big-endian on IPF.
The rest of the article had generic ANSI C
programming tips which everyone knows already -- nothing specific to IPF.
And since everyone's plugging their favorite SGI competitor's machine, don't forget NEC.
Sheesh...
The Constitution enumerates government powers, not citizen rights. Have you never read the 9th and 10th Amendments?
The enumeration in the Constitution, of certain rights, shall not be construed to deny or disparage others retained by the people.
The powers not delegated to the United States by the Constitution, nor prohibited by it to the states, are reserved to the states respectively, or to the people.
-- Thomas JeffersonAutomated Mileage and Stateline Crossing Operational Test (AMASCOT):
Here's the Iowa State University study
Here a longer, more general PDF report on AMASCOT
It was originally designed for tracking commercial vehicles, but now is being cited for passenger vehicles too.
In Wisconsin, a man is charged with using GPS to stalk his ex-girlfriend.
TIA: An Impossible Socialist Dream
Yes, reviewers are paid to give rave reviews, just like search engines are paid to increase web page rankings.
Once, after I gave a rave review, I got an email several months later from John Wiley & Sons, offering me $50 to review a similar book of theirs. (This was back when Amazon.com put email addresses next to reviewers' names.)
I don't remember if the paid review was to be submitted to a bookseller's site, or to more conventional book review media.
But this is probably Adaptec's fault, since they label RAID 1+0 and RAID 0+1 opposite from standard convention.
I connect different power supply lines to each of the mirrors' halves, so that one half of each mirror is powered by one line, and the other half is supplied by another line.
If a power supply fails only partially, it usually does so on one of the peripheral power lines. With the right power supply wiring, and the 2400A set up in RAID 1+0 mode, a power supply failure will not usually result in any lost data, since it will be isolated to one half of each mirror.
Power supplies have been failing on me more often than drives have lately, even when they are used well within their rated limits.
Don't power both drives of a mirror with the same peripheral power cable!!! On many power suppplies, those separate peripheral power connector lines are on separate circuits, which means one may fail while the other doesn't. It's best to spread the chances of failure out as evenly as possible across the RAID.
Two-channel IDE RAID cannot support RAID 1+0, only RAID 0+1. Four IDE channels are necessary for RAID 1+0 to be effective, because if one drive fails in a two-channel configuration, the other drive sharing the same channel can stop working too, especially if the failing drive was the master.
Adaptec also offers open-source drivers for the 2400A, while the article neglects to mention that, and in doing so implies that only 3ware and HighPoint do.
Also, the article's table has read/write speeds of the Promise FastTrak shown backwards (133 vs 100).
Nonethless, the article's comments about the 2400A's slow rebuild time are accurate. It takes around 8 hours to rebuild my 120 GB 1+0 RAID (four 60 GB 7200 RPM drives).
And keep in mind that the 2400A is a SCSI RAID solution retrofitted onto an IDE interface -- some of the 2400A's firmware is shared with Adaptec's SCSI RAID firmware. So the 2400A is not really built or optimized for IDE from the ground up.
But if you need RAID 1+0 or RAID 5 data protection, and you have 4 inexpensive IDE drives to use, the 2400A is nice. It's twice saved me from losing any data. Don't expect blazing-fast performance, though -- just consistently good performance, very low CPU usage, and very strong reliability.
Best explanation of Electoral College.
He should open his own store on his web site, and use all of his publicity against eBay to increase sales. He should have opened his store right before publicizing the eBay incident, so that the publicity would maximize his sales.
It's made of glass, so it's bound to reflect something, say previous stories?
The inititation rite? Playing Daikatana and fragging Stevie Case.
With registration required, they can track your activity and put a stop to it as soon as they see too many "downloads" going on, something harder (but not impossible) for them to do when you can download anonymously.
Lots of robots don't even request /robots.txt, but proceed to download and index stories.
Requiring registration is more than 10 times as effective in stopping robots, as /robots.txt is.
Note that the NYTimes and other sites often allow backdoor entry with referers. For example, one of my favorite news portals is MyNewsFirst.com. When you click on a NYTimes story listed there, you don't have to register, because it sends either a "passthrough referer", or an extra query string certificate (e.g. &partner=mynewsfirst), which bypasses the registration requirement.
I'm just glad most RealCities newspapers aren't doing it yet, since they provide geographically diverse news.
Here is an excellent op-ed on the subject.
Why must bandwidth be throttled at the modem? Why not limit bandwidth consumption at the ISP's end?
This seems to be part of a recurring theme, of companies using government to enforce technology in spite of its limitations, and making it a crime to circumvent those limitations:
This to make up for analog cellular's privacy deficiencies, and give the illusion of cellular phone privacy.
This to create a scarcity that does not exist naturally, so that prices can be inflated.
Next thing you know, it will all be done in software, and any reverse engineering or modification of software will be a crime. All of your executables will be scanned for checksums, under a Palladium-like scheme, and if it indicates one of your executables has been modified, the ISP will be notified through spyware, and the FBI will be called out to seize your computer. If their investigation finds that you intentionally modified the files, you will be arrested and all of your property (not just computer) will be seized.
We're living in a police state.
The Pledge of Allegiance was written by Francis Bellamy, a Baptist minister and Christian Socialist, in 1892.
Yes, I think so.
Here is the original version
Down with Christian theocrats!!!
First of all, IA-64 is now called IPF (Itanium Processor Family), although I've heard rumors that this is changing again, to a third name.
Although the initial acceptance of Itanium-based servers and workstations has been slow, there is little doubt that it will eventually succeed in becoming the next-generation platform.
Actually, as /. readers know, there have been
some doubts. Itanium is 5 years late. Right now Itanium ranks lowest in
SPEC numbers, and Itanium 2 (McKinley), while
it addresses some of the problems, can't expect
to compete with Hammer or Yamhill when it comes
to integer code.
For tight floating-point loops, Itanium 2 is great -- 4 FP loads + 2 FMAs per clock. But on integer code with lots of unpredictable branches, the entire IPF architecture leaves a lot to be desired. Speculation and predication were supposed to address that, but it is very hard for compilers to exploit speculation, and predication does not address issues such as the limitations of static scheduling.
(Also, Itanium 2 removes any benefit that the SIMD instructions had on Itanium, because on Itanium 2, SIMD instructions such as FPMA are split and issued to both FPU ports, negating any performance benefit they had on Itanium. So while Itanium can perform 8 FP ops per clock with FPMA, Itanium 2 can only perform 4 FP ops per clock. This does not look good for the future of IPF implementations. But Itanium 2's bigger memory bandwidth is probably more important than SIMD instructions anyway. Itanium 2 is built more for servers, while Itanium is built more for workstations, which might benefit from SIMD MMU instructions, although the rest of Itanium, and its price/performance, make almost anything else better.)
Superscalar processors with dynamic scheduling are improving much better than was expected during IPF's design (witness the P4 and AMD chips). So Itanium's static instruction scheduling design may be a liability more than an asset today. It puts considerable burden on the compiler.
The x86 emulation and stacked register windows take up a lot of real estate on the chip, which could be better used for something else.
The IA64 can be thought of as a traditional RISC CPU with an almost unlimited number of registers.
Nonsense!!! No CPU has unlimited registers. When writing code by hand or with a compiler, registers are a limited resource which are used up quickly.
And even though IPF has "stacked" general purpose registers which are windowed in a circular queue with a lazy backing store, these windows are of limited utility in real code. How many times does real code use subroutine calls which can take heavy advantage of register windows, before call branch penalties start to negate any benefit the windowing provides?
It's a great idea in theory, but windowing just adds to the complexity of the implementation, taking up real estate that could be better used elsewhere.
The IA64 has another very important property: It is both PA-RISC 8000 compatible and IA32 compatible. You can thus boot Linux/IA64, HP-UX 11.0, and Windows on an Itanium-powered box.
Absolutely false: PA-RISC emulation was dropped years ago, before the first implementation, although it was originally planned. Also, HP-UX 11.0, which is PA-RISC only, is not supported on IPF. Only HP-UX 11.20 and later are supported. HP-UX 11.22 is the first customer-visible release of HP-UX on IPF.
The endianism (bit ordering) is still "little," just like on the IA32, so you don't have to worry about that at all.
Misleading -- the endianism is still a part of the processor state (i.e. context-dependent). This means it can be both big and little endian, and can switch when an OS switches context. HP-UX, for example, is big-endian on IPF.
The rest of the article had generic ANSI C programming tips which everyone knows already -- nothing specific to IPF.