No, that's not correct. The Opteron, Athlon, Sempron etc. are completely different chip designs. It's not like the fastest chips are sold as Opterons, and the slowest are sold as Sempron. The designs and the processes for manufacturing those designs are significantly different. I was referring to high-end designs (Opteron) vs. low-end designs (Sempron), not fast vs. slow clock speed (which is determined by process variation).
Wrong. Do you have any idea what the margins are on Opteron chips? It's like printing money. Given the red-hot demand for Opterons right now, do you honestly think AMD would scale back production on those to fill their fabs with low-end, low-margin chips? Not a chance. They'll make high-end parts first, then fill up the remaining capacity with lower-end chips.
You're thinking of layers of metal interconnect, which all ultimately connect to a single layer of transistors. This technique has been in use for decades.
The article is referring to multiple layers of transistors, which is not exactly a new idea in research circles but is definitely not in production anywhere.
By the way, I'm certain that P4 and AMD64 chips have more than 7 (and certainly more than 4!) layers of interconnect. 9-10 layers is more reasonable.
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So go to a professional printing lab instead of the local Mega-Mart.
No, that's not correct. The Opteron, Athlon, Sempron etc. are completely different chip designs. It's not like the fastest chips are sold as Opterons, and the slowest are sold as Sempron. The designs and the processes for manufacturing those designs are significantly different. I was referring to high-end designs (Opteron) vs. low-end designs (Sempron), not fast vs. slow clock speed (which is determined by process variation).
Wrong. Do you have any idea what the margins are on Opteron chips? It's like printing money. Given the red-hot demand for Opterons right now, do you honestly think AMD would scale back production on those to fill their fabs with low-end, low-margin chips? Not a chance. They'll make high-end parts first, then fill up the remaining capacity with lower-end chips.
Sounds like a cool trick, IBM Powerbooks don't have that Windows key, so I can't test it out right now....
Would it have killed IBM to use a standard keyboard?
Probably wouldn't matter, as Apple would have already killed IBM for making Powerbooks.
Why would they want you buying a Dell preinstalled with OSX when you could buy an Apple with preinstalled OSX?
You're thinking of layers of metal interconnect, which all ultimately connect to a single layer of transistors. This technique has been in use for decades.
The article is referring to multiple layers of transistors, which is not exactly a new idea in research circles but is definitely not in production anywhere.
By the way, I'm certain that P4 and AMD64 chips have more than 7 (and certainly more than 4!) layers of interconnect. 9-10 layers is more reasonable.