Well.... its semantics... is a fire and forget air to air missile a drone? if so (I think it is) then the dog-fighting question is moot, SAM's (surface to air missiles) and air to air missiles (like the AIM-120 ) are nearly impossible to dodge ("dogfight") - if fired in the correct envelope with a good lock, the prob of kill is damn near 100%.
The real quest for air dominance doesn't involve human versus human, it is missile vs human, and soon to be missile versus UAV. Even cooler: uav vs uav...
OK,
I never flew f-16's, but I did fly C-5's... lots of buttons, switches and MFD's... waaaayyyy too many. As much money as the USAF pays for avionics, my alpine iva-w205 has a tactile feedback on the touchscreen that is way more advanced than what I worked with in FRED... The feedback system is kinda weird and creepy at times... but its basic idea is innovative.. why is this in a car stereo and not on some cool computing devices or lcd based fingerworks touchstream keyboard?
Perhaps some braile-based feedback touchscreen could do it...
More fun : apply small electrical shocks to the user's fingers for even better feedback possibilities... but I am not sure that's gonna sell.
JP102235
typed on a fingerworks touchstream keyboard with no feedback whatsoever!
#1: you do test these chips before the saw step (chopping the wafer up into individual die) #2: its hard to predict speeds/vcc/temp sensitive yields at that stage, but you do test all the die and usually check for full functionality (as much as the test coverage allows) #3: once packaged, the chips are "binned" to functional fails, speed grades. etc, and are tested at temp, vcc limits for speed sorting. so you could have 1 core that fails at 30C with a high vcc, but the others are ok (this is should be rare since they all sit together on the wafer in close proximity, and thus shouldn't vary much from each other) #4: nanoscopic defects occur and could take out one or two of the die. It would be advantageous to bin this out as a tri/dual core. #5: I am 100% sure that if these become popular, there will be some chips that pass all tests fully, but have one core disabled. happens all the time.
Well, inverting logic is well, logical (no pun intended) to most modern digital logic designers of the CMOS type. CMOS logic (and its variants) are inherently inverting. That is, the basic gate in CMOS is an inverter. The next higher complexity of gates in CMOS is a NAND and NOR (AND NOT / OR NOT). To make an AND gate requires a NAND and an Inverter... same thing for OR : a NOR and an Inverter. Although the quantum abstraction of computation may not be the same as CMOS (inverting layers of logic) it is not surprising at all that the designers tried to make an inverter first. Had they started during the days of relays, we might have had a different gate altogether.
JP
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Well.... its semantics... is a fire and forget air to air missile a drone? if so (I think it is) then the dog-fighting question is moot, SAM's (surface to air missiles) and air to air missiles (like the AIM-120 ) are nearly impossible to dodge ("dogfight") - if fired in the correct envelope with a good lock, the prob of kill is damn near 100%.
The real quest for air dominance doesn't involve human versus human, it is missile vs human, and soon to be missile versus UAV. Even cooler: uav vs uav...
jp
OK, I never flew f-16's, but I did fly C-5's... lots of buttons, switches and MFD's... waaaayyyy too many. As much money as the USAF pays for avionics, my alpine iva-w205 has a tactile feedback on the touchscreen that is way more advanced than what I worked with in FRED... The feedback system is kinda weird and creepy at times... but its basic idea is innovative.. why is this in a car stereo and not on some cool computing devices or lcd based fingerworks touchstream keyboard?
Perhaps some braile-based feedback touchscreen could do it... More fun : apply small electrical shocks to the user's fingers for even better feedback possibilities... but I am not sure that's gonna sell.
JP102235
typed on a fingerworks touchstream keyboard
with no feedback whatsoever!
ok, I am an IC test engineer:
#1: you do test these chips before the saw step (chopping the wafer up into individual die)
#2: its hard to predict speeds/vcc/temp sensitive yields at that stage, but you do test all the die and usually check for full functionality (as much as the test coverage allows)
#3: once packaged, the chips are "binned" to functional fails, speed grades. etc, and are tested at temp, vcc limits for speed sorting. so you could have 1 core that fails at 30C with a high vcc, but the others are ok (this is should be rare since they all sit together on the wafer in close proximity, and thus shouldn't vary much from each other)
#4: nanoscopic defects occur and could take out one or two of the die. It would be advantageous to bin this out as a tri/dual core.
#5: I am 100% sure that if these become popular, there will be some chips that pass all tests fully, but have one core disabled. happens all the time.
JP
Well, inverting logic is well, logical (no pun intended) to most modern digital logic designers of the CMOS type. CMOS logic (and its variants) are inherently inverting. That is, the basic gate in CMOS is an inverter. The next higher complexity of gates in CMOS is a NAND and NOR (AND NOT / OR NOT). To make an AND gate requires a NAND and an Inverter... same thing for OR : a NOR and an Inverter. Although the quantum abstraction of computation may not be the same as CMOS (inverting layers of logic) it is not surprising at all that the designers tried to make an inverter first. Had they started during the days of relays, we might have had a different gate altogether. JP