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  1. Flaws in the CBDTPA aka SSSCA II on Seeking Arguments Against the CBDTPA? · · Score: 1

    The following is the text of a letter that I sent to my state senators and congressmen...

    Please oppose S2048: the "Consumer Broadband and Digital Television Promotion Act".

    As a Computer Scientist, Software Engineer and Electrical Engineer with 20 years experience I can unequivocally say that the "Consumer Broadband and Digital Television Promotion Act" a.k.a. SSSCA II is inherently impossible to implement, as written, using any known software or hardware technology.

    Section 3.(d).(1).(A) through 3.(d).(1).(I) are contradictory requirements that can never be satisfied together. Any device or technology that does not satisfy section 3.(d).(1).(I) will result in products that cannot be sold because no customer will pay the price. Any technology that satisfies section 3.(d).(1).(A), (B), (C) and (F) would require an internet connection for each such device and therefor will fail to satisfy section 3.(d).(1).(I).

    The only possible means of encoding any digital content that will be (A) reliable, (B) renewable (C) resistant to attack, and (F) applicable in multiple technology platforms, would be to have a globally unique identifier for each target device that the content will be played or performed on and to individually encrypt the content for the target device or download the decryption key to the target device so that it can only be decrypted and played on the target device. All other methods of encryption will fail to be either (C) resistant to attack, or (F) applicable in multiple technology platforms.

    The nature of encryption is such that you cannot attach the decryption key to the encrypted data and expect it to be (C) resistant to attack. This is the fatal flaw in the encryption used on DVDs as was shown by the trivial attack used by the DeCSS program.

    Any media that contains an individually and uniquely encrypted file but does not contain the decryption key would require an internet connection in order to access the decryption key associated with the specific encrypted file. The requirement for an internet connection would add $100-$300 to the cost of each such device except for a fully configured Personal Computer. $100 added cost for incorporating a modem would be doubling the price of a CD player and if the CD player was in a car it would require an added $300 since it would require a cell phone as well as a modem in order to be able to connect to the internet to access the encryption keys for each encrypted file. In addition to the hardware costs there would be the cost of an additional phone line or a cell phone account and an ISP account which would add a cost of at least $50 per month making such media unavailable anyone who cannot afford the $50 per month.

    The inevitable consequence of these conflicts in conjunction with the word "practicable" in section 3.(d) will be to guarantee that the "copyright owners" will insist on rules that match what was in the original draft of the SSSCA "3.(d) SECURITY SYSTEM STANDARDS. -- In achieving the goals of setting open security standards that will provide effective security for copyrighted works, the security system standards shall ensure, to the extent practicable, ...".

    Any technology that would meet the requirements of the SSSCA would violate 3.(e).(1) "promoting as many lawful uses of copyrighted works as possible" and 3.(e).(2) "prevent a lawful recipient from making a personal copy for lawful use in the home".

    Section 3.(e).(2) contradicts the "Doctrine of Fair Use" for "Space Shifting" as affirmed by the US Supreme Court. Fair Use "Space Shifting" allows the playing of a copy of a copyrighted work on any device owned by or in the possession of a person who has legally obtained an original copy of a copyrighted work. Section 3.(e).(2) in conjunction with the DMCA would restrict "Fair Use" to Television broadcasts and would exclude music CDs, video tapes and DVDs and any other media that is embodied in a material object or transmitted via the internet.

    Section 6 makes the practice of maintaining or fixing a computer or any other compliant device a criminal act. All electronic devices inevitably fail and need to be repaired. Section 6.(a).1 makes it a crime to "knowingly remove or alter any standard security technology in a digital media device lawfully transported in interstate commerce, ..." which makes it a crime to fix any such device.

    Section 7 attaches the CBDTPA to the DMCA and since the DMCA is both unconstitutional and self contradictory, the CBDTPA cannot be validly interpreted by the courts.

    Section 4, section 6.(a).2 and section 9.2 combined create an undue burden on ISPs ("interactive computer service" providers) and on customers. Unique, per-device encrypted media would require transmitting between 5 million and 5 billion bytes of data per target device for each copyrighted work played on that device. This is because the work must be uniquely encrypted for each target device. Transmitting such large quantities of data would cost as much as the original purchase price of the copyrighted work for each device it is to be played on. The aggregate quantity of data that would need to be transmitted would be as large as the total internet traffic of the US. This would require doubling the capacity of the internet itself which would cost billions of dollars and would have to be paid for by the "interactive computer service" providers.

    Section 9.3 is unclear. Section 9.3 does not make explicit exactly what constitutes a "Digital Media Device" or if a component of such a device is distinguished from the whole device for the purposes of the act. A microprocessor or microcontroller is a required component of any "Digital Media Device", but, section 9.3 does not distinguish between a microprocessor or microcontroller used in a "Digital Media Device" and a microprocessors or microcontroller used in a toaster or traffic light controller. The same microprocessor or microcontroller may be used in both devices and the microcontroller in a toaster can "reproduce copyrighted works in digital form" if it has a means of accepting input and providing output. Because of the economies of scale, almost all microcontrollers contain digital input and output ports and are programmable and so would be classed as a "Digital Media Device" even if the microcontroller was incorporated into a toaster or a traffic light controller. "DEFINITIONS: In this Act (3) DIGITAL MEDIA DEVICE. -- The term "digital media device" means any hardware or software that -- (A) reproduces copyrighted works in digital form; (B) converts copyrighted works in digital form into a form whereby the images and sounds are visible or audible; or (C) retrieves or accesses copyrighted works in digital form and transfers or makes available for transfer such works to hardware or software described in subparagraph (B)".

  2. use a standard mainframe tape library on Large-Scale Video Archiving? · · Score: 1

    2 IBM 3494 Tape Libraries will give you 2 weeks of
    online storage along with a backup system to handle
    recovery. The tapes can be unloaded by frames with
    1 days data taking about 150 60GB tapes.

    Each 3590 tape drive can record a frame of 10 60GB
    tapes at 14MB/sec so 150 cameras can be recorded
    on 1 tape drive. 8 Tape drives can handle your
    data rate (16 drives with full redundancy).

    No special automation or Silo is needed. A Human
    Tape Operator can unload a full frame from each
    drive once each 8 hour shift and file it away in a
    library.

    You would be need to archive 150-200 tapes a day.
    A library to hold 7 years of tapes would take
    90x20 foot long by 6 foot high, double sided,
    sliding tape racks. You would need a 30x145 foot
    tape library room.

    Your access time to get to any particular frame,
    recorded on any previous day would be about 15
    minutes.

    3590 Tapes have a guaranteed 7 year archival life
    and can be extended indefinitely by re-copying them
    every 5 years.

  3. Terra Soft-pre configured Black Lab Linux clusters on Wanted: Turn-Key 10-Node Beowulf Cluster · · Score: 1

    Complete 8 CPU cluster, $17319.00 + Shipping

    THE briQ Cluster

    8x 5.25" slit case
    8x PowerPC 7400 (G4) 500 MHz
    8x 1MB L2 Cache at 250 MHz
    8x 512 MB SDRAM, 3.3V (up to 8 GB per cluster)
    8x 2.5" IDE 40 GB, internal to each briQ
    4x 3.5" Ultra100 IDE 130GB, in alternate slots
    with 4 briQ CPUs
    300 Watt power supply
    Internal 8 port 10/100 Ethernet switch with
    Gigabit Ethernet upliink.

    Installed Software:
    YDL 2.0 or Black Lab Linux

    PowerPC 7400 (G4) 500 MHz
    1 MB L2 Cache per CPU at 1/2 processor speed

    Northbridge - IBM CPC710-100+
    100 MHz 64-bit 60x System Bus
    Southbridge - Winbond W83C553

    2x168 Pin DIMMs, up to 1Gb of SDRAM
    Open Firmware Boot ROM/BIOS, supports remote boot
    up to 40GB 2.5" IDE internal to the briQ case
    up to 2 3.5" IDE external to the briQ case
    16550C UART, DB-9 connector
    10/100Base TX Ethernet, Dual 10/100 optional
    Power Consumption: 20 to 40 Watts per CPU node
    64-bit, 66mhz PCI, Custom 66MHz PCI connector
    Programmable Vacuum Florescent Display (VFD)
    2 lines X 20 characters Two push button switches
    bi-color LED

  4. The RTLinux Patent is Invalid, IBM has prior art on FSF Statement on Violation of GPL by RTLinux · · Score: 2, Interesting

    IBM Published Proir Art that embodies the same
    idea as the RTLinux Patent in releasing in 1967
    the CP67 kernal for the Cambridge Monitor System.

    CP67, VM and the IBM System/390 Virtual Image
    Facility all describe and embody a Real Time
    Kernal that runs an entire operating system
    (which may be Linux) as a process and that
    prevents the client OS (Linux) from disabling
    interrupts on the actual CPUs while giving the
    appearance of having done so to the client OS.

    This is the direct lineal ancestor of the VM/390
    and z/VM Operating System and of the System/390
    Virtual Image Facility for Linux Kernal that allows
    40,000 copies of Linux to run concurrently on a IBM
    zSeries mainframe.

    Since the Source code for CP67 and all user mods
    were published and provided freely to anyone who
    had an IBM or compatible Mainframe it could be said
    to have been the father of the GPL.

  5. The Twin Towers should NOT have collapsed!!!... on U.S. Attack -- More Updates · · Score: 3, Interesting

    When The World Trade Center was being built there
    was a heated controversy over the possibility of
    one of the Twin Towers buildings collapsing if it
    was hit by a large airliner.

    People remembered that the Empire State Building
    was twice hit by a plane. once by a small plane
    and then by a WW2 vintage bomber.

    New Yorkers were promised that the Twin Towers
    were designed to survive a crash of a Boeng 747
    Airliner into the middle of one side of the
    building or a corner.

    The virtical steel columns that make up the sides
    of the Towers were supposed to be strong enough
    to survive the impact of a 747 and also to be
    strong enough so that 1/2 of the columns on 2
    sides could be destroyed and the Tower would still
    remain standing.

    Each virtical column is supposed to be tied to the
    2 adjacent column by a heavy steel I beam at each
    floor. The interior floors could collapse onto
    lower floors but the engineerring spaces that are
    placed every 10 floors are supposed to halt such
    a collapse.

    The way that the Twin Towers both collapsed from
    the top down with the virtical columns peeling
    apart indicates that the contracters and the
    World Trade Authority lied about how the Towers
    were constructed.

    If the World Trade Center Towerrs had been built
    as they were supposed to have been they would have
    been severely damaged but they would not have
    collapsed and 10,000 people would still be alive.

  6. What B2/A1 security is all about on Certifying Software As Secure? · · Score: 1

    In addition to MANDATORY authentication and
    auditing, B2/A1 security rating requires that
    there be NO POSSIBILITY that a user can access
    any information or perform any operation that
    is not allowed by the user's security rating.

    This means that the OS must be PROVED to have
    no "Buffer Overrun" errors or any other bug by
    which a user can get access to any priviledges
    beyond what the user is entitled to.

    The final test is that even with complete source
    code and documentation of the entire OS, no
    loopholes can be found.

    This means that C++ is forbidden as well as C
    strings and any compiler and/or library that
    executes any code that is in the stack or heap.

  7. Peer Review with Trust Ratings == PGP Signatures on Buffy and Dr. Varnus · · Score: 1

    The PGP Public Key / Digital Signature algorithm has already implemented the perfect method for Peer Review of an online publication.

    All that is needed is to have a mechanism for reviewers to attach a digital signature to an article and another mechanism to alow viewers to rate the trustability of the reviewer by means examining the reviewer's history of article reviews and academic qualifications with the same trust network that PGP uses for evaluating signature keys.

  8. IBM did this with CICS in the early 1970's on Patent Attempt on some forms of Dynamic Web Posting · · Score: 3

    This patent described the process IBM implemented
    in it's CICS transaction processing system in the
    early 1970's. CICS implemented a system called
    Multi-Region Operation, where a Terminal Owning
    region would route transactions to various
    Application Owning regions, which would further
    route data requests to various Data Owning regions.

    Change the name of the Terminal Owning region to
    a Web Server and IBM's CICS is an exact duplicate
    of the patent.

  9. Nintendo Dolphin == IBM Blue Logic + iMac on IBM and Nintendo Partner on Dolphin · · Score: 3

    First posted on www.xlr8yourmac.com:

    IBM recently has entered the custom CPU business with it's Blue Logic
    library of CPU cores and peripherals. The following is a possible
    combination of IBM's currently available cores that would be perfect
    for Apple to use in a low cost portable.

    This chip would allow a 3 chip motherboard with more features than the
    current G3 350/DVD/MPEG Tower systems.

    Note: even though the CPU is only running at 200mhz the integrated
    peripherals would probably yeild performance better than a 266mhz
    PowerBook G3. For maximum performance, the PPC 405 core can be replaced
    by an external 333-466mhz Copper G3 CPU attached to the 60x bus/memory
    controller.


    PPC 405 CPU core (equivalent to an EC603E CPU)
    66mhz 60x CPU bus/memory controller interface
    2 independant on chip 64bit/66mhz I/O busses with crossbar switch
    2 independant 64bit/66mhz memory controllers
    1 32bit/33mhz Onchip Peripheral Bus
    1.2 Gigabyte/sec internal I/O data transfer rate (2x 528Mb/sec + 133Mb/sec)

    4 to 6 DIMM slots:
    2 SDRAM DIMMs up to 256meg main memory
    1-2 SGRAM DIMMs up to 32meg video texture and MPEG memory
    1-2 SGRAM DIMMs (on ATI RAGE 128 LC) up to 32meg video memory

    64bit/33mhz PCI bus
    AGP 2x Graphics bus


    Bus 1 PLB:
    200mhz PPC 405 CPU
    32k ICache/32k DCache
    66mhz 60x bus interface
    66mhz SDRAM controller
    8 channel DMA controller
    PLB/PLB crossbar switch
    PLB/OPB bridge
    PLB Arbiter
    64bit/33mhz PCI bridge

    Bus 2 OPB:
    Timers
    MPIC
    GPIO
    I2C
    100baseT Ethernet
    OPB Arbiter

    Bus 3 PLB:
    66mhz SGRAM controller
    8 channel DMA controller
    PLB/PLB crossbar switch
    C54X DSP coprocessor
    400Mbps Firewire
    MPEG
    MPEG AC-3 Audio
    PLB Arbiter
    AGP 2x bridge


    Note: the following diagram displays correctly in a fixed width font like courrer.

    66mhz
    60xbus66mhz
    SDRAMSGRAM
    ||
    +==============|================================ |==========================+
    |PPC60xbusmemory|
    |Memorycontlercontler|
    ||||
    |PPC405CPU--+----------PLB/Crossbar----------+-- C54xDSP-------{Serialout-
    |200mhz||16kdataram/64kcoderam|
    |32kICache|||
    |32kDCache|32/33OPB+--400MbpsFirewire{1394i/o-
    |+----PLB/OPB--+--EthernetSCP||
    ||||+--MPEGVideoDecoder|
    ||Timers--+--EthernetMAL||
    ||||+--MPEGAC-3Audio-{Audioout-
    ||GPIO----+--EthernetMAC||
    |8channelDMA-+|||+--8channelDMAcontroller|
    |||I2C--+--EthernetPHY||
    |PLBArbiter--+||||+--PLBArbiter|
    ||||MPIC|||
    |PLB/PCI|||100baseTPLB/AGP|
    |64/33|||EthernetAGP2x|
    |PCIbus||||||
    +==============|======|==|===|========+========= |==========================+
    ||||||
    ViaVT82C686ATIRage128LC
    SouthbridgeAGP2xVideo
    SuperI/O




    The PPC 405 CPU core is equivalent to the PPC EC603E (no FP unit).
    The FP unit core is not yet available in the Blue Logic library.

    PLB: Processor Local Bus, 64bit, 66mhz split transaction on chip CPU bus.
    OPB: On Chip Peripheral Bus, 32bit, 33mhz peripheral attachment bus
    (similar to a PCI bus).
    DMA: 2 - 8 channel intelligent DMA controllers with chained discriptors.
    Timers: 5 multi purpose counter/timers.
    GPIO: 32 General Purpose I/O lines.
    I2C: I2C serial port for sensing SDRAM confifguration and/or
    configuring peripheral chips.
    MPIC: Imbedded Programmable Interrupt Controller (OpenPIC compliant)
    with 32 interrupt inputs and 4 interrupt outputs.
    SCP: Serial Communications Processor (subset of the 68302 SCP).
    MAL: Memory Access Layer (Logical Level API for serial communications).
    MAC: 100baseT Ethernet Media Access Controller.
    PHY: 100baseT Physical Media Controller.
    C54X: C54x Digital Signal Processor, binary compatible with TI C54x
    (16k data ram, 64k code ram).
    Firewire: 400Mbps Fire Wire plus MPEG sequencer
    (allows playing MPEG encoded video streams from a Firewire DVCam).
    MPEG: MPEG video decoder, MPEG audio layer 3 and Dolby AC-3 audio.
    AGP 2x: AGP 2x port for video controller.
    PCI64: 64bit, 66/33mhz PCI controller (PCI 2.2 compatible)

    VIA: Via technologies VT82C686 Super South Bridge
    SoundBlaster Pro Hardware and Direct Sound Ready
    Integrated AC-97 2.0 (meets PC98 (TM) Basic Audio spec.)
    - Dual full-duplex Direct Sound channels between system memory
    and AC97 link
    - PCI master interface with scatter / gather and bursting capability
    - 32 byte FIFO of each direct sound channel
    - Host based sample rate converter and mixer
    - Standard v1.0 or v2.0 AC97 Codec interface for single or
    cascaded AC97 Codec's from multiple vendors
    - Loopback capability for re-directing mixed audio streams into
    USB and 1394 speakers
    - Hardware assisted FM synthesis for legacy compatibility
    - Direct two game ports and one MIDI port interface
    Integrated Super I/O:
    FDC,
    ECP/EPP parallel port,
    2 serial ports,
    IRDA port with seperate 3rd serial port
    Voltage, temperature, and fan speed hardware monitoring
    UDMA/33 / ATA-66
    Advanced mobile PC power management
    Supports ATAPI compliant devices including DVD devices
    USB
    ACPI

    ATI Rage: ATI Rage 128 LC (for Digital LCD screens)

  10. Superconductor/Insulator == Josephson Junction on Using Superconductors as Insulators · · Score: 2

    This is just a Josephson Junction Gate.

    Back in the 1970's IBM researchers invented the
    Superconducting Josephson Junction Gate. In the
    1980's IBM produced a 1ns 1kx8 ram chip that ran
    at a temperature of 2.5 Kelvin.

    The Josephson Junction Gate is made of a strip of
    Superconducting material that has a high resistance
    when it is not Superconducting. Above the gate
    strip is a single turn coil of a superconducting
    material that generates a field that will exceed
    the critical field for the strip and turn it
    non-superconducting. The Coil is connected to the
    input and the gate strip is connected to the
    output. The Josephson Junction Gate functions like
    a field effect CMOS gate except that it switches
    current instead of voltage.

  11. Microsoft was too late... The challange was closed on Few Quickies · · Score: 2

    February 22, 1999

    Oracle Closes Million Dollar Challenge With 13 Leading TPC-D Benchmarks on Oracle8i(tm)


    REDWOOD SHORES, Calif., Feb. 22, 1999--Oracle Corporation today announced another
    leading TPC-D benchmark on Oracle8i(tm) and Sun Enterprise 10000 Server. This is the latest
    of 13 leading benchmark results which improves by 70 percent over the previous world record,
    also held by Oracle8i, and marks the close of the Oracle Million Dollar Challenge. Larry
    Ellison, Chairman and CEO of Oracle, issued the Oracle Million Dollar Challenge at his
    keynote during Fall COMDEX in November last year. The challenge was for Microsoft, or
    anyone else, to make Microsoft SQL Server 7.0 run better than 100 times slower than Oracle8i
    database running a particular industry standard benchmark query. Microsoft did not respond to
    the challenge, which has been posted on Oracle's Web site (http://www.oracle.com/challenge/)
    for the last 3 months.

    "Microsoft has had more than three months to respond to the challenge and we haven't heard a
    word from them," said Jeremy Burton, vice president of Server Marketing at Oracle. "This is
    because SQL Server 7.0 is years behind in data warehousing technology; they have yet to
    publish a single TPC-D result. Any customer considering SQL Server should have serious
    concerns about their failure to demonstrate performance in the critical data warehousing spac