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http://www.sandpile.org/x86/opc_enc.htm its a mess, with 64bit we have a prefix byte , 1 to 4 bytes for the op, mod byte, and above that with avx we have the DREX byte, potentially imm byte. etc. I see no reason why intermediates can't occupy the space the next instruction would have and be aligned to the size of the fixed instruction length. that one exception to the fixed size rule shouldn't cause that much trouble for decoding of instructions.

The thing is, the x86 CPUID instruction gives you many different things in EAX/EBX/ECX/EDX depending on what you put into EAX before you execute it. The "GenuineIntel"/"AuthenticAMD" strings are what you get when you put 0 in EAX. When you put 1 in EAX, you get various feature bits in ECX and EDX, such as support for SSE/SSE2/SSE3. Any code worth its salt will base any decisions on those feature bits from CPUID function 1, not on the string you get from CPUID function 0.

I went back and checked the source for that number, and it was AMD's CTO estimating the transistor count for the K8 core, which had between 70 to 230 million transistors, depending on the size of the caches. The Conroe core has approx. 290 million transistors (4MB L2), while the Yorkfield XE has 820 million transistors on two dies (6MB L2 per die). I don't know the transistor counts for the POWER7, but according to Wikipedia the POWER6 has about 790 million transistors, likely due to the per-core 4MB L2 caches.

So the actual CPU logic part of the core is dwarfed by the monster caches in modern processors, and the instruction decoder part is a small part of that.

The problem with giving away driver source code is that it inhibit a company from being able to recover its research and development costs effectively because of the likelihood of somebody else figuring out the hardware interface specs from the driver and reverse engineering a compatible product for a fraction of the cost (because figuring out a way to do something that somebody else has already done is a lot easier than inventing the idea in the first place), and it would price the first company's product out of the market before they've recovered their R&D costs.

I have trouble parsing long run-ons, but I think I figured out what you're saying. And I really don't see your point.

Knowing how a driver interfaces with a chip does not make it easier to understand how a chip works. The only way to understand that is to have a deep knowledge of the silicon.

Example: While Intel used the 80x86 mnemonic for their commodity CPUs, there was no legal means by which Intel could prevent the duplication of those chips in their primary market. (In fact, when AMD began producing AM386 and AM486 chips that were pin-compatible with Intel's 80386 and 80486 chips, Intel sued AMD and lost, since this is common practice throughout the semiconductor industry. For example, the 74xx and its low-power variants - 74Cxx, 74HCxx, etc. - has been manufactured by everyone from National Semiconductor to Motorola, where the competition for price has been tradtitionally very good.) Thus, after Intel failed to prevent AMD and Cyrix from producing clones of their chips, they tademarked the "name" of the chip, calling it the Pentium. IIRC, AMD licensed the x86 ISA to continue producing their AM586 chips. When their license terminated, they began developing a "80x86-compatible ISA" that made it possible to produce the K6, and later the Athlon and friends. They have invested billions in R&D to produce a chip that is ISA-compatible, but not pin-compatible with Intel's offerings. Cyrix (now ViA) and Transmeta did the same.

Simply because one is "intimately familiar" with the x86 instruction set because it is well-documented does not mean it is therefore "easy" to produce such chips. They contain an enormous amount of complexity at the logic level, just to interpret a 0x90 byte as "no-op." Previously, any company wishing to produce an electrically-compatible variant of another company's offering would crack open the plastic case and analyze the silicon (if it was complex, as in the case of the 80x86) or simply work their design around the electrical properties of the package (as in the case of the 74xx), especially since the components are well-understood: all engineers are familiar with the operation of a transistor.

Thus, I don't see how your argument applies. If a Chinese company wishes to duplucate NVIDIA's GPUs, they would either crack open and analyze the silicon or conduct industrial espionage (i.e., raid TSMC). However, knowing what commands mean when sent over a PCI bus to the chip in question is a completely different aspect of the problem. It's truly like saying you know how to build a car because you assembled a steering wheel.

x86 basically has 8 general-purpose registers (though it probably isn't possible to use all of them at once). AMD had the brilliant foresight, however, to add 8 more registers for long mode.

The Intel archetechture has a swap instruction, or rather XCHG

Now I can toast two pieces of bread at once.

-1, Welcome to 2001.

Or maybe you just didn't understand the guy? He was probably just saying you couldn't play a video and do any other math at the same time at the processor level which seem true enough to me. Probably the fact he was fat, greasy, and lacked social skills predisposed you to misinterpreting him. Yeah, ok that's still a bad image for Apple...

...but Intel processors are the suck. If processors weren't a prime example of market lock-in there would be no reason to use any x86 (even AMD) over Power, or over 68k back in the day. Check sandpile.org and see if you can made any sense in the instruction set.

The only major x86 acquisition that I can recall AMD making was their purchase of NexGen back in the mid 90s. (http://www.cpushack.net/CIC/otherpr/amd-nexgen) For those who don't recall, Nexgen had produced the Nx586 chip which ran in their own custom socket and motherbaords. They were in the process of finishing their updated Nx686 design with and integrated FPU. The Nexgen Nx686 design was never released, but was altered to become the AMD K6. (http://www.sandpile.org/impl/nx6.htm) The K5 design team along with many former DEC employees were responsible for the K7 design. That's the big reason that the K7 (aka Athlon) used the EV6 bus created by DEC for the Alpha.

You should check this article instead of talk nonsense. http://www.linuxgazette.com/issue32/henning2.html And for power consumption I suggest you these links: http://www.sandpile.org/impl/m2.htm http://www.sandpile.org/impl/p5.htm http://www.sandpile.org/impl/k6.htm Seems like you know something about CPU so i don't need to tell you who's Christian Ludloff right? in case you ask about the web site.

You should check this article instead of talk nonsense. http://www.linuxgazette.com/issue32/henning2.html And for power consumption I suggest you these links: http://www.sandpile.org/impl/m2.htm http://www.sandpile.org/impl/p5.htm http://www.sandpile.org/impl/k6.htm Seems like you know something about CPU so i don't need to tell you who's Christian Ludloff right? in case you ask about the web site.

You should check this article instead of talk nonsense. http://www.linuxgazette.com/issue32/henning2.html And for power consumption I suggest you these links: http://www.sandpile.org/impl/m2.htm http://www.sandpile.org/impl/p5.htm http://www.sandpile.org/impl/k6.htm Seems like you know something about CPU so i don't need to tell you who's Christian Ludloff right? in case you ask about the web site.

yeah, I thought they shoulda been at Hexium too... considering their Pentium Pro (and later Celeron) chips were called 80686... They should be at Septium right now, because I b'lieve the P4 core is called 80786... wait, that's not true! look what I found:

There is no such thing like 80786! The last was 80486, and becouse of legal issues Intel changed its "labels" to PENTIUM class (I remember NEXTGEN was involved).
My ways of thinking (CAN BE NOT TRUE):
80586 class = Intel Pentium, or 100% compatibile
80686 class = Intel Pentium MMX, or 100% compatibile
80786 class = AA-64 (or AMD64) and EM64T CPU's, or 100% compatibile (hope to be, for now ONLY MY ASSUMPTION)
this way Intel Pentium II,Intel Pentium III,Intel Pentium 4, AMD K6-2,AMD K6-3,AMD Athlons (in all mutations), some other, not mentioned CPU's, are just 80686 CPUs, with some additional instrucions.

Transmeta made a lot of fuss about energy efficiency, but in reality, the Intel LV and ULV mobile Tualatin P3 consumes almost as little power while being much faster. The best power/speed tradeoff seems to be the ULV P3 933mhz, 512kb L2 cache, 1.1V. The typical and maximum power consumption are 4 and 7W respectively.

Intel is now hyping the P-M just as heavily as Transmeta. The P-M can dynamically scale the frequency through a large range, but if you use CPU intensive apps, the power consumption can get suprisingly high (31W for the 1.5-1.7 ghz versions). For more facts and figures, see Sandpile [sandpile.org].
pjx

Transmeta made a lot of fuss about energy efficiency, but in reality, the Intel LV and ULV mobile Tualatin P3 consumes almost as little power while being much faster. The best power/speed tradeoff seems to be the ULV P3 933mhz, 512kb L2 cache, 1.1V. The typical and maximum power consumption are 4 and 7W respectively.

Intel is now hyping the P-M just as heavily as Transmeta. The P-M can dynamically scale the frequency through a large range, but if you use CPU intensive apps, the power consumption can get suprisingly high (31W for the 1.5-1.7 ghz versions). For more facts and figures, see Sandpile [sandpile.org].
rp

Transmeta made a lot of fuss about energy efficiency, but in reality, the Intel LV and ULV mobile Tualatin P3 consumes almost as little power while being much faster. The best power/speed tradeoff seems to be the ULV P3 933mhz, 512kb L2 cache, 1.1V. The typical and maximum power consumption are 4 and 7W respectively.

Intel is now hyping the P-M just as heavily as Transmeta. The P-M can dynamically scale the frequency through a large range, but if you use CPU intensive apps, the power consumption can get suprisingly high (31W for the 1.5-1.7 ghz versions). For more facts and figures, see Sandpile [sandpile.org].
ngm

Transmeta made a lot of fuss about energy efficiency, but in reality, the Intel LV and ULV mobile Tualatin P3 consumes almost as little power while being much faster. The best power/speed tradeoff seems to be the ULV P3 933mhz, 512kb L2 cache, 1.1V. The typical and maximum power consumption are 4 and 7W respectively.

Intel is now hyping the P-M just as heavily as Transmeta. The P-M can dynamically scale the frequency through a large range, but if you use CPU intensive apps, the power consumption can get suprisingly high (31W for the 1.5-1.7 ghz versions). For more facts and figures, see Sandpile [sandpile.org].
xo

Transmeta made a lot of fuss about energy efficiency, but in reality, the Intel LV and ULV mobile Tualatin P3 consumes almost as little power while being much faster. The best power/speed tradeoff seems to be the ULV P3 933mhz, 512kb L2 cache, 1.1V. The typical and maximum power consumption are 4 and 7W respectively.

Intel is now hyping the P-M just as heavily as Transmeta. The P-M can dynamically scale the frequency through a large range, but if you use CPU intensive apps, the power consumption can get suprisingly high (31W for the 1.5-1.7 ghz versions). For more facts and figures, see Sandpile [sandpile.org].
ai

Yeah, I forgot about PowerNow!. I didn't know about CnQ, though. Guess I was in too much of a hurry to look it up.

According to sandpile.org the P1 topped at 300mhz, the last model introduced in 1999.

According to Sandpile.org, the 3.4GHz Pentium IV Prescott can use up to 127W, and has a typical power usage of 103W (when browsing the web or reading email).
In my opinion, it is rediculous for a single processor to single-handedly run up your power bill. That's like having two light bulbs on 24/7 (assuming you keep your computer on), not to mention the power needed to cool your PC, let alone your house's air conditioner.

I would take a VIA chip for low-performance stuff, and an Athlon64 for performance computing. support 64-bit software including 64-bit Linux distributions, are faster than Intel's best even running 32-bit software, and they have a maximum power usage of 89W. Because of Cool'n'Quiet mode, they spend most of the time running at 800MHz consuming about 30-35W and generally not requiring a loud and abnoxious cooling fan.

It is actually impressive what the chips can do at 800MHz. You can play a full screen DVD at 1400x1050, and the CPU usage tops out at about 5% (at 800MHz). If, of course, you run something that requires more power, like a video game or a compiler, the processor instantly switches to full speed. Handy, that.

> I've read that the 750 in the iBook used less power than the southbridge, but I don't have references to back that up.

The 750fx consumes about 5.4 Watt @ 800mhz. Which is nice, but the Intel Mobile P3 ULV can go up to 933 mhz on 4 Watt.

About the $50 computer -- that was just a response to your implication that current computers cost $200 ($800 is probably a better current average). Just a "nighmare scenario".

However, I do believe that computers could get as cheap as $100 by the end of the decade -- little box, minimal expansion, 'low-end' low-power CPU. Without apps driving the CPU market, the bottom's the limit for corporate and home machines. The industry adjusted to $500 computers, they'll adjust to $100 ones.

I think you make some very good points on why AMD will be competitive -- and I never thought they wouldn't be. But if Intel comes at them on price, they're going to have to make some big adjustments (rev up K7 again, get K8 as cheap as possible, etc.)

To go back to the point that Intel has just cancelled their ENTIRE next-gen line of high-end x86 CPUs. Unprecedented. They've got to have something up their sleeve -- either a pricewar and/or a cheap, fast Itanium. They aren't going to roll over.

My P-M die size number came from here

Transmeta made a lot of fuss about energy efficiency, but in reality, the Intel LV and ULV mobile Tualatin P3 consumes almost as little power while being much faster. The best power/speed tradeoff seems to be the ULV P3 933mhz, 512kb L2 cache, 1.1V. The typical and maximum power consumption are 4 and 7W respectively.

Intel is now hyping the P-M just as heavily as Transmeta. The P-M can dynamically scale the frequency through a large range, but if you use CPU intensive apps, the power consumption can get suprisingly high (31W for the 1.5-1.7 ghz versions). For more facts and figures, see Sandpile.

As you say this is already supported by an appropriately compiled Linux kernel or XP-64 on the A64 & Opteron. The wider benefit for all of us is that this is to be included in XP SP-2 which will hopefully become endemic sometime this year. See this eWeek article . At that point this becomes an excellent marketing tactic for AMD. I haven't examined the IA32e documents for myself yet but those who have seem to think Intel have left out support of the NX flag - see sandpile.org. If this is true then Intel are handing AMD a real advantage as far as consumer marketing is concerned. Even I could spin that so that that it looked like more of an advantage than 64bit capability which to be honest is a real hard sell as far as your average consumer is concerned.

More importantly, an architecture whose registers are 32-bits wide is far less efficient when it comes to dealing with values that require more than 32 bits to express. Many floating point values use 64 bits and being able to directly manipulate these in a single register is a lot more efficient than doing voodoo to combine two 32-bit registers.

Most architectures have separate (64-bit or wider) floating point registers. (For example, IA-32 has 80-bit FP registers.) They never have to use use their general purpose (integer) registers for FP values. So a 64-bit architecture does nothing for FP. It's only important for manipulating 64-bit integer values. You may say "no one will ever need to count beyond 4294967295" but (a) someone does and (b) pointers are integers, and 64-bit pointers are one of the great advantages of a 64-bit architecture. Previously you needed (as you say) voodoo to combine two 32-bit registers and odds are the architecture didn't really have any support for addressing memory that way. Now with a 64-bit architecture you can stick it in a register and do normal operations with it.

As you correctly guess, the Prescott is a VERY major redesign of the P4 core. This article has pictures of both a Prescott and a Northwood die, and they are VERY different (side note: I'm not sure I buy his whole Prescott = 64-bit thing, but the article does have some useful data about the two chips).

In any case, while the power consumption numbers are all over the place, we do have some firm die-size numbers for the Prescott. If you look at Sandpile's P4 page, you can see that the Prescott is listed as having a 112mm^2 die (90nm node) with ~125M transistors. For comparison, the Northwood has a 131mm^2 die (130nm node) with 55M transistors.

A large chunk of the extra transistor budget is going towards the extra cache (the extra 512KB of L2 cache is a good 30M transistors all on it's own), and cache transistors pack in tightly, so the die size/# of transistors ratio ends up being a bit lower than you might expect from just a straight process shrink.

According to Sandpile.org, the 90MHz Pentium consumes a grand total of 9.0W of power when going full-bore. Transmeta's claiming power consumption numbers of about 6 or 7W for their chips. The Transmeta chips will have a slight advantage in terms of dynamic power management (almost non-existant on the old Pentium classic), but really we're talking about a few watts here. Throughout the course of a year you're looking at a difference of about $2 to $3 in electrical costs. At that rate, the Transmeta chips have got to be REAL cheap to beat out spending 5 or 10 bucks on a Pentium system.

It also seems that the Transmeta processor has an average power usage of around 7W whereas the Nehamiah (according to Digit Life) has an idle power usage of ~5W and a max of around 15-20W.

OK, I now know several things for certain. I was wrong about your WinXP cpu model display. There is something I hadn't considered at play here and we were both describing our experiences with Athlon processors and different motherboards.

Long story trimmed down to reasonable size can be found here. The extended name string in the Athlon processor is programmable by the bios via password protected MSRs ( Machine Status Registers). The bios writers get access to protected things AMD & Intel don't want us regular folks messing with.

I wrote a small asm program to dump the extended name via the cpuid instruction. My Abit boards and my Dad's Shuttle boards behave very differently. On my Abit boards, the only time the extended name matches the sold-as-speed model number is when it is set as a 1700+ in the bios. The motherboard knows the cpu is a 1700+ because of the default multiplier bridges and the fsb sense pins. If the cpu is set as user defined at 11x133=1467, the default for a 1700+, the extended name is just "AMD Athlon(tm)". On the Shuttle boards, they try to match the speed to the model numbers the bios recognises, regardless of multiplier and bus speeds.

Check out the first screenshot , scroll down one message. The cpu is an actual 2100+, reported as a 2700+ with the extended name and running at 2.595GHz, much faster than the 2.17GHz a 2700+ actually runs. It just happens that a 2700+ is the fastest cpu his board recognises by model number.

Look at the shots here and notice that none of the Athlon names include a model number. Their bioses didn't set an extended name so it is still defined as AMD set it. Athlons don't have the model number embedded in the cpu except as read via the multiplier/fsb bridges and the bios sets the extended name to include the model number, not AMD. If you want a copy of my 193 byte util, just email me. Also, this was my next brilliant theory. 8^}

It just happens that all of the boards I routinely use to build systems do not try to always match cpu speed to model numbers. At least I learned something today.

Intel (and most CPU makers') processors support the CPUID instruction. There is a method available on Pentium 4 processors and later that report the "factory" speed. What CPUID returns is determined by the values in EAX before the CPUID is executed. More information here.

Also, Intel does provide a utility to measure the current speed of the processor and report various other things like cache size and package type. Available here.

/*These comments express my opinions, not my employer's*/

Well, I double Linus knows that much about IA32. After all Linux is coded in C. However, Transmeta has Christian Ludloff of www.sandpile.org fame working for them. If it comes to the IA32 ISA he is definitely the guy.

Okay, here is an article indicating how powerful the Dragon is. Six million transistors, which the article says makes it as powerful as a 486. That may be an underestimate. The original Pentium was about 3.1 million transistors according to sandpile.

6 million transistors is something like a tenth of the a P4, a sixth of the K7, two-sevenths of a VIA cyrix III.

OTOH, I don't recall for sure if the original Pentium (or derivatives, like P54C) were known as "P5". If they had, then it's already time for a name change for the successor of the P4.

The "P5" refers to the original, 5 volt, socket 4 pentiums, that ran at 60 and 66 megahertz. The P54 were the 3.3 volt, socket 7 pentiums, from 75 -> 200 megahertz. The P55 was the split voltage Pentium MMX, from 133 -> 300 megahertz, which also used socket 7.

OTOH, I don't recall for sure if the original Pentium (or derivatives, like P54C) were known as "P5". If they had, then it's already time for a name change for the successor of the P4.

The "P5" refers to the original, 5 volt, socket 4 pentiums, that ran at 60 and 66 megahertz. The P54 were the 3.3 volt, socket 7 pentiums, from 75 -> 200 megahertz. The P55 was the split voltage Pentium MMX, from 133 -> 300 megahertz, which also used socket 7.

OTOH, I don't recall for sure if the original Pentium (or derivatives, like P54C) were known as "P5". If they had, then it's already time for a name change for the successor of the P4.

The "P5" refers to the original, 5 volt, socket 4 pentiums, that ran at 60 and 66 megahertz. The P54 were the 3.3 volt, socket 7 pentiums, from 75 -> 200 megahertz. The P55 was the split voltage Pentium MMX, from 133 -> 300 megahertz, which also used socket 7.

It's just a Pentium 200 MMX, It shouldn't overheat too bad.

According to this site a Pentium 200 MMX's maximum power is 16 watts. Some of the very hottest 8-) newer CPUs expend quite a bit more. A 2 gigahertz P4 maxs out at 100 watts. Ouch! But 16 watts is still quite a bit.

It's too bad the author didn't take a close up picture of how he arranged the cooling channels.

It's just a Pentium 200 MMX, It shouldn't overheat too bad.

According to this site a Pentium 200 MMX's maximum power is 16 watts. Some of the very hottest 8-) newer CPUs expend quite a bit more. A 2 gigahertz P4 maxs out at 100 watts. Ouch! But 16 watts is still quite a bit.

It's too bad the author didn't take a close up picture of how he arranged the cooling channels.

An interesting article, with a lot of good truths from a business perspective. I can't believe he waffled on Slot 1 (Intel) vs. Slot A (AMD).

However, he does take credit for a lot that was, at best, shrewd investing on AMD's part. One of the Lost Tales in silicon history is the saga of NexGen, a little operation funded by Compaq and a few other players, which was the real developer of the microcode/x86-to-RISC architecture later seen in the K5 and K6 (-2 and -III flavors, too) cores. NexGen survived for a while, selling the two-chip Nx586 solution on some custom Alaris boards, but PCI versions were late in coming, and few, if any, versions were shipped with the fabled FPU. (As it was, you got the equivalent of a plain 80386 with the integer performance of a 100MHz Pentium, off a 90MHz core.)

AMD swooped in and bought the ailing company, using their engineering talent and one-chip Nx686 design to produce the K5. I thiiink a very small number of real Nx686s made it to market; TigerDirect was listing them back in 1996 or so.

Apparently AMD reorganized to produce the Athlon, and much of the NexGen team left or were laid off. Compared to the K6, the Athlon we know and love is something of a 'brute force' chip- NexGen designs relied on their very accurate branch prediction logic, while the Athlon threw it out in exchange for more execution units.

An interesting article, with a lot of good truths from a business perspective. I can't believe he waffled on Slot 1 (Intel) vs. Slot A (AMD).

However, he does take credit for a lot that was, at best, shrewd investing on AMD's part. One of the Lost Tales in silicon history is the saga of NexGen, a little operation funded by Compaq and a few other players, which was the real developer of the microcode/x86-to-RISC architecture later seen in the K5 and K6 (-2 and -III flavors, too) cores. NexGen survived for a while, selling the two-chip Nx586 solution on some custom Alaris boards, but PCI versions were late in coming, and few, if any, versions were shipped with the fabled FPU. (As it was, you got the equivalent of a plain 80386 with the integer performance of a 100MHz Pentium, off a 90MHz core.)

AMD swooped in and bought the ailing company, using their engineering talent and one-chip Nx686 design to produce the K5. I thiiink a very small number of real Nx686s made it to market; TigerDirect was listing them back in 1996 or so.

Apparently AMD reorganized to produce the Athlon, and much of the NexGen team left or were laid off. Compared to the K6, the Athlon we know and love is something of a 'brute force' chip- NexGen designs relied on their very accurate branch prediction logic, while the Athlon threw it out in exchange for more execution units.

P4 power consumption

If you want to stick with an Intel processor, you may want to look at the 0.13u version of the Celeron processor and cut the bus speed down to 66Mhz (if the chipset supports it) and cut down voltage (if possible). That should reduce the power consumption (and thus heat dissipation) by a fair amount.

My Athlon had some heat and manufacturing issues (this is my second chip because the first one was DOA), and really isn't any faster in the real world than my P4.

That's crap. P4s produce more heat than Athlons any day.

Here's the P4 max power chart. 1.3gigs put out almost 70watts
66.68 W (1.3 GHz 0.18 m PGA423 @ 1.70 V)
71.05 W (1.4 GHz 0.18 m PGA423 @ 1.70 V)
75.25 W (1.5 GHz 0.18 m PGA423 @ 1.70 V)
69.65 W (1.3 GHz 0.18 m PGA423 @ 1.75 V)
73.85 W (1.4 GHz 0.18 m PGA423 @ 1.75 V)
78.75 W (1.5 GHz 0.18 m PGA423 @ 1.75 V)
83.48 W (1.6 GHz 0.18 m PGA423 @ 1.75 V)
87.85 W (1.7 GHz 0.18 m PGA423 @ 1.75 V)
88.55 W (1.8 GHz 0.18 m PGA423 @ 1.75 V)
92.23 W (1.9 GHz 0.18 m PGA423 @ 1.75 V)
96.25 W (2.0 GHz 0.18 m PGA423 @ 1.75 V)
76.13 W (1.5 GHz 0.18 m PGA478 @ 1.75 V)
80.33 W (1.6 GHz 0.18 m PGA478 @ 1.75 V)
84.18 W (1.7 GHz 0.18 m PGA478 @ 1.75 V)
88.20 W (1.8 GHz 0.18 m PGA478 @ 1.75 V)
96.60 W (1.9 GHz 0.18 m PGA478 @ 1.75 V)
100.45 W (2.0 GHz 0.18 m PGA478 @ 1.75 V)
70.89 W (1.4 GHz 0.18 m PGA603 @ 1.70 V)
75.14 W (1.5 GHz 0.18 m PGA603 @ 1.70 V)
83.98 W (1.7 GHz 0.18 m PGA603 @ 1.70 V)
97.24 W (2.0 GHz 0.18 m PGA603 @ 1.70 V)

The Thunderbirds of course were AMD's hottest processors, and here is their chart:
1000 MHz TB: 54 W
1100 MHz TB: 60 W
1100 MHz TB: 63 W
1200 MHz TB: 66 W
1300 MHz TB: 68 W
1333 MHz TB: 70 W
1400 MHz TB: 72 W

Oh look. The 1.4gig Tbird produces less heat than the 1.4 gig P4, and of course schools the hell out of it.

Heat is a non issue in chip performance anyway. People just use it as an excuse to say something is better.

All data from www.sandpile.org

Manufacturing issues are irrelevant too. You have a sample size too small to be able to say that AMD chips have manufacturing issues based on one DOA. It could just as easily have been the Intel chip that was bad.

Duron is currently 100mm (al) while Athlon is 120mm (cu).. That the Clawhammer is 105mm doesn't seem that impressive given the shrink from .18 to .13 SOI. Especially since the PentiumIV will be down to 116mm (rumor: and possibly have an upgrade from 256K L2 to 512K L2 cache!) The fact that the Athlon is currently half the size of the PentiumIV and is overall slightly faster is (was) news worthy. The fact that the clawhammer is going to only be 91% of the size of the PentiumIV isn't really a big deal. Just because the PentiumIV takes 10% more die space isn't going to add up to much, especially since Intel has much more than 10% more fab space to throw at it. According to Ace's Hardware's 2001 shareholder's meeting coverage the Clawhammer will be introduced 2nd half of 2002. Anybody want to guess at what "But it will deliver more than three times the clock speed of the first Athlon..." means? According to sandpile the first Athlon was introduced on a .25 process at 500, 550, and 600Mhz Jun 23rd 1999, but went up to 700Mhz by Oct 4th before switching to a .18 micron process. I guess this means the clawhammer, with its .13micro SOI manufacturing and architectural enhancements over a standard K7, will reach atleast 1.5Ghz 2H 2002? I should hope so! 2Ghz seems like a better low end guess for clock speed, but it'll probably be closer to 2.5Ghz than 2..

So if a K7 capable of 1000Mhz uses 49 watts at 1000Mhz, and a K7 only capable of 750Mhz uses 35 watts, don't you think the 1000Mhz part would use 35 watts if it were underclocked to 750Mhz?

I'm not sure whether this means the whole OS and its apps will have to be either one or the other, but it is a definite strongpoint IMHO.

For what it's worth, sandpile.org has a lot of specs on existing x86 technology and the publicly available information on the upcoming x86-64 platform.