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AMD Shows Off 1.1 GHz Athlon
chamega writes "AMD demonstrated a 1.1 GHz processor Monday without any special cooling techniques. The processor is said to use "high-performance on-die Level 2 (L2) cache," whatever that means. " Perhaps, unlike Intel, they'll actually be able to /ship/ their high-end chips when they say they will.
Mhz races are not a particularly good performance indicator, Apple are saying that the G3 does 1 Gigaflop, which might be a more interesting way of comparing chips, especially if the length of the flop is defined. to assess performance I think you need to consider: clock speed instruction set (RISC / CISC / MMX) word length any performance optimisation like code morphing.
I want to play XMame games under KDE under ARM Linux under the arcem ARM emulator under Gnome/Enlightenment under OpenBSD under the 80x86 emulator under Linux 2.2! And I want 'em playable!
Seriously, this looks like one -very- nice processor. If they can get the scale down and have SMP on a single die, that would be even nicer!
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
To moderators: please moderate the above post up. This guy knows what he's talking about.
:-)
And I just want to add one more thing. To all those whoe are saying bus speed is the bottleneck: did you actually run the benchmarks to compare the speeds? Where did you get this idea from? Perhaps you just assume higher bus speed will necessarily speed up the computer immensely.
Well, there have been many benchmarks that show quite the opposite. The CPU is *not* limited by the bus speed. Even the 66MHz bus is more then enough to supply all the memory bandwidth the CPU needs. And that is why Celeron, with its 66MHz bus runs just as fast as "true Pentium 3" with its 100MHz bus.
Statements like "processor speeds above 400MHz don't make that drastic difference" are made by really clueless people. Reality check: take a look at the actual benchmarks. Even when running 3d games like Q3, memory bandwidth is *not* a bottleneck. L2 cache compensates for slow RAM quite nicely.
Of course, on the other hand, you don't need a 1.1GHz CPU to run a word processor/browse the interent. Well, not yet anyway (right, Bill?
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If you think big enough, you'll never have to do it.
These days the video card is the bottleneck, not the CPU. Get GeForce (IMHO the only 3d card worth getting) and you'll see *huge* improvement in speed, even with the same CPU. Of course there is no P6 board that has AGP slot...
But in any case, the video card is the limiting factor, not the CPU. And now that GeForce and a few other cards include the geometry engine which takes *all* graphics-related work away from the CPU and lets it do other things (like AI), even a P6-200 would work just as well. Then again, too bad no P6-200 board has AGP slot...
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If you think big enough, you'll never have to do it.
Uhhh... I'm getting so tired of this. No RAM technology is NOT becomming a bottleneck. Tom (www.tomshardware.com) tested p3-600MHz systems with standard pc100 SDRAM and 400MHz Rambus. Well, the Rambus systems were about 5% faster. But considering also that they had newer chipsets and, most importantly, on-die full-speed cache (as opposed to halh-speed cache of the old P3-600), one has to wonder what exactly caused the speed increase. Also, considering that Rambus is 6 *times* more expensive then SDRAM, the 5% speed increase does not look attractive at all.
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If you think big enough, you'll never have to do it.
Theoretically, what you are saying is true. However in practice it does not happen precisely because the curent memory bandwidth is enough. You also mention latency -- and yes, decreasing latency would benefit performance, but this is not what Rambus, PC133 SDRAM and DDR DRAM are designed to accomplish. Their goal is to increase the memory bandwidth which has nothing to do with latency.
In the benchmark I mentioned, Tom used 400MHz Rambus -- the fastest one currently available. It has exactly twice the bandwidth of PC100 SDRAM (800MB/s vs 1.6GB/s). And yet the performance difference was a whopping 5% on *some* benchmarks, even less on most. Keep in mind that Rambus is no less then *six times* more expensive then standard SDRAM.
Furthermore, there have been quite a number of benchmarks that show *no* difference in overall speed between 66MHz and 100MHz bus Pentium 2, given that the CPU speed is the same. Surprise surprise, cache is actually quite effective.
Now, when you have a SMP system, you may eventually run into memory bandwidth problems as the clock speed and the number of the CPUs increase. But it is a non-issue when it comes to single-CPU machines, even when playing 3d Games (Q3 comes to mind).
The real bottleneck is currently the video cards. NVidia GeForce and a few others include the geometry engine which takes care of *all* graphics related work. This is a step in the right direction. Even now the video card matter much more to a 3d game performance then the CPU and bus speed combined. And I expect the trend to continue.
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If you think big enough, you'll never have to do it.
I certainly agree with you here. It's nice to finally read a comment from somebody who actually understands what they are talking about.
However, I don't see how PC133 SDRAM or DDR DRAM would decrease latency. Wouldn't it just increase the bandwidth the same way Rambus does? Care to explain, please?
P.S. I should have said memory *bandwidth* is not the bottleneck. Lowering latency would certainly be helpful. Unfortunately Intel doesn't think so... or doesn't want to. Why does Intel insist on Rambus even now that it's clear the technology sucks?
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If you think big enough, you'll never have to do it.
Have you found an Athlon motherboard that runs the RAM at 133 MHz? I can't find one anywhere.
Not yet - but I plan to slap a serious cooler on it and do some overclocking. I have the Asus K7M board, which has support for higher bus speeds. So PC133 doesn't cost much more (about $10 for a 128 MB stick), and has a higher margin of tolerance.
I'm looking forward to the VIA chipset for Athlon (the Asus uses the AMD Northbridge, with a VIA Southbridge - the other current vendors use the full AMD chipset), as it should drive prices down and support PC133 RAM explicitly. But hey - I didn't want to wait. I can always build another Athlon system later on to run Linux on (my current one is my Win98 gaming PC and my Linux desktop is a PII-350).
- -Josh Turiel
-- Josh Turiel
"2. Do not eat iPod Shuffle."
Of course, I only paid $240 for my Athlon 600 processor, so I don't feel too deprived.
To the people wondering just how a system with only a 200 MHz bus (and PC100 RAM, at that) can be useful at 1.1 GHz:
First of all, if you're dropping the kind of change on one of these that is appropriate, you'll have more than a puny 64MB of RAM. It's liklier that you'll have at least 128 MB or probably 256 MB+. So you won't have a huge problem with disk thrashing. Just make sure if you were to use one of these beasts that the rest of the system is up to the task. That means a fast ATA or Ultra SCSI disk, a fast 3D card (don't be using no Rage Pro!), and the best memory that the system spec works with. I use all PC-133 nowadays.
On the other side of this is the processor itself. On-die cache (Celerons, CuMine PIII processors) is much faster than the variety that is mounted on the PCB (older PII and III and current Athlons). It can run at full processor clock instead of, say, 1/2 clock or 2/5 clock. Because of this speed advantage, less of it goes a long way. Older PII and PIII designs used 512k of on-board cache, which is replaced by 256k of on-die in the CuMines (128k in the Celery). With a big, fast L2 cache a lot of your instructions are fetched from cache and executed much faster - and of course a big L1 cache helps, too. Also, SDRAM does a better job of feeding data in bursts than older EDO and FP RAM did. But RAM technology is becoming the bottleneck lately. Rambus and DDR SDRAM is supposed to help, but DDR isn't really there yet, and Rambus has been a fiasco to date and the yields are allegedly horrible.
Ultimately, on-die cache allows the cache to run at either full CPU speed or a high divisor of it. PCB cache is more constrained. But faster processors will always make a difference no matter what - it's just that after you outrun the rest of the system it's a matter of diminishing returns. An Athlon 1000 is not necessarily exactly twice as fast as an Athlon 500 - but it's still wicked fast!
- -Josh Turiel
-- Josh Turiel
"2. Do not eat iPod Shuffle."
Hmmm. Well I've built and used systems with: AMD 386DX/40, AMD 486DX4/100 K5 100, K5 133, K6 233, K6-2 300, and a K6-3 400, all in 7x24 server functions. I only had problems with the K6-2 300, which was really sensitive to the efficency of it's CPU fan, but still ran flawlessly for about a year before I retired it.
All the rest (including the 386, minus the K6-2) are still in service somewhere in someone's computer and doing fine.
When the K7 SMP systems arrive, that will be my next system. I've used almost nothing but AMD chips for the last 7 years (currently I'm running a dual 433 celeron system) and have nothing but good things to say about them. The only down side I can really find is that supporting chipsets (Via, SIS, etc) do not do some functions as well as the Intel equivilents, like PCI DMA throughput. Nothing wrong with the AMD chip, though..
jf
You also mention latency -- and yes, decreasing latency would benefit performance, but this is not what Rambus, PC133 SDRAM and DDR DRAM are designed to accomplish
Actually, you are correct that the goal of Rambus is not to decrease latency, but rather to increase bandwidth. You incorrect, however, when you state that PC133 and DDR SDRAM also have that goal. PC133 and DDR RAM have the goal of decreasing the latency, *not* increasing the bandwidth. Increasing the clock speed of the RAM (as PC133 does, and as DDR "fakes" by using both clock edges rather than just one) should cut the response time for the memory (latency). It doesn't affect the volume of data transferred on a clock cycle (bandwidth).
Rambus increases bandwidth, yes, but at a cost to latency. This is why sometimes using Rambus memory will actually slow down the system - bandwidth (as you stated) is not the bottleneck. Latency, however, is more of a bottleneck. Accessing a piece of data from memory can take hundreds of CPU clock cycles, during which the CPU is often forced to stall and do nothing. Reducing this will certainly help performance, though how much depends on the specific application (and for many benchmarks, you will see little improvement - many of the benchmarks out there are intended to stress CPU performance, and as such are computation-heavy rather than I/O heavy. Applications that are more biased towards I/O operations will benefit more than others that are not). Heavy-duty multimedia can fall into the category of applications that will really benefit, since often the volume and rate of data being processed is so large that it means a smaller percentage of the data is accessed from the cache, and more from main memory.
The real bottleneck is currently the video cards
For games, I'd certainly agree. In general, hard disks are also an often-overlooked bottleneck.
And this is made on .18 fab lines which leaves .13 and .07 yet to come. This processor is going to have so much more in it that Intel isn't going to be able to play the matching gigahertz game much longer. You do have to admire a company that not so long ago had been totally written off and now has processors in most of the Intel strongholds. What's next? PPC overtaking Intel marketshare?
First of all, "k" should always be lowercase when used as a prefix. (Note that "k" should always be a PREFIX to a unit. "K" being used alone as you do above is merely colloquial and non-standard.)
Secondly, he was talking about the distinction between computer prefixes and SI prefixes. (Ever notice how 1kb is 1024 bytes?) He was joking about the silliness of the computer industry (especially the hard-drive industry) in using two different definitions interchangeably, whichever suits them best.
It makes you look really bad to put people down when you don't even seem to know what you're talking about yourself.
Actually, Michael Dell does have a point.
Anandtech, Tom's Hardware and Sharky Extreme reported that the early Athlon motherboards had compatibility problems, notably with AGP implementation and some tests failing altogether. ZD Labs reported that their 3D Winbench 2000 and other benchmark tests failed on these motherboards.
Fortunately, the arrival of the VIA Apollo KX133 chipset may alleviate this problem (motherboards based on the KX133 chipset should be available in the next 30 days).
Raymond in Mountain View, CA
I cannot wait to see what Kryotech is going to do with this bad boy.
If their past patterns hold true, we should see anything from 1.5Ghz to 2Ghz.
Of course, lights will go off all down your street when you fire it up, and you'll be able to go get pizza and Jolt while you're waiting for it come up when you turn it on...
Dell could have been right here. There were some problems with Irongate boards initially. For example most of the first FIC batches had to be recalled. I would also avoid calling VIA the best chipset in the world ;-)
While Intel used to beat everyone because of their chipsets. Unfortunetly sinse the venerable BX they have not produced anything as stable as they used to...
Baker's Law: Misery no longer loves company. Nowadays it insists on it
http://www.sigsegv.cx/
This could be a Dell playing friends with Intel so he doesn't get short changed in chips when processor shortages come around, but none the less, his opinion will matter with big business about Intel being better than AMD.
He goes on in the article to say that the chipsets are what is lacking for AMD.
MHz is starting to become insignifacant compared to the overall system since the bus, hard drive, network, and RAM can't keep up. Once these technologies are sped up by an order of magnitude, we will see real dividends by these MHz increases.
Heck, I've got Karma coming out the wazoo!
$|4$|=||>0+ $|_|><
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I dont think michigan is in the Eastern time zone. Not sure about it but I think they're in Central.
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rooooar
this map shows the time zones, but i'm not sure where Michigan is on the map... I know, I should know my geography,
<sarcasm>
but... it's Michigan for god's sake.
</sarcasm>
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rooooar
Microwave ovens uses 2.405Ghz. Perhaps in 2-3 years.... would be fun though. Just imagine having to use radiation shielding in a PC...
Actually, the Federal Communications Commission is starting to worry about this sort of thing. As I understand it, internal lock isn't quite so important, but now that the front-side bus is getting into the 200 - 400 MHz range, RF emissions from leakage could be a serious threat to certain existing radio systems. With so many PCs being built by random people who don't care about RF sheilding, they are not sure what to do, but limitations on what do-it-yourself'ers can do have been discussed.
dragonhawk@iname.microsoft.com
I do not like Microsoft. Remove them from my email address.
Grumble accually I was more trying to make a point, and an inquiry. As there is a chance that AMD could have defined GHz to be 1024 MHz, incorrectly. But, just to let you know, I generally start out with a mod of 2, and I guess somebody thought it was an interesting point, and if nothing else, there was a conversation surrounding it, one of which some people might find "interesting," or even "insightful." Because frankly when using points to sort the comments I see, I'm not always as interested in the comment itself, but the conversation below that comment as well, which will only be generally seen promenently(spelling?) if the base thread comment has a high enough score.
Just curious, but are we talking Ghz as in 1024 Mhz or Ghz, as in 1000 Mhz.. :)
That's standard legal mumbo jumbo, and not applicable at that. The chips aren't produced in the USA, but in Dresden, Germany, using wafersteppers from ASML, from Holland.
Produced in the EC, America has lost yet another lead in electronics.
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the pun is mightier than the sword
besides, with little memory, when system starts to swap, all the MHz don't matter all of the sudden because hard drive is *slow*. So, all the speed is reduced to the hd's speed.
with these two constraints, bus speed and hard drive's speed, processor speed doesn't play that big role anymore, unless there are newer (faster) system bus / hd technologies or different architechture comes about.
God did not appoint us to suffer wrath but to receive salvation through our Lord Jesus Christ --1Thes5:9
On the Coppermine (PIII 'E'), when the processor asks for a specific portion of memory, if it's in L1 then it takes 3 cycles to be retrieved. If it's in L2 instead, then it takes 7 cycles (or so?) to be retrieved.
... if you had L2 cache running at 800MHz on an 800MHz processor, but that L2 cache was only 8 bits wide and took eighty cycles to retrieve a piece of memory (eg, making it probably even slower than SDRAM), should you really refer to it as "full speed"?
... in an earlier post, I referred to Willamette's bus as being 128-bit. I was very incorrect. The correct width is 64-bit (incidentally making Willamette's bus less cool than I thought).
That's basically the difference. They both 'tick' at the same clock rate, but one just happens to be able to deliver data in less than half the time.
This is why I'm always pissed at people who ignore every other factor when they refer to "full speed" cache. I mean
-JC
PC News'n'Links
http://www.jc-news.com/pc
PS: Apologies
As has been posted on every Athlon thread since the beginning of time, the chip is ready for SMP, but the chipset isn't. The chipset for Athlon SMP is far more complicated (and higher performance) than that for the intel SMP structure. Check out the Alpha bus documentation for a little more flavor on this - its the same bus the Athlon uses, and the idea is to implement a crossbar switch rather than a shared bus. Cool, but costly.
"It's tough to be bilingual when you get hit in the head."
For the same reason it's not likely (but you never know) that there's any advantage to adding an off-chip L3 cache.
A price/performance advantage or a performance advantage? I would imagine that for a chip running at 1.1 GHz that access to a L3 cache running at 500 MHz would be far more perferable to access of some PC-266 Double Rate DRAM. The inhibiting factor becomes how much that 500 MHz DDR-DRAM is going to set you back, plus the complexity costs in you northbridge design, and that zingers that throws into cache coherenecy in multiple CPU designs.
Even the performance advantage disappears if the hit rate isn't pretty high, because you insert at least one cycle into your access latency while you check tags for a hit. I'm not familiar with the studies themselves but from second-hand sources it looks like there's precious little predictability left in the access stream once L1+L2 get done with it.
dpilot argued that the L3 cache on K6-3 systems adds measurably to performance; I certainly can't prove dpilot wrong. I do know that there's a pretty fierce tradeoff between complexity and speed, though, and sometimes you get more milage out of keeping it simple but screaming fast.
Lacking <sarcasm> tags,
L1 cache is the memory closest to the actual computing functions. It runs at CPU speed, but because larger => slower it can't be very big; usually measured in Kbytes. It caches the most-used memory addresses.
L2 cache is larger and slower than L1. Until recently, L2 was implemented by separate RAM devices attached to the CPU. The original Pentium (socket 7) L2 cache was on the processor's front-side bus, between it and the system controller. This became a serious speed limiter and newer processors added a back-side bus strictly for cache (one reason that the CPU modules appeared.) Back-side bus cache runs around 400 MHz plus three or so bus cycles added latency. At 800 MHz this starts to get ugly.
Moving the L2 cache on-chip may not let it run much faster (typically CPU/2 or CPU/2.5) but it cuts the pipeline latency, and latency reduction is what cache is all about. Also, being on-chip makes it much less expensive to use wide busses so the L2 could, for instance, transfer an entire cache line to the L1 in a single cycle.
L1+L2 cache is so good at removing nonrandom accesses from the memory stream that appears on the front-side bus that what actually makes it to the DRAM is almost completely random-access. That's why packet-based memory (e.g., RAMBUS) do so poorly compared to their sustained bandwidth: the bandwidth is never sustained, it's just the first cycle that counts.
For the same reason it's not likely (but you never know) that there's any advantage to adding an off-chip L3 cache. The hit rate would be too low to be worth the trouble of checking for a hit.
Lacking <sarcasm> tags,
K = 2^10, M = 2^20, G = 2^30 etc..
k = 10^3, m = 10^6, g = 10^g etc..
As many people have pointed out, powers of two have no special meaning when refering to frequency, which is analogue, so there's no point in using big G. So the number will be 1.1 gHz (= 1.02 GHz). Also it's in AMD's interest to quote gHz because the number is higher!
perl -e 'fork||print for split//,"hahahaha"'
Then you don't know how to set one up right. Somehow I doubt you were using a good power supply -- those 200watters don't cut it when your cpu draws in excess of 50watts.
Mine has been running perfectly since I've gotten it.
Nope, I don't have a SBP board; rev 1.8 of the board, stepping 4 of the chipset. My score is also with everything turned on...
What brand of tnt2/ultra do you have? If it's the diammond one, that'd explain the difference. On every bench I've seen with a Diammond board, it's scored on average 10fps lower than it's nearest compeditor. The CLabs board is a bit better, but it's second from the bottom (where tnt2/ultras are concerned) if I remember right.
I'm guessing the sblive is also helping make a bit of a difference. Probably worth a frame or two at most.
If you have a bunch of software loaded to run in the background, that might be reducing your score some as well.
Just an afterthought, but as AMD continues to win the speed war with Intel, one must remember that most people have boards that use Intel chipsets. It could seem feasible that Intel could/will try to further the rift of chipset compatibility when/if AMD contiues to win the speed war. I am somewhat in the dark about topic, so please don't use my ignorance as flame bait.
Cache. A big load of on die cache possibly supplemented by a bigger load of not on die cache.
The other answer is DDR ram, so you can jump from PC 133, to PC266 memory, wooha!
yes, memory speed is a problem in PC world, but still, upping the MHZ is a good thing, especialyy when you have a sizable cache to work with. Remember back in the days when computer had a mere 640k of memory in TOTAL to work with? Well now we have about the much in cache running at the SAME SPEED as the processor =) which aint such a bad situation really. Clearly a large set of problems can be solved by code that almost totally fits in cache.
-I go to Rice, so figure out my email address
The AMD-750 chipset doesn't do SMP, and neither does Via's new KX133 chipset -- the chip itself is ready for multiprocessor configurations, but nobody's made it feasible yet, and don't expect it for a while.
--
E2 IN2 IE?
Heck, you can boil the hot water for your coffee on top of the CPU - then use the CDROM tray as a cup holder!
Just as a bit of information on the side, this was shown at the International Solid State Circuits Conference. This is the yearly brag, boast, watch, learn and schmooz fest organized by the IEEE. It is a prestigious conference so everybody shows of their latest and greatest. Yesterday it was Intel with 1Ghz today it was AMD. It is not like this is in production allready, just guys showing off.
What I find interesting is that these are made by wafer-steppers from ASM-Lithography. These guys have been leading the way the last couple of years. I wonder how much Intel is being held back by sticking to their current wafer-stepper producer (Canon? or was it Nikon?)
Use Adsense for Charity
AMD continues to expect first revenues from AMD Athlon family processors produced in Fab 30 utilizing its leading edge HiP6L 0.18 copper interconnect technology at the end of the second quarter of 2000.
The at the bottom of the article they state:
Cautionary Statement .
This release contains forward-looking statements, which are made pursuant to the safe harbor provisions of the United States Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words such as "plans," "expects," "believes," "anticipates" or "intends." Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty that could cause actual results to differ materially from current expectations.. .
Although I think this will be great (when the prices come down) and all, but I get so disillusioned at promised dates (read Intel) that always get missed. I hope they deliver relatively on time so that maybe by summer we'll have a chance to use the newfound speed.
More race stuff in one place,
than any one place on the net.
With Athlon, AMD has carried the competition to Intel's doorstep. This is the idea. This is what the marketplace is supposed to do. We are supposed to be the beneficiaries.
So I wonder when mainstream PC makers will quit considering AMD to be the cheapo alternative and realize that, at least for the present, they are the performance leaders.
The living have better things to do than to continue hating the dead.