Celeron 2 Overclocking

James Yu writes: "FiringSquad has a new overclocking report on the new Intel Celeron 2 processors. These new Celerons are based on the Pentium 3 Coppermine core, but only have half the L2 cache (128KB instead of 256KB). We were able to get one of our 566MHz chips all the way to 901MHz. Sounds like it could be the second coming of the 300A. "

Comments

Not a 300A

[drix]

This is definitely not the second coming of the 300A; I'm suprised to poster, who wrote the article, would say this. What made the 300A (and the 366, to some extent) beautiful was that it matched, sometimes even outperformed a P2 at equal clockrate. For about a quarter the price. It even matched P3s on non-SSE apps.

They managed to pull some incredible clockrates out of the FCPGA Celeries, but in no way are they comparable to an equal Pentium 3:

While the original Celeron 300A@450MHz offered the same performance as a similarly clocked Pentium II, we can see from the benchmarks that the new Celeron will be significantly slower than a Coppermine P3 of the same speed. At 901MHz, the Celeron only outperforms the P3 by a minimal amount.

It's still a pretty good deal; spend about $180 for a Celeron 566 vs. $230 for a P3-600 133mhz FSB. Just keep in mind that a P3-900, when it comes out, will mop the floor with your Celeron ;)

--

Here is hoping for a Abit BP6-2

[Mr. Flibble]

I have been wondering when Abit was going to follow up with a sucessor to the wonderful BP6.

I read the inkiling of an article over at BP6.com that you could run the PIII FC-PGA in a BP6 with an adapter. I suspect that the same should be capable with the new celerons, still a newer board would be even nicer.

However, the most interesting thing I heard was this from ars :

But there's more than higher clock speeds to these puppies. For one thing, they include the SSE instructions which, while they may or may not help you personally, definitely can't hurt to have. More importantly, they will be fabbed at 0.18 micron and include 256k of L2 cache. Now before anybody gets too excited, they plan to cripple them down to the standard 128k cache size. But if the BP6 showed us anything, it's that disabling can beundone... could be some exciting times ahead for overclockers...

Mmmmm. Imagine O/Cing one of these and enabling the crippled cache! Wooo!!!

I wonder if there is a serial number on these chips... Hmmm.

And finally, I know that someone is going to start posting how overclocking can destroy your chip YADDDA YADDDA YADDDA. Well I have heard it before and this Celery 300A @450 in my machine has not exploded yet. If you don't like overclocking, don't do it. Just don't tell others not to because you are not comfortable with it.

Cheat off my paper...

[ffatTony]

Synopsis

The celeron version of the coppermine has recently been released. These guys wanted to Over clock two of them to see how they'd perform when compared to their higher cache counter parts. 2 566 celerons OC'd to 901mhz and 850mhz performed marginally better than a coppermine 650. The celeron un-overclocked performed much worse than the coppermine.

If any of this is wrong, its your fault... eyes on your own paper man.

Re:Why Less L2 Cache?

[ToLu the Happy Furby]

Celery 2 has 256k of Cache, but 128k is permanently disabled because Intel wants to make sure that the Celeron perfoms worse than the P!!!. It is cheaper for them to do it this way too, rather than have two lines.

Nearly right. The real reason that it's much cheaper for them to do it this way is because often times they'll make a PIII and there'll be a fab problem somewhere on the 256k L2 cache. Used to be, that PIII was either destined for a lower speed bin (maybe the flaw won't cause failure at lower speeds), or for the trash. Now, they can just turn that half of the L2 off and sell it as a Celeron 2!

Thus, the cost savings isn't just from only having "one assembly line", but rather because they can salvage chips that would otherwise be tossed in the trash. Of course, they almost certainly have to purposely disable half the L2 of some perfectly good chips so that they have exactly as many Celeron 2's as marketing says they need on the market...but you get the idea.

It depends on the application...

[Sir_Winston]

Yes, for DSP or anything that requires lots of cacheing, a Celeron-2 would be less than ideal, esp. since its L2 cache latency is set to 2 (to further induce people to go for the more expensive and less latent P!!! CuMine). However, for number-crunching these are ideal cheap processors to put into render farms, Beowulf (I hate to say that word now, the trolls seem to want to screw Beowulf clusters more than they want to screw Natalie Portman) clusters, or anything where most or all of the important code can fit into the L1 and the rest can at least fit into the L2. If your app can fit in the L1, then there's no performance increase at all between the cheap Celery-2 and the unholy expensive CuMine P!!!. If your app can't fit in the L1 but can fit in the L2--most number-crunching stuff can--then the only difference between the processors will be the slightly delayed L2 latency which won't hurt performance on such an app by much.

I ought to buy a cheap Celery-2 just to get my numbers on Distributed.net up to a respectable level. ;-) Nah, because the Spitfire Athlon that's coming up will be cheaper than a similarly-clocked Celeron-2, and probably outperform it by a respectable margin.

But anyway, it all depends on what your applications for the processor are going to be, as to whether it'll really be worth the extra money. When a really good SMP Celeron-2 motherboard comes out, that and 2 cheap Celeron-2s will probably be cheaper and as effective in Linux or Win2k than a Coppermine P!!! at a speed grade or 2 above the 2 Celerons. In other words, the Celeron 2 still has its place even among the technocracy. ;-)

Yes and No--look at the stepping, on the casing

[Sir_Winston]

The SMP-ability of a Coppermine processor is determined by the stepping of the processor--i.e., the earliest CuMines couldn't SMP, at least not officially. I don't know whether the capability was still there, but just not certified yet, or not there at all. Anyone know?

So, if the stepping of a CuMine--whether Celeron or full-cached--is 1, then it isn't certified for SMP. If the stepping of a full-cache Coppermine P!!! is at least 2, and prefereably 3, then it's fully SMP capable, definitely. While the Celerons are not certified for SMP work at all, and never were, they use the same core and therefore are SMP capable with the same caveats about the processor stepping. In fact, Celerons are probably just Coppermine P!!! with half the cache rendered unusable; this makes sense from an economic standpoint, because as AMD learned with their ghastly K6-III yields, much of the on-die cache can be ruined when the processor is being made; AMD had to disable all the on-die cache on such processors and sell them as cheap K6-2s, and when Intel gets a dud Coppermine it can still be sold as a Celeron as long as half of the on-die cache is still salvageable.

So, to make a long story short, yeah, the new Celeron-2s can do SMP as long as they're not stepping 1, and preferably at least stepping 3. The trick is finding a motherboard that can handle 2 SMP Celery-deuces; I think MSI is coming out with one soon, based on a VIA chipset.

Personally, I'm holding off my upgrade path (a lot--I'm still on a high K6-2 machine) until I can get an SMP Athlon Thunderbird setup, toward the end of the year. I do, however, plan to buy it one processor at a time--I ain't made of money. Personally, I'm happier with AMD chips just because I'm pissed that ChipZilla has been using the same processor core for so many year now it's pathetic. If not for AMD, we wouldn't have either Coppermine P!!! or Celery-2 processors yet--look at Intel's old roadmaps. It's obvious that they never have cared for advancing microprocessors for the desktop user. But, I digress... :-)

Yeah, but...

[yarmond]

Okay, you can overclock it, but what I want to know is, does it make the Internet faster, like the PIII? I'm not going to buy a new computer based on "benchmarks" unless they are backed up by a solid advertising campaign.

Spitfire

[maniack]

Actually, the real question is how the Celeron II stacks up to AMD's upcoming Spitfire. The Spitfire has three times the effective bus speed of the Celeron with 100 MHz DDR bus (eff=200 MHz) along with the same 128 K L2 cache (on-die, full speed). AMD's processors also have the best floating point unit of any x86 processor. Clock for clock , the performance of the Spitfire is almost definitely going to exceed that of the Celeron II. The Spitfire has been performing so well in its sampling phase, according to this article, that the Spitfires "are actually, in many cases, outperforming their elder brothers, the existing Athlon range of microprocessors." Also, the Athlon is a 7th generation processor while the P3/celerons are 6th generation, back from the Pentium-Pro days. How long will this old architecture last them?

This brings about another question: will Intel continue to dominate because of its name, or will AMD gain market share because of the probable superior performance of its Athlon series? I guess the answer depends on who gets more OEM support. AMD has won over several big name companies like IBM, but Intel's domination was shown when Dell decided to stick with Intel and froget about AMD despite Intel's production problems. It shows who has power when a company decides to lose money (Dell) rather than anger Intel.

Re:SMP

[karlm]

The BP6 is for PPGA socket 370 chips.

Don't forget that the celeron IIs are FCPGA (the chip is flipped, so equivalent pins are in different locations on the array), not PPGA, so hopefully ABIT or someone will come out with a FCPGA to PPGA "slocket".

I'd really like to see ABIT come out with a redesigned BP6 for FCPGA chips. I'd hate to have to get a higher priced dual slot-1 board in order to run SMP Celeron IIs with slockets.

On the other hand, for those brave-but-stupid people out there, you can work on your technique for hammering those pins back out the other side of the package to convert an FCPGA to a PPGA chip 8-o.

Karl

I'm a slacker? You're the one who waited until now to just sit arround.