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Celeron 2 Overclocking
James Yu writes: "FiringSquad has a new overclocking report on the new Intel Celeron 2 processors. These new Celerons are based on the Pentium 3 Coppermine core, but only have half the L2 cache (128KB instead of 256KB). We were able to get one of our 566MHz chips all the way to 901MHz. Sounds like it could be the second coming of the 300A. "
Socket 7 doesn't provide signals for CPUs to invalidate each others' cache lines, and for two threads to disagree about the state of main memory would cause Bad Things. You could only make it work by disabling all onboard caches, after which I doubt you'd come out ahead. I think Socket 8 (for Pentium Pros) was used in SMP systems, but a single Athlon or P3 probably has much better bang/buck nowadays.
I'm really looking forward to SMP Athlon; they use Alpha's bus protocol, and each CPU gets a dedicated 200MHz pipe to the memory controller!
i would rather have a half-as-fast cpu with twice the L2... clockspeed isn't everything, esp for DSP algorithms..!
History repeats itself . . .
On some (but I don't think all) of the PDP-10 processors, the registers were also the first few words of memory. To get a speed boost, some programs would put critical code into these addresses.
TECO was one of these progrmas. Your familiar EMACS began life as extensions to TECO
Come to think of it, todays microcomputer caches will hold a large chunk of a PDP-10's main memory as welll . . It seems to me that in '84 or so my university upgraded to 512k, though I don't remember whether that was in 8 bit bytes or 36 bit words . . .
It wasn't so much IBM's design, but that the bios and msdos calls for IO were just plain too slow, which forced direct access to hardware.
Programs that didn't directly access the video hardware did not have a 640k limit. However, given that the available display adaptors had hard-wired addresses, once the industry started using direct acces, it was not possible to move the addresses of the video cards, which both the IBM design and msdos would have allowed.
Nice article and all. I especially like the mater of fact approach. However did these goys notice the pattern in the benchmarks ? Those that are heavily dependent on the video card show the P3 killing the Celeron.
Not because it's a faster chip or anything. It just runs the bus at 100MHz to 133MHz. When they push the Celeron to the edge it has a bus speed of 106MHz. Video intensive benchmarks will be affected by what the external bus speed is at more than any other benchmark.
What I want to see is something pearly CPU intensive like a compilation benchmark. I build kdelibs in just under 2 hours on my P200 with 64 Megs. How long will it take on a Celeron@901MHz with 128 megs of RAM ?
--= Isn't it surprising how badly I spell ?
This is definitely not the second coming of the 300A; I'm suprised to poster, who wrote the article, would say this. What made the 300A (and the 366, to some extent) beautiful was that it matched, sometimes even outperformed a P2 at equal clockrate. For about a quarter the price. It even matched P3s on non-SSE apps.
;)
They managed to pull some incredible clockrates out of the FCPGA Celeries, but in no way are they comparable to an equal Pentium 3:
While the original Celeron 300A@450MHz offered the same performance as a similarly clocked Pentium II, we can see from the benchmarks that the new Celeron will be significantly slower than a Coppermine P3 of the same speed. At 901MHz, the Celeron only outperforms the P3 by a minimal amount.
It's still a pretty good deal; spend about $180 for a Celeron 566 vs. $230 for a P3-600 133mhz FSB. Just keep in mind that a P3-900, when it comes out, will mop the floor with your Celeron
--
I think there is a world market for maybe five personal web logs.
SMP rarely if ever makes sense for most uses if you're using your own money. I have a couple of state-of-the-art P2-233 2way machines circa late 1998 that are now way too expensive to upgrade. At the time if you needed to be @ the edge of performance this is how you did it. But, and this is the problem, if I had waited maybe 2 months I wouldn't have had to get an SMP at all. You don't get any price/peformance improvement trying to upgrade an SMP box; either you have to get 2 less-than-the-latest CPUs for a dollar premium or you have to toss the MB and start over. Overall your best bet is to get the cheapest CPU, while spending some amount of money to overclock it a certain amount, certainly less than the absolutely achievable max speed since cooling and retro-engineering will cost too much. Then run that CPU as fast as possible until it fries and replace it with the cheapest CPU you can REASONABLY overclock at that point. Heck if you melt the MB or anything else just get another one since you don't have to pay the premium for SMP MBs or worry about drivers and whatnot. In real world tests of interactive performance people generally can't tell the difference between +- 15% and generally don't experience any benefit until +20% performance. So in the end the best bet is to effectively upgrade CPU performance to only 80% of the max achievable.
The bigger the on-die cache the more transistors on a chip. The more transistors on a chip the bigger the die size. The bigger the die size the lower the chip yield. The lower the yield the higher the price. The higher the price, the smaller the market.
Scuttlemonkey is a troll
Yeah, they're using the Super Pi calculation program as a benchmark. Starting at the top ranker, their cooling methods and CPU speeds are:
1) Liquid nitrogen (1438MHz on a PIII/800)
2) Liquid nitrogen (1360MHz on a PIII/800)
3) Liquid nitrogen (1283MHz on a PIII/800)
4) Water-cooled peltier (1210MHz on a PIII/866)
5) Water-cooled peltier (1270MHz on a PIII/850)
Check out this screenshot of the leader's CPU stats.
Correct , but this is not enough to explain the performance difference. There is something else as well:
Baker's Law: Misery no longer loves company. Nowadays it insists on it
http://www.sigsegv.cx/
I read the inkiling of an article over at BP6.com that you could run the PIII FC-PGA in a BP6 with an adapter. I suspect that the same should be capable with the new celerons, still a newer board would be even nicer.
However, the most interesting thing I heard was this from ars
But there's more than higher clock speeds to these puppies. For one thing, they include the SSE instructions which, while they may or may not help you personally, definitely can't hurt to have. More importantly, they will be fabbed at 0.18 micron and include 256k of L2 cache. Now before anybody gets too excited, they plan to cripple them down to the standard 128k cache size. But if the BP6 showed us anything, it's that disabling can beundone... could be some exciting times ahead for overclockers...
Mmmmm. Imagine O/Cing one of these and enabling the crippled cache! Wooo!!!
I wonder if there is a serial number on these chips... Hmmm.
And finally, I know that someone is going to start posting how overclocking can destroy your chip YADDDA YADDDA YADDDA. Well I have heard it before and this Celery 300A @450 in my machine has not exploded yet. If you don't like overclocking, don't do it. Just don't tell others not to because you are not comfortable with it.
Try to hack my 31337 firewall!
But is the SMP disabled?
Can these run in an ABIT BP-6?
********* sig: If you don't like the law, get filthy stinking rich, and buy a better one.
It amazes me that many Intel chips now come with upwards of 512k (or more) of cache memory, which is the total amount memory that the original 8086 PC could support. You could run an old Lotus 123 program completely in the processor cache of a modern chip (including data and a bunch of TSRs). This really puts the infamous B. Gates quote, about no one needing more than 640k, into perspective.
"It's overkill, of course. But you can never have too much overkill." - Anonymous Slashdot Coward
AMD spitfire chip is not out, cannot be purchased and is 100% speculation. Making it 0% worthwhile to speculate about. Bullshit.
It is -absolutely- worthwhile to speculate about this, because it's goign to be reality in less than 6 weeks, possibly no more than 3-4 weeks. It means something because -stock analysts- are actually paying attention to this sort of thing, as are folks who give a shit about their computing platforms.
Second, AMD has already demo'd Tbird at 1.1Ghz. All indications show that TBird will likely be at 1.4-1.6Ghz at the time Willamette is released (if you want to talk about vaporware...). All indications also show Spitfire outperforming, or being on par with, the current Athlon. We'd have Spitfire -now- if this weren't the case (the original launch date was Mid-April, it's been moved into May).
Speculation is what makes people rich, people with your attitude stay middle-class.
Celery 2 has 256k of Cache, but 128k is permanently disabled because Intel wants to make sure that the Celeron perfoms worse than the P!!!. It is cheaper for them to do it this way too, rather than have two lines.
A small amount of fast L2 cache is faster than a large amount of slow L2 cache. However, you should start seeing L3 caches becoming common in upcoming Athlon systems... maybe 1 meg and higher!
EC
"...we are moving toward a Web-centric stage and our dear PC will be one of
EverCode
Synopsis
The celeron version of the coppermine has recently been released. These guys wanted to Over clock two of them to see how they'd perform when compared to their higher cache counter parts. 2 566 celerons OC'd to 901mhz and 850mhz performed marginally better than a coppermine 650. The celeron un-overclocked performed much worse than the coppermine.
If any of this is wrong, its your fault... eyes on your own paper man.
Celery 2 has 256k of Cache, but 128k is permanently disabled because Intel wants to make sure that the Celeron perfoms worse than the P!!!. It is cheaper for them to do it this way too, rather than have two lines.
Nearly right. The real reason that it's much cheaper for them to do it this way is because often times they'll make a PIII and there'll be a fab problem somewhere on the 256k L2 cache. Used to be, that PIII was either destined for a lower speed bin (maybe the flaw won't cause failure at lower speeds), or for the trash. Now, they can just turn that half of the L2 off and sell it as a Celeron 2!
Thus, the cost savings isn't just from only having "one assembly line", but rather because they can salvage chips that would otherwise be tossed in the trash. Of course, they almost certainly have to purposely disable half the L2 of some perfectly good chips so that they have exactly as many Celeron 2's as marketing says they need on the market...but you get the idea.
If I take my four didgit serial numbered Commodore64 (S00006822) and
mount it ontop of a circa 1870 grandfather clock.
Then would I have the world's oldest overclocked machine.
OR would I have to dip the C64 in liquid hydrogen first?
WOW.... you know that all the Intel engineers knew that this could be done... BUT they advertise that the P3 is faster cause it can do PC100 / PC133 or Rambus speeds (Hell i aint seen one yet!!! I will tell you when i do). NOW... in come the overclockers, and WOW, can these babies overclock!!! So everyone (hackers and gamers) will realize that these chips rock and they will become more famous than the alternatives.
OK now here is what I love about Intel.. Gamers like em cause they overclock.. which is the coolest thing to do if you ask me.. freaking having more cooling in your system is like adding stuff to a cars engine to let it BREATH!!! And well the ppl. who dont overclock will love the price... Intel has this all figured out I tell you and this is going to be just like the 300A's!!
Just for your INFO: They are keeping the clock at 66Mhz (default)... now as the article mentions this is usefull cause you can overclock by simply changing the FSB to 100!!!
The 566 has a 8.5X multiplier and a 66MHz bus speed (8.5 x 66MHz = 566MHz). We used an Abit BE6-II for our overclocking tests, and after dabbing on a little thermal paste and slapping on a fat fan, we started overclocking our first processor. The FSB speeds flew by as we went higher and higher. The CPU was still stable when we hit the magic 100MHz FSB for a 850MHz clock speed.
Non-Deterministic Finite Automata
Yes, for DSP or anything that requires lots of cacheing, a Celeron-2 would be less than ideal, esp. since its L2 cache latency is set to 2 (to further induce people to go for the more expensive and less latent P!!! CuMine). However, for number-crunching these are ideal cheap processors to put into render farms, Beowulf (I hate to say that word now, the trolls seem to want to screw Beowulf clusters more than they want to screw Natalie Portman) clusters, or anything where most or all of the important code can fit into the L1 and the rest can at least fit into the L2. If your app can fit in the L1, then there's no performance increase at all between the cheap Celery-2 and the unholy expensive CuMine P!!!. If your app can't fit in the L1 but can fit in the L2--most number-crunching stuff can--then the only difference between the processors will be the slightly delayed L2 latency which won't hurt performance on such an app by much.
;-) Nah, because the Spitfire Athlon that's coming up will be cheaper than a similarly-clocked Celeron-2, and probably outperform it by a respectable margin.
;-)
I ought to buy a cheap Celery-2 just to get my numbers on Distributed.net up to a respectable level.
But anyway, it all depends on what your applications for the processor are going to be, as to whether it'll really be worth the extra money. When a really good SMP Celeron-2 motherboard comes out, that and 2 cheap Celeron-2s will probably be cheaper and as effective in Linux or Win2k than a Coppermine P!!! at a speed grade or 2 above the 2 Celerons. In other words, the Celeron 2 still has its place even among the technocracy.
"The more corrupt the state, the more numerous the laws."--Tacitus, *The Annals*
The SMP-ability of a Coppermine processor is determined by the stepping of the processor--i.e., the earliest CuMines couldn't SMP, at least not officially. I don't know whether the capability was still there, but just not certified yet, or not there at all. Anyone know?
:-)
So, if the stepping of a CuMine--whether Celeron or full-cached--is 1, then it isn't certified for SMP. If the stepping of a full-cache Coppermine P!!! is at least 2, and prefereably 3, then it's fully SMP capable, definitely. While the Celerons are not certified for SMP work at all, and never were, they use the same core and therefore are SMP capable with the same caveats about the processor stepping. In fact, Celerons are probably just Coppermine P!!! with half the cache rendered unusable; this makes sense from an economic standpoint, because as AMD learned with their ghastly K6-III yields, much of the on-die cache can be ruined when the processor is being made; AMD had to disable all the on-die cache on such processors and sell them as cheap K6-2s, and when Intel gets a dud Coppermine it can still be sold as a Celeron as long as half of the on-die cache is still salvageable.
So, to make a long story short, yeah, the new Celeron-2s can do SMP as long as they're not stepping 1, and preferably at least stepping 3. The trick is finding a motherboard that can handle 2 SMP Celery-deuces; I think MSI is coming out with one soon, based on a VIA chipset.
Personally, I'm holding off my upgrade path (a lot--I'm still on a high K6-2 machine) until I can get an SMP Athlon Thunderbird setup, toward the end of the year. I do, however, plan to buy it one processor at a time--I ain't made of money. Personally, I'm happier with AMD chips just because I'm pissed that ChipZilla has been using the same processor core for so many year now it's pathetic. If not for AMD, we wouldn't have either Coppermine P!!! or Celery-2 processors yet--look at Intel's old roadmaps. It's obvious that they never have cared for advancing microprocessors for the desktop user. But, I digress...
"The more corrupt the state, the more numerous the laws."--Tacitus, *The Annals*
I've noticed as of late Intel's processors have had less L2 cache, but running at twice the speed.
Could anyone out there tell me why they just can't put more cache on and make it run at full clock speed? Is there a technical reason, or is Intel just being stingy?
Why not Pentium III's with 512k L2 cache running at full clock speed?
Okay, you can overclock it, but what I want to know is, does it make the Internet faster, like the PIII? I'm not going to buy a new computer based on "benchmarks" unless they are backed up by a solid advertising campaign.
I'm going to live forever or die trying.
Do any of you really think that Intel is going to make the same misstake again? Never will there be a low-end processor outperforming a high-end one again. And besides, everyone keeps comparing overclocked celerons with un-overclocked P!!!'s ... Didn't you stop to think that the P!!!'s are highly clockkable aswell? (Not to even mention the Athlons that arn't even multiplier-locked) Alas, FSB speed has a dramatic impact on perfomance as a whole ... In my last upgrade i made a severe misstake and bought a C466 PPGA only to discover that due to the 66mhz FSB my old C300@450 was faster ... Luckily the local shop allowed me to change my mind and thus I now have a P3/450 rock solid at 560mhz with a 124mhz FSB ... It came out with three times more performance than then both of the old celerons ... and this with only 1/4-1/5 higher cpu clock ... No use having a hotly clocked cpu on a slow bus, it'll just be throwing idle cycles waiting for the rest of the machine ... AMD will be my next step, atleast they give you the freedom to push the product as far as you want to , not like intel who keeps trying to control us with their stinking multiplier locks ...
I wonder how this stacks up to AMD's value priced offering, the Spitifire?
There are register rumors (thereby lending credence to the word "rumor") that the spitfires are actually faster than the Athlons. The register claims that they are holding back the spitfire until they can release their new athlon with on-die l2 cache. I don't know if that's true or not, but the Spitfire definitely looks like a serious contender for the Celeron II.
-------- "All I want in life's a little bit of love to take the pain away" --Spiritualized
Hardocp has been talking about overclocking a couple of Celeron II 633s to 1 ghz stable with only an alpha cooler. They should have the benchmarks within the next few days, so we'll see how they perform.
"Control the media, control the mind."-Cabal
This brings about another question: will Intel continue to dominate because of its name, or will AMD gain market share because of the probable superior performance of its Athlon series? I guess the answer depends on who gets more OEM support. AMD has won over several big name companies like IBM, but Intel's domination was shown when Dell decided to stick with Intel and froget about AMD despite Intel's production problems. It shows who has power when a company decides to lose money (Dell) rather than anger Intel.
"Control the media, control the mind."-Cabal
Don't forget that the celeron IIs are FCPGA (the chip is flipped, so equivalent pins are in different locations on the array), not PPGA, so hopefully ABIT or someone will come out with a FCPGA to PPGA "slocket".
I'd really like to see ABIT come out with a redesigned BP6 for FCPGA chips. I'd hate to have to get a higher priced dual slot-1 board in order to run SMP Celeron IIs with slockets.
On the other hand, for those brave-but-stupid people out there, you can work on your technique for hammering those pins back out the other side of the package to convert an FCPGA to a PPGA chip 8-o.
Karl
I'm a slacker? You're the one who waited until now to just sit arround.
Copyright Violation:"theft, piracy"::Anti-Trust Violation:"thermonuclear price terrorism"<-Overly dramatic language.
while the new celerons are nice chips, they definitely fall far behind the coppermines at comperable speeds, for a detailed celeron vs coppermine article check this one at hardocp
Don't be mean or my friend Oog will smash your head
Well this puts BP6 owners in an interesting position. Windows 2000 just recently made SMP workable, but driver support is still somewhat iffy. I currently have a BP6 myself but I never bothered with SMP because the Nvidia drivers still seem a bit buggy in Win2000. And SMP is really only useful for compiling various things and games. But even Q3 performance only seems to jump 10-20% with SMP, plus take off 5% for immature Win 2000 video drivers. Now we have the Celeron 2. Hmmm. Well SMP seems to be broken even with one of those nifty Powerleap adapters. But how would a single C2-566 compare to a single C1-550? Or how does dual C1-550's compare to a single C2 running a 866-900mhz? Is it worth the upgrade? How consistently are these C2's going to overclock to a 100mhz (+/-) bus? A ~866 mhz Celeron 2 looks really temping to me right now. And it's not THAT expensive (looks like under $200) I wouldn't have to bother with Win2000's immature video drivers, a single processor helps ALL applications, and SSE can't hurt either.
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