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IBMs CMOS 9S
TigeR writes "I saw over at 3DNews that IBM has just unvieled some new chipmaking technology. " Its called CMOS 99:"copper wiring, silicon-on-insulator (SOI) transistors and improved, "low-k dielectric" " All this and 0.13 microns. Smaller chips with more punch using less electricity. Everybody wins. Gimme now.
I remember a while back IBM announcing that they'll be using SOI technology with Alpha procs. CMOS 9S (not CMOS 99) and Alpha? What a team. The press release from the horse's mouth is here. Thet whole "low-k dielectric" thing reminds me of an article I read some time ago (June 1998) in Discover.
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I believe a 10Ghz G3 would toast a 500MHz G4.
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With the usual inverse proportionality between size of component and size of packaging, as we approach incredibly small chips, I forcast the need for individual 747s to transport each unit.
Daniel
I like the Gimme Now comment... Sur, give it to him NOW, then watch him complain that it wasn't ready for market and that they released it too soon =)
SOI is significantly different from SOS, for one thing the insulator is not sapphire, and the advantages do look like they will be able to compensate for the higher cost. Chief among them are freedom from body effect and latch-up and ultra low-voltage operation. People have been interested for years in SOI technologies, including SOS, but have in the past only used them for radiation-hard military/space type things because of the cost. Today, with much lower defect densities in SOI wafers, the cost is decreasing dramatically.
I can't imagine a 0.13 micron chip. Packaging must be a nightmare.
Not really. All you need is a bag of your regular ~3-7 cm chips and a large mallet...
This is allow chip performance to be increased
:-]
Going to 0.13 circuitry get smaller
these guys must have went to the same grammer school
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IBM's announcement
The Register article concerning 10 GHz Power PC processors.
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the technology is called CMOS9S not CMOS 99
"My mother never saw the irony in calling me a son-of-a-bitch." - Jack Nicholson
There are several problems when doing 3D chip design, even using modular "beads"... most of the problems have to do with propogation. That is to say clock signal propogation and heat propogation.
It's impossible to make 3D "modules" that don't end up burying circut components *very* deeply (think about a 16x16x16 bit "processor": even if each junction has just three transistors (up, down, right) you end up with transistors that are 24 times their size away from heat dissipation -- in ANY direction. they don't have a substrate to wick away heat, nor a nice big surface of nice heat conductors (read: metal) only a few microns away (like in the case of your M1,M2... layers in traditional chip fab). Of course, this will typically be MUCH higher since at each element in the matrix you'll want to actually DO something instead of just switch...
-Chris
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I still think Pringles lead in chip technology. How do they make them so perfect?
GONE FISHING
It's a shame that news like this so seldom gets people excited anymore. "They made a faster, smaller microchip!? Who would have thought it?" Leaps in technology like this, however, don't happen automatically. There are researchers busting their asses daily trying to squeeze every last drop of performance out of hardware.
Got Rhinos?
According to the article on The Reg, this technology is going to be used in a 10GHz PowerPC chip, and maybe a G3 or G4 follow on.
The next Cmdr Taco duplicate will be ready soon, but subscribers can beat the rush and see it early!
CMOS 99? Isn't that marketing "retro?" Or should I think 2099? Ooh. Cool, far-off future tech.
Evan - needs to hit preview before submitting
The IBMlogic and DRAM processes are somewhat separated because they are drive by different needs. DRAM is driven almost exclusively by density and cost. Logic is driven by performance and wirability. The big sharing point between the two is in the photolithography development.
Incidentally, DRAM is unlikely to move into SOI any time soon, because the raw wafers have too many defects. For ordinary circuits that class of defects doesn't really matter, but when you're trying to store fewer than 50,000 electrons for 64,000,000 nS, they can kill.
DRAM is much better off in bulk or epi silicon, rather than SOI. Besides, there's so much density and cost pressure that relatively crude, slow devices are used. Even if one wanted to pay for faster transistors, it wouldn't do you much good. The paramount need to shut off the switch into the DRAM cell (so it can hold that 0 or 1) means that particular transistor *can't* be optimized for performance, and that one link can quickly become the performance-dominating factor. In other words, it isn't terribly cost-effective for an ordinary DRAM to pay for fast transistors.
The living have better things to do than to continue hating the dead.
It has been tried before, but an insulating substrate is costly. Both RCA and HP tried "SOS" chips, silicon-on-saphire, but the advantages didn't compensate for the much higher cost.
IBM working on faster chips, Intel reported doing same
:)
Nothing I can say would be any funnier than that headline.
This sig is worse than my last.
Those researchers don't get the respect they deserve because normal people don't rate those breakthroughs as high, because the need for such technical progression, from their point of view, is simply not graspable for them. It's not as apparent anymore, because the applicaitons they use allready run.. on a functional level, computers have little more to offer, it can only get faster and easier to use, but that's about it.
So sure, in the good old days, people cared to go from 16 mhz to 40. Even though that was a small step, together with a few other enhancements to the system architecture, it made windows 3.11 a reality (I'm not trying to say windows is my criterium for progression here, it's just the OS I used back then).
Now clockspeeds jump from 1.1ghz to 1.5ghz or whatever, but John Doe doesn't care about this.. he cares about reading his email now. Windows 2000 runs fine on his 166 or 180, he doesn't really need "faster", that is just a convenience that 'happens automatically when you buy a new pc". The ones who need "faster" are the ones playing games, like his kids perhaps, but then you also see that todays games and gamesystems are shifting allmost completely into a dedicated market. PS2, DC, Xbox,..
I'm NOT saying chipmakers should stop getting on with their new designs and research. *I* WANT these fast things as much as the next guy who likes to game every now and then. But to most people, the difference between 1.1 and 1.5 means as much as the difference between windows 98 and 98OSR2 I think.
Still, *clap* *clap* for Big Blue!.. the one minute it's Intel topping the charts, the next it's IBM.. seems like technology deathmatch at times..
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now combine this with intel's nanotechnology, the 3-atoms-thick thing. of course, that would require a lot more cooperation than everyone would be willing to provide. but if this eventually happens, we may hit the 10GHz mark even faster than everyone thought.
...is to pump out 512 MB and 1 GB RAM chips. If the process can be done in a conventional fab facility, it shouldn't take more than year or two. RAM is, as solid state devices go, among the simpler things to make. (It's still complicated as hell, but not compared to processors or whatnot. That's why RAM has a lifetime warranty.) However, I have no clue as to whether or not most mobo's would support a RAM chip of that capacity.
And if I'm way off on the semiconductor stuff, I'd be as interested as anyone to find what's correct.
Evan
Yes, straying from the topic, but still semi-relevant. Recently, Intel set a goal to have a PC boot from the BIOS in less than eight seconds. Currently, that figure is at around 30 seconds with things like on-chip virus detection and ATA-66/100 adapters delaying the boot time. Why can't the companies start working on that?
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everybody wins
:-)
Well, maybe Intel doesn't win.
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Does anyone recall the company from Japan that is researching a high speed manufacturing process using spheres of silicon instead of waifers? Apparently they would each have specific functions and be stacked in a 3d matrix for connectivity. The product was ?microbead architecture? or something like that. If anyone could find information on this I would appreciate it.
Increase in production, combined with increase of chip speed= more chips we can use to design faster ways of producing faster chips. Sounds like natural log to me.
e= mc squared? nahh its about 2.718281828459045235602874713527
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