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Transmeta To Release Next Generation CPU

CodeShark writes: "According to this story at CNN, Transmeta is set to release their new TM6000 microprocessor this afternoon. The chip apparently incorporates some of the functions usually provided by high-performance (and high price!) chip sets. Transmeta is reporting a further reduction in power requirements by 44% and sees the laptop and sub-laptop markert as the primary markets for their new CPU. Intel and AMD claim to be catching up with the Transmeta chips in terms of power requirements, I'd be curious to find out what the real world comparisons might make of those claims ..." If anyone out there is at Microprocessor Forum, please say in comments any further details that are made clear there.

10 of 148 comments (clear)

  1. Press Release by PHanT0 · · Score: 5, Informative

    Here's the press release from transmeta.
    Enjoy.

  2. Re:And yet.... by greysky · · Score: 3, Informative

    From what I've noticed, crusoe chips really only show their worth in the smaller sub-notbooks, like the sony picture book, where there isn't room for a cdrom or floppy drive. They also don't have the heat/fire problems that have cursed many laptop manufacturers. I have an old gateway laptop that after 20-30 minutes of use gets too hot to keep on my lap.

  3. Re:are AMD and Intel full of it? by questionlp · · Score: 2, Informative

    The battery life of a laptop also depends on the display (the brightness, size and type), how long the hard drive stays spinning, how much you use the removable drives (ie: CD-ROM, DVD-ROM) and any other components that are active.

    Transmeta's claims have been shot down several times because Transmeta doesn't have control over the power consumptions of the parts outside of the processor and the chipset.

  4. A chip off the old block by Kibo · · Score: 2, Informative

    It's also worth noting that your Celeron doesn't have the benefit of Intel's speedstep technology, and wastes power running at 700 MHz all the time. Secondly it's not part of the lower voltage line of P III M chips. Just one of those things.

    --
    --Jimmy has fancy plans; and pants to match.
  5. Re:And yet.... by truesaer · · Score: 2, Informative
    In fact, this is exactly what they're planning:


    These products would include things like Tablet PCs and wearable computers, ultra-dense servers, networking equipment, printers and set-top boxes, he said.


    "As people want to go and include things like wireless technology in these things, where do you put the wireless chip? There wasn't any room left on the board," Ditzel said.

  6. Stock price nearly doubled in past week by peter303 · · Score: 2, Informative

    From $1.19 to $2.25.

  7. How does it compare to the PowerPC by Oniros · · Score: 5, Informative

    As mentioned on MacCentral IBM just released some PowerPC G3 bundling all their recent breakthroughs and going up to 1 GHz.

    "SOI and SiLK taken together with IBM's smallest 0.13-micron copper manufacturing process has resulted in a processor that typically dissipates 3.6W of power at 800MHz [...]"

  8. Re:Transmeta only good for power consumption? by karlm · · Score: 2, Informative
    There is the possibility of software loops running faster than native code in certain circumstances, in theory.


    HP actually found that some code actually ran faster in their PA-RISC emulator for PA-RISC than on the bare hardware! Perhapse HP was using the equivalent of gcc -O instead of gcc -O2 in their trials, thus giving more room for dynamic optimizations, but they got good results for an early project. Dynamic code optimization still looks promising. HP is working on a product utilizing quick-and-dirty PA-RISC to IA-64 translation and dynamic code optimization to ease the transition from PA-RISC to IA-64.


    The HP Dynamo project has some good arguments about why dynamic optimizations might be becomming increasingly usefull. Basically, HP was researching emmulation, so they wrote a PA-RISC emulator to run on PA-RISC and put in some dynamic code optimization to increase performance of commonly run code. There's the old rule of thumb that 80% of your CPU time is spent on 20% of the code, so they concentrate expensive optimizations on the commonly run code, after on-the fly profiling indicates which areas should be optimized. It's like having a -O4 option for gcc and only using it on the code that gets run alot, in order to avoid all the bloat associated with gcc -O3.


    Personally, I'd love to see AMD or Intell throw away hardware emulation of the ancient x86 instruction set. The greatly restricted number of registers causes the compilers to really hide the inherent parallelism in the source code. A lot of chip realestate is wasted in extracting the parallelism back out of the binaries. It's not as bad as the stack-based JVM, but the x86 instruction set is pretty bad about expressing parallelism in the source code. I think software emulation of legacy apps is where it's at. If Intel or AMD released an x86 emulator for thier new chipsets and got Microsoft to go along with the idea of software emulation of x86, then we'd see native apps running much more efficiently. It's my understanding that IA-64 kind-of does this with an x86 emulation mode. However, I think that chip realestate would be better spent on thins to speed up native code.

    If I'm not mistaken, Win95 even had partial virtual DOS machines for each DOS executable. It's not too much more of a leap to emulate the ancient instruction set after you're emulating the ancient OS. Transmetta wants the flexability to completely redesign the native instruction set for each release, and that's understandable. However, it would be nice to move on to compiling into something that better expresses inherent parallelism in the source code.

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  9. Re:VLIWs need goody compilers by MassacrE · · Score: 2, Informative

    What seems strange to me is that the Crusoe is x86 ISA compatible. THis must mean it's doing all the VLIW instruction packing on the fly. My guess is that's not gonna fly, ehhe. What's VLIW buying you in this case?

    A bunch of things. Primarily, the heat and power loss associated with the hardware decoding logic implementation does not happen since this is implemented in software. Second, ignoring optimizations, the decoding only really needs to happen once.

    Finally, being in software allows for really complex decoding logic (such as trying execution based on radical assumptions, failing, and retrying immediately without those assumptions) to be implemented much easier, and also allows for that logic to be updated easily in the case of a mistake.

  10. Re:Heat and Related Problems by s390 · · Score: 3, Informative

    ...will these Transmeta chips follow the same 'faster, hotter, more expensive' trend that AMD is following?

    AMD's latest CPUs use less power and generate less heat. When they get to 0.13 micron with silicon-on-insulator and copper interconnects (Q1 next year), AMD chips will use 20% less power and run 20% cooler.

    Personally, I preferred Zmodem.