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Low-cost Reconfigurable Computing (FPGA's)

Anonymous Coward writes: "People at the at Chinese University of Hong Kong have developed a reconfigurable computing card which uses the SDRAM memory slot instead of the PCI bus. Measurements in the paper show greatly improved bandwidth and latency - why aren't more people using this idea?"

42 of 165 comments (clear)

  1. RAM-slot FPGAs by Frothy+Walrus · · Score: 4, Insightful

    the idea of FPGA computing has been around for a little while at least (look here for examples). i think Scientific American even wrote about "configurable computers" in 1997 or so. why aren't they more popular, then?

    modern processors are well-adapted to general computing tasks.

    FPGAs (read: custom iron) might be good for a few specialized tasks (breaking 3DES, for instance), but most of us will be a lot happier on our UltraSparcs and Athlons and G4s.

    1. Re:RAM-slot FPGAs by cheese_wallet · · Score: 2, Interesting

      re-configurable computing is very useful in embedded systems with somewhat limited resources and real-estate. Satellite computers, for example.

      It is very useful to have a chip to data gathering for a while, then reconfigure to do a DFT on the data, then reconfigure to spit this back to earth through telemetry.

    2. Re:RAM-slot FPGAs by jbuhler · · Score: 4, Informative

      > modern processors are well-adapted to general computing tasks.

      Rather, "modern processors are well-adapted to general *serial* computing tasks." If you have a computation with an embarrassing amount of low-level parallelism (e.g. applying a filter to an image), you can either hope that streaming SIMD will come to your rescue, or you can burn an FPGA with an embarrassing number of parallel computation paths that implements the desired function. The FPGA would already win in many real-world computations, were it not for the fact that it's limited by the cost of getting the data on and off the chip over a slow data bus.

    3. Re:RAM-slot FPGAs by mmol_6453 · · Score: 2, Interesting

      Basically what they needed to do was an extension of ray-tracing. This device would have gone a long way in making it faster.

      Picture all the algorithms required to ray-trace one pixel. Now picture all those algorithms made into one small portion of an FPGA. Now picture many many such portions occupying a single FPGA.

      Suddenly you have a device that encompasses your entire process, and can execute that process much faster than a normal CPU can. To give you an idea of the scale involved, picture a thousand CPU instructions compressed into one clock cycle.

      Kinda cool, huh?

      --
      What's this Submit thingy do?
    4. Re:RAM-slot FPGAs by xmedar · · Score: 2

      I still have some papers from Heriot-Watt university somewhere regarding reconfigurable supercomputers from the late 1980s, the most interesting apps I have seen todate are GAs (genetic algorithms) implemented with FPGAs. Using the memory subsystem is certainly a good way of interfacing them, one thing I am surprised about is that I havent seen the same thing done with Content Addressable memories, if anyone has seen anything like that I'd like to hear about it.

      --
      Any sufficiently advanced man is indistinguishable from God
    5. Re:RAM-slot FPGAs by Nindalf · · Score: 3, Insightful

      modern processors are well-adapted to general computing tasks.

      This is a completely meaningless statement, because there's no such thing as a general computing task. Today's popular uses for computers developed as a result of the hardware's capabilities (which influenced the hardware's design, in an evolutionary feedback loop). We are only beginning to explore the uses of digital microcircuitry.

      Modern processors and modern programming methods are well adapted to each other, so one should expect that unorthodox hardware would be difficult to program and give poor results. We just don't have the experience for it.

      However, it becomes increasingly harder to get a consistent return on larger and larger surface-element counts with serial execution programming. Random memory accesses and conditional branching are discouraged in favor of "predictable" memory accesses and instruction execution, and greater and greater sacrifices of the illusion of serial execution are made in favor of efficiency. The advantages of parallelism grow as the chips grow, and reconfigurability at the level of the gate logic is the natural extreme we will likely tend toward as we figure out how to handle trillions of transistors in one device.

      Can you really imagine current design trends extrapolated to instruction pipelines millions deep? Serial execution does not scale infinitely.

    6. Re:RAM-slot FPGAs by jason_watkins · · Score: 2, Insightful

      The problem with using FPGA's for ray-tracing is that, when you fire a ray into the scene, you don't know what it's going to hit. If it hits something, then typically you examine illumination to that spot from all the light sources, and spawn another ray if you're doing reflection, transmission, or diffuse interreflection.

      The problem is, you can't parellel this easily:

      for each pixel in image
      for each primative in scene
      if ray through pixel hits primative
      for each light
      if ray from light to hit doesn't hit something else first, calculate illumination
      calculate reflected color based on material
      write color to image

      so let's say we equip each node of an FPGA with a program that evaluates this program. If we have 1,000 of these nodes, that means we can like, render 1000 pixels at the same time right?

      wrong. The scene is going to be far to large to store in each FPGA. So, each FPGA node is going to have to wander down the list of primatives in ram to do it's intersection tests. That is not fast.

      Now sure, you can set things up so that all the nodes are listening to one broadcast bus, and all the primatives in the stream are listed off, and any nodes find a hit, they remember it. After that you let list the light sources, letting nodes calculate illumination at the hit, then let them process the material. Most likely they have to do some texture lookups here.

      So sure, that's a way of reshuffling the loop order and doing a lot of tests in parellel, but the real truth is, if you use some sort of spatial hierarchy on a general purpose cpu, it will be much faster.

      Traditional beowulf clusters are typically much better for this sort of thing, because they usually can store an signifigant portion of the scene discription locally, so there's no communication overhead that limits the parellelism.

      The deal with Final Fantasy is they didn't take into account subsurface scattering. Only recently have good models for that surfaced, and the computation time is prehibitive.

  2. Configurable Cards Already Featuring RAM by Angry+Black+Man · · Score: 2, Informative

    Catalina Research offers a card line called the "Chameleon" based on Virtix-E series FPGAs. This allows the card to provide millions of reconfigurable system gates that the use can apply. Connected to the FPGAs are independent blocks of ZBT static RAM which can support a single read or write operation per cycle. The Chameleon products have three high-speed IO daughtercard sites compatible with the industry PMC standard.

    Chameleon VME Block Diagram

    --
    the byproduct of years of oppression by the white man
  3. Starbridge Micro uses these for a supercompter. by Anonymous Coward · · Score: 2, Interesting

    StarBridge Systems uses these to make their supercomputers that run in Standard ATX case... And I think they charge around $15 million for the low end models. These info came from a slashdot story but I can remember when and I don't have time to verify. I just remember CmdrTaco being very sceptical.

  4. Re:Linked directly to Postscript? by daniel_isaacs · · Score: 4, Informative

    http://danisaacs.com/temp/fccm01_pilchard.pdf

    Be gentle. And mirror and post mirrors, please. Bandwith costs, and I'm poor.

    --
    - Dan I.
  5. Why aren't more people... by fudboy · · Score: 4, Interesting

    I have also wondered why more people aren't using the memory bus for peripherals. For instance, the VGA adaptor would greatly benefit from that interface (3d work, video games), also, using that bus as a network connection in a renderfarm would probably be nice too. Seriously, the PCI buss can only offer so much (132 MB/S) which is certainly going to be a problem with anything faster than gigabit ethernet... Meanwhile, modern memory busses are upwards of 4.8Gb/s. Imagine multiple machines strung together with that kind of bandwidth between them!

    Another question I've had bouncing around in the back of my head is why no one uses MPEG decoder circuitry for MP3 playback? All the players I've tried, windows or linux, take 10-30% of the CPU for noraml playback operation. This is unacceptable when working in big apps like 3DStudio Max, make-ing a big app or running big scripts. I have an old MPEG decoder card from a Creative DVD, also I believe my G-Force has MPEG decoder acceleration... How much trouble would it be to write a driver for Winamp that uses preferred devices like that?

    --

    :)Fudboy

    I guess I'm only a Fudboy, looking for that real Transmeta
    1. Re:Why aren't more people... by Christian+Smith · · Score: 5, Informative


      I have also wondered why more people aren't using the memory bus for peripherals....Seriously, the PCI buss can only offer so much (132 MB/S) which is certainly going to be a problem with anything faster than gigabit ethernet


      Because the memory bus is a memory bus, and NOT a peripheral bus! Peripheral busses have things like interrupts, address space configuration, buffering, bridging, hot-plugging, and long-term stability that memory busses are simply not designed for.

      How would you like it if you couldn't use the latest whizz bang 8.4GB/s memory technology because some peripheral you bought a year earlier needs to be on a 4.8GB/s memory interface?

      Anyway, PCI v2.2 (?) offers 512MB/s in 64 bit 66MHz mode. And then there's PCI-X...

      And show me a game that is PCI/AGP bandwidth limited once textures are uploaded to the GXF card anyway. Memory is cheap, use it...


      Meanwhile, modern memory busses are upwards of 4.8Gb/s. Imagine multiple machines strung together with that kind of bandwidth between them!

      Unfortunately, those pesky laws of physics (like the speed of light) come in and put paid to schemes like this. While it may be possible to get that bandwidth between machines, the latency becomes a problem. Certainly not feasable as a memory bus.

    2. Re:Why aren't more people... by Jeremy+Erwin · · Score: 2, Informative

      The mpeg audio layer uses different transforms than the video layer. Even the mpeg decoder cards often have software audio decode (which usually isn't mpeg audio anyway, but AC-3).

      I believe that some cards from Phillips claimed MP3 acceleration, and there is no reason why the Soundblaster Live chipset couldn't be programmed to do the same. (Phillips, iirc, doesn't support linux, btw)

    3. Re:Why aren't more people... by Old+Wolf · · Score: 2

      My Celeron 300 only used 1-2% in WinAmp .. now that I have a 900, it's going to be even less. Perhaps you either need a CPU upgrade, or a better player

    4. Re:Why aren't more people... by Waffle+Iron · · Score: 4, Informative
      I have also wondered why more people aren't using the memory bus for peripherals.

      Been there, done that. Most PCs prior to the 386 models used the ISA bus for both peripherals and memory. The buses where separated out in modern PCs for a reason: the laws of physics. At today's speeds, a memory bus can't be more than an inch or two in length. If you use your one free memory slot for I/O, you have no more memory expansion capability.

  6. too much hassle, unfortunately by mj6798 · · Score: 4, Informative

    This may help a little, but in general, people haven't figured out how to make FPGA-based computing sufficiently useful, cheap, and easy in order for it to catch on. Programming an FPGA is still rather hard and the architecture limits severely what you can do. And there is the chicken-and-egg problem with the boards: if you write software for them, few people can run it, and few people are motivated to buy a board because there is no software that uses it. Right now, you are probably a lot better off buying a dual processor board or a cluster than an FPGA add-on.

  7. Karma Whoring (PDF version) by baptiste · · Score: 3, Informative
  8. Re:Linked directly to Postscript? by baptiste · · Score: 3, Informative

    Here is a PDF version Download all you want - I'm not metered (but its also only 384kbps :) )

  9. Speed and gates... by tcc · · Score: 4, Insightful

    FPGA technology to replace (or more like having a "flashable") Current processors could/would be a great leap in computing, it would mean having a "soft-hardware upgrade", microcode or "sillicon" bugs could be addressed, but there would probably be the downside of everything else in the computing industry: companies would released bugged stuff, beta would go around like current drivers :), etc etc.

    All this said, unless some big breakthrough happens, we won't see out Athlon or Pentium IV system replaced by these, the 2 main limitation of FPGA are the number of available gates, and the speed at which they operate.

    While they've managed to increase the number of gates to something quite big (last time I read about this I think it was in the low million? 1 or 2, but I can't be sure), this is enough to "emulate" microcontrollers or lower end processors, but not enough for higher end microprocessors. While eventually they will catch up and maybe someone will do his thesis on emulating an Athlon off FPGA stuff, by that time we'll be at the 2nd or 3rd rev of Post-hammer processors, so it will look like today being able to emulate a 486 (granted, there could be some use in that, but none come to mind right now.. parrallel processing? 1 athlon can replace zillion of 486s...) Also the developpement of microprocessor is going at a faster pace than FPGA technology. I am not saying this couldn't happen, but it would need a serious bump in the fab process and technology to be able to reach Ghz speed, and probably few 100M's of gates.

    Still, it's a very interresting technology.

    --
    --- Metamoderating abusive downgraders since my 300th post.
    1. Re:Speed and gates... by baptiste · · Score: 2

      Believe it or not, they are used for CPU design. The folks at ZWorld designed their Rabbit CPU architecture using FPGAs and then created the chip from that design (vs the usual prototyping on silicon over and over). Its not uncommon. Now using FPGAs in realworld 32-bit CPU scenarios for Windows is another thing :)

    2. Re:Speed and gates... by Suslik · · Score: 2, Interesting

      FPGAs are great in prototyping when you want to produce a relatively small number of devices in a relatively short time. Problem is, a conventional microprocessor is always going to beat an FPGA at a comparable VLSI design level in terms of flexibility, and an ASIC will draw less power and perform a specific task more quickly. Limiting factor for an ASIC is cost (minimum production runs often in thousands) and design-production latency.

      If you want to emulate an Athlon, use an Athlon. :-)

      Stuff like high-volume encryption (e.g. Rijndael) is well suited to FPGAs because you've got a shedload of data coming in for a relatively simple series of calculations. Note that the AES contestants were evaluated partly on their ease of implementation in FPGA-like devices.

      This SDRAM link might be a useful thing to increase bandwidth between a conventional microproc/bus/memory system and multiple FPGAs, bumping up performance by a factor of 2-3 maybe (on bandwidth-limited computations), but it won't change the world. IMHO, obviously.

      Check out my review of the FPL 2000 and FPGA 2001 conferences for summaries of the current research in FPGAs.

      Adrian

      --
      Adi: Inveterate mathmo, Christian, BOFHlet hubbie and Perl lover.
    3. Re:Speed and gates... by svirre · · Score: 2

      Using FPGA for prototyping is definetly a good thing, and is one of the areas where you can get hardware with FPGA to go in a PC.

      You can get pci cards with FPGAs that interface to a digital simulator (like modelsim or quicksim). These are rather nice since they shorten simulation times hundredfold.

      As for a reconfigurable device in a houshold device, they will certanly not be used as microprocessors, that would be a criminal waste!

      Rather you would implement the time critical part of your algorithm in synthsizable code (rtl code) an dump that to the FPGA. There would not really be any need to send programmable circuits to such devices, you allready got one of those, your CPU.

  10. Using memory slots for devices is a bad idea by Skapare · · Score: 5, Insightful

    Using memory slots for devices is a bad idea. The interface is not designed for devices. There are no IRQ lines. The address space can be configured by the chipset to fall anywhere in the address space of the whole machine (your device may end up starting at 0). The address space may even be interleaved with other memory devices in other slots. And the next generation of memory will use a whole different interface, and most new motherboards will soon migrate to it with little concern for backward compatibility.

    --
    now we need to go OSS in diesel cars
    1. Re:Using memory slots for devices is a bad idea by wsloand · · Score: 2, Troll

      The interface is not designed for devices.

      Perhaps you didn't read the article so carefully, but they seem to have overcome some of the difficulties, and they also aren't purporting this as a general solution to all computing woes ever. This device is a prototype and it currently is only setup to work on one motherboard type. What this does demonstrate is that for some applications (such as cryptography) this can be useful. The article specifically states that it can be useful for education, research, and a few other very focused tasks.

      I can see an application where this is an aspect of the totally secure machine where all RAM is encrypted, and the only place that unencrypted data lies is on the silicon of the processor itself.

      They aren't saying that the next sound cards should be made as DIMM socketed FPGAs. FPGAs only have a niche market currently, and almost none of the applications are for the average home user.

    2. Re:Using memory slots for devices is a bad idea by billstewart · · Score: 3, Interesting
      Depends on what you're trying to do with the FPGA. Are you modeling a new chip, and you want the ability to poke around anywhere in the insides? Or are you modeling an I/O device ASIC that needs to have lots of inputs and outputs? For the latter, probably a memory interface is bad. For the former, maybe it's better. Are you planning to use if for a processor adjunct, like an MPEG encoder? Maybe a memory bus connection is just about right. How much do you need to interface with the outside world? Is your primary application "A Grad-Student Project That Enables Other Grad-Student Projects"? In that case, a memory-bus interface would be cool, and if nobody's done it for the last 3-5 generation s of processor/bus architecture, that makes it even cooler :-)

      If you're trying to explore new coprocessor architectures, it's an interesting thing to try - certainly better than hanging coprocessors out on a PCI bus somewhere. Of course, these days, CPUs are fast enough that it's difficult to find applications that really need enough more horsepower than general-purpose processors can provide, but there are still enough edgy things to try that it could be worthwhile.

      --

      Bill Stewart
      New Fast-Compression-only CPR http://preview.tinyurl.com/dy575ks
  11. Reconfigurable chips vs DSPs - MPEG encoding by jswitte · · Score: 2, Interesting

    Would there be any speed advantage to useing a reconfigurable chip vs. a programmable DSP for a very processor intensive task, like MPEG encoding or real-time full-screen graphics rendering? (think Fractal Flames as a music visualization plug-in) Assume that all your algorithm code can fit in on-chip cache or high-speed L2 so you don't clog up the memory bus)

    1. Re:Reconfigurable chips vs DSPs - MPEG encoding by svirre · · Score: 4, Informative

      A DSP is just a very specialized CPU, primarily focusing on math intesive stuff, but less on branching and conditionals.

      As any CPU they are sequential devices. The load a instruction, decode it and execute it and repeat. Though modern DSP can paralellize many intructions it's resources are still statically allocated at the time of design. A DSP with two multipliers may at most perform two multiplications at any one time.

      Using a fpga on the other hand allows you to design the circuit from the ground up. now if your algorithm needs to do 20 multiplications at a time, you can do so simply by building them on the device.

      Using a fpga is fundamentally different from using a DSP or microcontroller/processor. The latter is a finished circuit with an assorment of operators selectable by an instruction opcode. The former can be configured into any circuit.

  12. FPGA CPUs at fpgacpu.org by Space+cowboy · · Score: 3, Interesting

    There are several FPGA cpu's available already. For loadsadetails, go to http://www.fpgacpu.org/ and see just how easy it is to create a CPU. I've even managed to (starting with Jan's work) build my own without any prior knowledge of verilog.

    The main drawback is always going to be speed though - it's simply far and away more complex to have reconfigurable hardware than static h/w. The current "hot" CPU of any generation will almost certainly never be reconfigurable!

    Simon.

    --
    Physicists get Hadrons!
  13. Asus Board by tempmpi · · Score: 2, Funny

    I find it very interresting that a Chinese Universesity is allowed to use a board produced in Taiwan. Maybe it is just too hard to find a board, that isn't produced in Taiwan.

    --
    Jan
    1. Re:Asus Board by Old+Wolf · · Score: 2

      Well, China believes Taiwan is a part of China , so why shouldn't it use Taiwanese boards?

  14. Cache memory bus... by C0vardeAn0nim0 · · Score: 3

    as expansion slots were used by a few companies that sold G3 expansion cards for older PowerMacs.

    IIRC, they had an expansion card that you'd attach to the cache slot near the original PowerPC CPU.

    This way the new CPU would have all the memory bandwith it needed to run at 400 Mhz. 400 Mhz in a performa 6200... wow!

    --
    What ? Me, worry ?
  15. 3d game acceleration vs. saturated PCI/AGP? by kbonin · · Score: 2

    Not that I'm recommending using the memory bus for 3d, but...

    PCI/AGP are great for uploading static textures, on that you are correct.

    However, there's more data than that to saturate the bus:
    * Procedural textures
    * Vertex cloud animation (bones aren't always appropriate!)
    * Swapping textures when insufficient video ram is available.

    Any of these can cause bus saturation. While many games are following the Half-Life model (static everything, use matrix driven hierarchical bones animation), this creates pretty bland worlds.

    If you want to realistic water, more organically animated content, or more subtle animations, this bandwidth becomes critical. Vertex/pixel shaders regain some of this by allowing processing to be moved back into the 3D GPU, but that only works for inherently procedural and low order polynomial effects - data driven or more complex procedurals still need to upload obscene amounts of data!

    I should also mention that accelerator card drivers are optimizing pipelines for static textures, Unreal ran into this problem badly, and it continues to this day.

  16. If Gates Were Reprogrammable.. by Bowie+J.+Poag · · Score: 5, Funny



    If Gates were reprogrammable, then we wouldn't be in this mess in the first place.

    --
    Bowie J. Poag

  17. See my FPGA CPU News entries on this subject by Jan · · Score: 2, Informative
    http://www.fpgacpu.org/log/aug01.html#010821-dimm

    On FPGAs as PC Coprocessors, redux:
    http://www.fpgacpu.org/log/aug01.html#010811

    On FPGAs as PC Coprocessors (1996):
    http://www.fpgacpu.org/usenet/fpgas_as_pc_coproces sors.html

  18. Re:These have been out for a while. by rtaylor · · Score: 2

    For all intent and purpose new graphics and sounds cards are programmable to do specific operations. The gate logic doesn't change -- it's a microcode fix. Ends up being basically the same thing in the end for them as long as you don't try to coax them to do other things (like analog logic) they'll be just as good.

    --
    Rod Taylor
  19. Re:um, because 6 PCI slots, 2-3 SDRAM..duh.. by billstewart · · Score: 2, Interesting
    You can spare a memory slot for the FPGA board, if your mobo has three slots.
    Memory has become ridiculously large and cheap. 512MB boards are under $50. I'm sure there are people who need more than 1GB on a non-production machine (obviously production machines like database servers need all they can fit), but for most applications, by the time you need to fill the third memory slot on your box, you could just as well buy a new card that's 4X larger than the old one you're rolling out.

    If you've only got two slots, you may have problems, but usually the main time you need the third slot is if you're upgrading a machine and want to keep the old memory as well. And sometimes you've got a board that doesn't have enough address lines or has a BIOS that doesn't understand them (my home machine *says* it can use 3x256MB memory, but it looks like I'll have to flash a new BIOS to do it, and so far 192MB has been plenty.)
    If you don't have something else special to do, like FPGA, you might as well keep the old RAM - doesn't hurt, and more memory is always usable as long as it doesn't force you to a lower speed. I recently added 512MB to a 128MB maachine at work, giving 640MB. Bill Gates says that ought to be enough for anybody :-)

    --

    Bill Stewart
    New Fast-Compression-only CPR http://preview.tinyurl.com/dy575ks
  20. Evaluating across paradigms by closet_subversive · · Score: 2

    I am afraid that I must disagree with many of the comments posted concerning FPGAs. First off, FPGAs have been successfully demonstrated in the multiple GHz frequency range using SiGe as a base material (Dr. Jack McDonald's group at RPI has done such an implimentation with SiGe BiCMOS based systems.) Further, the contention that FPGAs are "difficult" to program, is I believe an oversimplification of the hardware/software relation in general. Are FPGAs more difficult to program than to implement C++ code on a PC? Yes, but they are also significantly more powerful pieces of hardware than the current computer architecture. For example, one of the most visionary uses of high speed FPGAs would be to replace component cards in the PC of today. For example, in a base system today, one typically has a video, audio, and I/O type card (i.e. hard disk/floppy disk/CD-CDRW-DVD). Imagine now a computer that consists of a large number of FPGAs, essentially reconfiguarable hardware. Now drivers can be reset on the fly, power up ready OSs with no boot time (using non-volatile configurations), and a host of other interesting and desirable properties are possible. If you want to send email the FPGA bank can reconfigure itself into a network or wireless ethernet card. This has some significant advantages over the current paradigm.

    Several readers commented concerning the adoption of FPGAs is not going to happen quickly(i.e. no development support) or that the problems with bus interface speeds are nontrivial. However, these difficult problems are not the problem of the hardware, and attempting to interface it to the standard PC, however kludgy, is a rational approach. Criticizing the implimentation here is a bit like telling someone that they should have used a Porsche instead of a Pinto to build a time machine.

  21. I have seen the card itself by Coppertone · · Score: 2, Interesting

    Well, while I was doing my final year project at Department Of Computing, Imperial College London we have the actual card made by Chinese University of HK. Bascially it is just a matter of having a SDRAM contoller "programmed" onto the FPGA, and wired correctly(it uses Xilinx Virtex series of FPGA, and Xilinx has implemented a SDRAM controller on it - see their tech notes - their sites is down when I write this). Having done my project with FPGAs, I would say the problem with this thing is that it is very fiddly to program the thing - it requires the understanding of software as well as hardware. I also agreed with some comments above that it lacks interrupts on SDRAM bus - therefore it is even more difficult to program the card.

    Anyway, PCI FPGA cards has always been available, and they are hugely expansive. But they are getting down in price. One of the problem of FPGA is that the speed of the chips are slow (depends on the complexity of the circuit, you can only clock it to around 1Ghz for very simple cores, lot slower for complex circuit) so consider the speed of microprocessor it is not worthwhile to use them in normal computer systems - but a new niche is open up in embedded market.

    Notice the name of the university is right! Chinese name of the university suggested that the "Chinese" in the university name is actually means Chinese language, not China the country.

  22. We did it back in the days of Z80 (8 bit) micros by macemoneta · · Score: 2

    Back when machines came with 4K of memory (yes, K, not M), but could address 64K, it wasn't uncommon to memory map devices. It was an easy thing to do; a few discrete nand gates (7400 series ICs) for decode logic and you were done. Since a lot of the code was written in assembler then, it was easy to move stuff in and out of the memory locations.

    Everything old is new again... I wonder how many other ancient techniques would be useful now...

    Anyone remember hardware memory swaping (bank switching)? You could take that machine with a measly 8GB memory limit and expand to 256 banks of 8GB for 2TB of memory (assuming you could afford all that) with a single memory mapped bank select byte. Only 1 memory access cycle to swap 8GB.

    Actually, that might be pretty cool. :-)

    --

    Can You Say Linux? I Knew That You Could.

  23. 2 Comments: by N+Monkey · · Score: 2, Informative

    Comment 1 RE:Linked directly to Postscript?

    Try using ghostscript/GSView which will display the postscript file directly. (A quick search on Google gave the following link which should be useful
    GhostScript

    Comment 2: I don't think this is ever really likely to be part of 'consumer' system. FPGA's are great for
    1) prototyping circuits that will later be implemented as an ASIC where the cost of "respinning" a chip is extremely high or
    2) Situations where the system is only produced in very small numbers.

    The main problems with FPGAs are that they are
    1)Expensive!.
    2) Relatively small in terms of the gates they can implement and
    3) The clock speed that can be achieved is probably about an order of magnitude lower than an equivalent ASIC.

    For many situations a multi-CPU system may be a much better option, and I certainly think that they'd be impractical for a mass produced system.

    Simon

  24. dumbass moderators by MathJMendl · · Score: 2

    hahahaha yeah I know lmao fuck dem moderators they come from goatse or somewhere

    --


    "I have not failed. I've simply found 10,000 ways that won't work." --Thomas Edison