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Clockless Chips

iarkin writes "TechReview is running a very interesting article about clockless chips. Clockless, or asynchronous, chips work very much faster and consume less power than their synchronous equivalents (Intel hade some experiments on these chips back in -97, the results showed that the asynchronous chips were three times faster and consumed only half the power)."

4 of 236 comments (clear)

  1. Old idea by Henry+V+.009 · · Score: 3, Informative

    Async processing is a very old idea. The problem is that designing the logic for it is a far greater chore than for regular chips. CPU designers are simply not good enough to do it well yet.

  2. Re:Duh! by xmedar · · Score: 2, Informative

    The theoretical bandwith limit on large die silicon semiconductors is in the range of 10GHz.

    As you said, large die silicon, if we move to other technologies such as the single molecule transistors that are currently being pioneered we won't be faced by the same limitations as silicon.

    10GHz is "about" 3 times faster than the current maximum clock rate, 2GHz or so.

    10/2 = 5

    As far as actual tests, I assure you no one has a large transistor count CPU working, the discussions are theoretical.

    Have you ever seen the 1st ever transistor, it was damn big, it took a while for them to get the technology right so they could get to where we are today, just because async chips are yet to be anything like as complex as sync logic chips doesnt mean it will never happen, give it time, I was discussing this stuff back in 1987, now finally people are beginning to act on the possibilities, give it another decade or so.

    --
    Any sufficiently advanced man is indistinguishable from God
  3. Re:The main problem. by Link310 · · Score: 2, Informative

    The "clocking" is not an issue in clockless computers. The idea becomes a handshake signal between components. These tell relevant components that the data is ready to be processed at the next stage. When both components agree that they're ready to go, stuff happens. This happens without the other components needing to know.

  4. For the uninitiated by superflex · · Score: 2, Informative
    Race condition - An aspect of asynchronous sequential logic design. When a change in input causes two or more flipflops (latches) to change state. This is a race.

    This change in input creates instability in the system, as all logic elements affected by the input change undergo state transitions. If the resulting stable state at the output end of the logic block is the same no matter what, it's a noncritical race. However, in some cases the output can settle in different stable states depending on the order of the flipflop state transitions within the circuit. This is called a critical race, and it is a bad thing.

    Critical races mean we can't predict what the output of a circuit will be given an initial state and an input value. Therefore, the circuit is worthless.

    --
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