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First Benchmarks of AMD Hammer Prototype
porciletto writes "As seen on Ace's Hardware, this article features Quake 3 benchmarks comparing an 800 MHz ClawHammer sample to Athlon MPs at 800 MHz and 1667 MHz, as well as a Willamette Pentium 4 (256 KB L2, 400 MHz FSB) at 800 MHz and 1600 MHz. The benchmark results indicate a 40% performance increase over an Athlon MP for the ClawHammer. Additionally, the 800 MHz ClawHammer manages to tie (actually outperform by 1 FPS) the 1667 MHz Willamette Pentium 4."
they are supposed to be out somewhere within october - december, but in very limited numbers..(something like 10,000) with early 2003 still being slim on chips. production is supposed to pick up Q2 of 2003. Thats word around the campfire anyways. we all know how definate any of this will end up being.
adventure-today.com
is "Opteron" (see http://www.amd.com/us-en/Processors/ProductInforma tion/0,,30_118_4699,00.html)
I currently have two Intel P4 machines; my laptop (Inspiron 8200) and my machine at work. I would rather have gotten an AMD chip in both cases, but on the laptop, I was shopping for features and had to get an Intel processor based machine to get the other features that I wanted, and with the work machine, I took what they gave me.
Having two AMD machines at home, a Tbird 1400 and an Athlon XP 1700+, I'm seriously underimpressed by the P4 performance. As far as I can tell, the only reason to buy Intel anymore is out of pure inertia; they bring nothing to the table.
Not to take the side of Intel... but as an Electrical Engineer with a good amount of interest in microprocessor design I have to say I like Intels move away from x86. X86 is definitly not even close to the best computer architecture out there.
It does make most sense for AMD to spend there time building a 64-bit x86 processor then it does a completely new architecture atm. But that doesn't mean we wouldn't all benifit greatly from dropping x86. Of course this can't be an overnight change, but it does need to happen.
Eventually you have to break backwards compatibility to move forward without making things ugly. x86 is old, it is overly complex, it is inefficient in many respects, it is time to say good bye. There is a reason the original designers only expected it to be a 3-5 year temporary solution.
There are twice as many registers and they are twice as wide (obviously -:) comapred to IA-32 www.x86-64.org
Stick Men
AMD has effectively done that, if you've read any of the technical documents to see what they've done. The 64-bit mode has twice as many registers that are completely general-purpose (as opposed to the old CISC design of intel where one was a loop counter etc.) They've only implemented the simpler intructions in 64-bit effectively making it a 64-bit RISC. Since the K6, AMD processors have been superscalar RISC internally with a translation layer which breaks down complex x86 instructions into simpler RISC ones. It's still there for running legacy code, and completely transparent, i.e. it operates concurrently and with no performance penalty with the 64-bit instructions. The x86-32 registers are effectively just the top-right quarter of the x86-64 registers. Go and read AMD's docs. It's all there (and has been for the last 2 years).
Stick Men
As has been said, Quake is only relevant to the chips concerned in that it only tests the 32-bit compatability of the Opteron. I would have like to see some tests that demonstrated the advantage of 64-bit processors over 32-bit processors. Granted, the reviewers only wanted to show benchmearks that the populous was familar with and they were pressed for time. Let's give them a break for that.
Nahtanoj
Ah, thanks ;)
:)
:D
Found this PDF document to be a very interesting document with tons of info about the Hammer. So intersting that I felt the need to post it here.
Regarding registers, it shows that not only has it got 2x "standard"/GPR registers that's 2x wide, but also 2x SSE/SSE2 128-bit registers.
So it seems to total in 16 * 128-bit registers, 16 * 64-bit registers (and 8 * 80-bit regs for floating point ops).
Yeah, and a widened program counter register too.
Beware: In C++, your friends can see your privates!
Not to take either side...
But if Intel was going to supercede a messy architecture like X86, I wish they'd done something better than IA64. While the jury is still out on the merits of IA64, it has some of the marks of Internal Politics on it. It sounds like a VLIW camp inside Intel sold some management on a renamed version of the basic approach, and the project gathered Corporate Inertia.
At the same time, it doesn't sound as if all of the VLIW problems have been solved on the compiler side, so it's not clear that IA64 is doing any more than a clean, modern architecture cable of OOO execution could have done.
Out of the Hammer series, I'm reminded/hoping for the phenomenon described in "Soul of a New Machine", where they managed to clean and extend the old architecture at the same time. By the time they were done, the old architecture was an ugly wart on the side of a new clean one. The fear was the new being an uglier wart on the side of an already ugly one, and they avoided it.
I don't know enough about Hammer to know what the case is. I have the documents, but haven't made time to read them. I've also heard some rumblings that some of the performance improvements to IA64 involve de-purifying it's VLIW to pick up OOO techniques. I've heard that VLIW was an attempt to sidestep OOO because those prolems were feared, but in the meantime the industry has learned how to do OOO pretty well.
The living have better things to do than to continue hating the dead.
BTW, what I do most is video encoding, mainly VCD and SVCD using TMPGEnc. For that application, the Athlon XP 1700+ (running at 1.47 GHz) absolutely BLOWS AWAY the P4 running at 1.6 GHz. I mean, it's a LOT faster, and the P4 has more RAM and everything so it has no excuse. AMD might finish a job in 2.5 hours and the P4 would take well over 3 hours to do the same job.
Don't ask me about game performance, hell, I don't even have Solitare loaded.
They haven't quit the x86 cold turkey. That's part of the problem, it can STILL run unmodified binaries built for an 8086. IA64 has x86 grafted onto it. That's a big reason why its been delayed for so long and why the performance sucks. There is a lot of hardware on the chip to convert x86 instructions to IA64 instructions. Time that could of been spent making the rest of the chip better, has been spent verifying x86 conversion circuitry. Intel will never drop IA32. They learned that with the iAPX-432, i860, and the 8080. No one wants a chip unless its x86.
Yeah, I remove the heatsink from my machine while it's running all the time...
I saw the video too, and while it's amusing, I fail to see how this could even happen. The heatsinks on AMD CPUs is on so hard you need to work at it to get it off. Anybody who has one "accidentally" fall off didn't put it on right in the first place.
Haha... what I worry about is catastrophic "smash the flathead screwdriver through the motherboard while trying to loosen the clip" failure.
or also, catastrophic "heatsink clip breaks off the cheap plastic socket notch upon removal" faliure.
Much more likely...
If anything, I wish AMD would do more in the way of promoting bolted heatsinks rather than the cheesy clips.
A fake newspaper reports:
Senator F. Bar R-51st state announced the drafting of a new technology bill. It requires that all CPU chips conform to a regulated speed quantifier. This will allow all chips to be able to be easily compared with one another to end industry confusion. The unit, abbreviated IHz (Intel Hertz), was developed by the Intel Corporation. They have lobbied to get this standard, which will be controled and policed by a board of independent persons funded by Intel, adoped into Federal law....
ughh..
As a fellow ECE, I'll give Intel a mark in the "innovative" column on IA-64. But the concepts of predication, EPIC and compiler-time optimizations we're NOT good enough to even make the new architecture competitive when not considering x86 compatibility. And Intel needs to be smacked for all those stupid extensions -- it's funny to see AMD accomodating them with less effort than Intel.
Alpha has always been the "64-bit RISC of RISCs" and they had binary translation techology c/o FX!32 so Linux/x86, NT/x86 and VMS/VAX apps could run on Linux/Alpha, NT/Alpha and VMS/Alpha, respectively. It was not only original, but using binary translation on the same OS, but different architecture, works far better for compatibility in software than general (any OS) architectural compatibility in hardware/microcode! With Alpha 364 at 0.13um would be kicking IA-64 butt. I mean, 3-year old Alpha 264 0.25um processors beat IA-64 at the same clock speeds!
Anyhoo, as a fellow EE/ECE, please read this post I made a few weeks ago and let me know what you think. It is entitled "How AMD and its partners are putting x86 back on the right track ... ". IA-64 was an ideal and novel concept, one that is not so good based in reality where good branch prediction is better than predication, and run-time optimization is just as important as compile-time. The Alpha 364 team predicted the "problems" with IA-64, which came true.
-- Bryan "TheBS" Smith
Independent Author, Consultant and Trainer
Inspite of the above post appearing to be a raving troll, I will respond with:
.... some how I doubt it. AMD has consistently underpriced Intel for the same level of performance. If it is more expensive it will only be at initial release and soon will be cheaper than a comparable Intel.
Lets see..... why do we like AMD
1 Dollar for dollar they kick Intel's hiney for performance. IE you get more bang for your buck.
2 A 800 mhz AMD is as fast as a 1600 mhz Intel. That is just plain cool.... It has geek cool factor all over it.
3 As to the last statement about an Opteron 800 being twice what a P4 1600
4 As geeks we get tired of a market dominated by inferior products... IE Windows is the dominat operating system, and Intel is the dominant chip. Sometimes we just like to root for the underdog. If AMD can beat Intel at their own game, more the power to them.
Fly Fish? Participate in our forum
Though the G5 has over twice as many opcodes as any cisc in history ever did, but RISC definition
keeps changing over the years.
NO. RISC's definition isn't changing. RISC's definition, by those who grokked the concept as opposed to those who learned of the concept from marketing material, has never meant low number of opcodes. ( that may have been somewhat of a side effect characteristic of the design philosophy, but merely a side effect if instruction set's domain was limited.).
RISC was philosophy of having a non baroque set of opcodes (polynomials, every addressing mechanism under the sun, etc.) , minizming wierdo registers, and minimizing to a set of "first principle operations". The last does NOT mean there is a small number of first principle operations. The PowerPC has SIMD operations along with more usual operations. Those are orthoganal to each other, so "more" does not necessarily more "complex".
In short, "Reduced" is in contrast to "Complex" not "Number". RISC suffers more from being a clever acronym that marketing found appealing, not from a changing definition.
Go to google groups.... look in comp.arch for John Mashey about the early 90's ( back when comp.arch had a substantially higher signal to noise ratio).
Or read an Hennesy and Patterson book.
You've been living in a cave, right?
Yes, _some_ Athlon chipsets did have serious problems with early versions of the 2.4 kernel. But this has been fixed for a very long time. I know this, because I'm using one of those chipsets. Be sure that you're actually using a recent kernel, and that you've gotten the latest BIOS updates for your motherboard.
Also, there were never any problems with running Linux 2.2 on an Athlon.
WMBC freeform/independent online radio.
I have not seen ONE PCI64 slot on any of these test boards!! I hope that this'll be worked out before release.
PCI64 has fuck-nothing to do with a 64 bit address space. It's a data bus. Since when did the register width of a processor have anything to do with the width of its memory and io buses? Hello, modern ia32 machines have 64 bit and 128 bit memory buses these days.
120 characters isn't enough to explain it.
Because Intel went & built their P4 fab on illegaly expropiated land belonging to Palestinians ethnically cleansed from a village near Gaza .
& have made no offer to compensate those villagers even though as far as the Geneva Convention, the Hague Convenention, the IDHR & the UN are concerned, they (the former villagers) still own that land.