Slashdot Mirror
The Economist Looks At The Console Industry
Fromeo writes "The Economist is running an interesting article discussing the state of the console industry, along with their usual interesting graph, showing the cycle that the industry follows."
← Back to Stories (view on slashdot.org)
My god...this article has more inaccuracies than a Slashdot story!
but Sony, Microsoft and Nintendo all intend to release plug-in adaptors to link their boxes to networks.
And WHERE do you plug in the Xbox broadband adapter, eh?
Both Sony and Microsoft decided that ordinary modem connections were too slow to do justice to their advanced consoles.
Really? Then why does the PS2 network adapter have BOTH network and modem ports?
All three firms are losing money on their consoles, though exactly how much is difficult to say.
Wrong again! Microsoft is the only one doing this!
And as far as that sales graph goes...not a single one of these systems is 128 bit. The GameCube and Xbox are both 32-bit systems (PowerPC-based and Intel x86, respectively). I don't know about the Emotion engine in the PS2, but I suspect that with less than 32 MB of RAM, there's no reason for it to have more address lines, so it's probably 32-bit as well. And the Dreamcast uses a SH4 processor...That certainly isn't 128-bit either.
"Mod, mod, mod...and another troll bites the dust."
That's ok, I know more about the PS2 than either of the others. The actual situation with regards to EE registers is pretty complex, as the EE actually consists of the core, 2 vector units, and an fpu.
The core has 31 128-bit registers, and instructions to manipulate them either as 32-bit, or 64-bit integers, or as 4x32-bit integers, or as 8x16-bit integers (where 4x32 bit means, four 32-bit integers packed into one-128 bit integer). The reason there's 31, is that register 0 (zr) is a constant 0.
Each vector unit has 31 4x32-bit float registers, and 15 16-bit integer registers. One of the vector units (VU0) is available to the core as a co-processor, as are all of it's registers. The other sits in the DMA stream, and can be thought of as a pumped up vertex shader.
Finally the fpu is pretty traditional, with 32 32-bit float registers.
So thats 31 128-bit integer registers, 31 4x32-bit float registers, 15 16-bit integer registers, and 32 32-bit float registers. Giving us a total of 109 registers, with a total of 8208 bits, and that's not including 20 or so status or result registers.
None of this is modal, you can mix core, VU, and fpu instructions as you like. There's also nothing stopping you treating a 128-bit core register as a 32, 64, 4x32, or 8x16-bit integer, nor moving it to a VU0 register, where it's treated as a 4x32-bit float.
There's also the IPU, a DMA controller, and a whole bunch of other stuff, but they're not directly accessibly from the core. Well, actually, even that's not true, as most things are also memory mapped, but that's only really for debugging, as memory mapped access has a habit of stalling everything.
Oh, and the bus to the RDRAM is 128 bit, while the bus to the GS is 64 bit.
So, in summary, mostly 128-bit registers, and a 128-bit data bus. It's a 128-bit system.