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AMD Moving to a 400MHz Bus?
An anonymous reader writes "According to this tantalizing Infoworld Scoop, AMD soon introduce a 400 Mhz bus. Seems that SiS's big announcement at CEBIT is the SiS748 chipset, which supports both 400 MHz DDR & AGP 8X, and is targeted at the upcoming Athlon 3200+."
There have been rumors about AMD going for a 400MHz bus for quite some time now. Some chipsets even have experimental support for it. With the Athlon 64 being delayed until September I would say that is the only way for AMD to try and stay competitive with the Barton core.
Maybe I'm being a little arrogant, but I still feel this isn't really much to be that excited about.
.: Max Romantschuk
Gee, good thing you know your metaphors, otherwise you'd be stirring a can of worms by leaving the wrong impression.
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Hmm. Yes, the K7 has gone from 500MHz to 2250MHz over its lifespan so far - but Intel's P6 core went from 150Mhz PPro to 1400MHz PIII.
Looks to me like they could still have plenty of room to play.
You DO realize that we are talking about the bus-speed, not the CPU-speed? You don't increase the bus-speed by huge amounts overnight. Move from 333MHz to 400Mhz, while not groundbreaking, is significant.
As to the "whole new architecture"... It's called Athlon64, and it has 800MHz bus (and loads of other improvements). Available in september in a store near you.
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The general rule of thumb for upgrading it to put it off for as long as you can, and then buy as close to the top of the line as you can afford.
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With a little patience
I think it can take quite a bit more.
Even with half the stated bus throughput, the Athlon seems to do a good job keeping up with the P4, and at a lower price.
Even at a lower clock rate, the Athlon can beat a P4. The Athlon XP 3000+ has essentially the same performance as a P4 for almost all applications, even ones where you'd expect the P4 to excel at (Video encoding) for example.
It helps that throughput isn't everything - Latency is also important, and the P4 was designed around an extremely high-latency memory subsystem (RDRAM), while the Athlon was designed around a much lower-latency memory subsystem. All the throughput in the world isn't going to help you unless the turnaround between a data request and that data coming from memory is fast. The only exception is if you rearchitecture the whole system (and this includes changing the ISA, which means it can't practically be done for x86) around a high-throughput high-latency memory subsystem. (PS2 is the most valid example - That system is designed around throughput everywhere, and it's designed so that memory latency is a nonissue.)
And don't forget x86-64... That architecture is making me drool. (Forget the 64-bit registers - What's important in the short term is that AMD doubled the number of GPRs and vector registers.)
x86-64 >>>> IA-64
retrorocket.o not found, launch anyway?
I just recently bought an Abit based NForce2 Athlon Motherboard. I have my DDR3200 running at a pretty 200mhz (so 400mhz DDR) and my FSB is at 181mhz (so 362mhz DDR). I have made some changes so I need to try for a 200mhz (400mhz DDR) FSB again. I can tell you that just upping the FSB and your memory bandwidth can have great performance benefits for memory intensive apps (such as gaming). So this will be a great boost for the current XP line. Oh, and in case anyone is wonding, I have an XP2100+ (1.73ghz) running very nicely at 2.2ghz!
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Depending on what you use the PC for, you might not notice anything at all. Current desktop PCs are more than adequate for web/email/office work, and have been since Intel first hit 300 MHz or so. I have a PII 400 running Windows 2000 at work that does not seem slow at all running all the basic, standard applications.
If you do stuff that involves digital video, compiling source code, or other types of activities that actually push the CPU, you might notice a difference between a 266MHz system bus and a 333MHz system bus.
The speed of the front side bus determines in part how fast information can get to the CPU from main memory. If you have fast memory + a fast FSB, you can get your CPU to work pretty darn fast. Your main performance bottlenecks are still going to be memory latency and hard drive access speed, though.
But once information gets from there to the main system memory, if you can keep that CPU at high utilization, you'll notice a pretty significant boost in performance.
You see? You see? Your stupid minds! Stupid! Stupid!
I can choose a "top of the line" system, or a system that has 75-80% of the performance for half the price.
As a result, it's cheaper to buy a "lower end" system at a lower price and just replace it with a "lower end" system a year later. I'll get two systems, one of which is better than today's "top of the line", for the same price as one "top of the line" machine today.
Make sure you get something upgradable, of course.
Just look at CPU prices: Athlon XP 2500+ CPUs run around 2x the price of a 2000+. 3000+ CPUs are double that again. That's 4x the price for 1.5x the performance. Same for RAM, and to some degree hard drives. (With hard drives, you often get more "bang for the buck" by getting something close to top of the line. 120 gigs or so is currently the sweet spot as far as price per gig, and that's close to top of the line these days. But as soon as you jump to 160 or 200 gigs the price skyrockets. If you go down in size, you're spending not much less and getting significantly les.)
retrorocket.o not found, launch anyway?
" Argh... do i wait for athlon64 or opteron, or do I get one of these bad boys?! Decisions, decisions..."
I think you just put your finger on why AMD sales are down. Opteron is so hyped up people are waiting for that. I'd feel sorry for them but I'm also waiting for the opteron before replacing my PC.
AMD better forget these little incremental speed bumps and switch to a whole new architecture this year if they want to remain competetive.
It's called x86-64. The Opteron ships next month.
The current architecture is like milking a deadhorse and they are already running waay too hot.
I did not need that mental image...
Current Thoroughbred and Barton core Athlons don't run all that hot. An Athlon 3000+ runs cooler than a 3GHz P4.
I reclocked my TBred core Athlon XP 1700+ to 8x202MHz (404MHz DDR) on my ASUS A7N8X Deluxe motherboard (Corsair PC3200C2 DIMM). I kept the default core voltage (1.5v). MemTest86 verified that it works reliably. Upping the FSB is mostly a matter of motherboard and memory support, not CPU support (outside of being able to adjust the clock multiplier). A few years ago I reclocked a 150MHz Pentium to 1.5x100MHz. Worked just fine.
Anyone remember just a couple years ago when you could actually plan out a simple upgrade to your computer that would make it perform better for a modest price?
Toss in some extra RAM, wow no swapping!
Replace that CPU, doesn't Quake run good now!
The furious pace of bus speed changes have pretty much killed these types of upgrades for home/desktop users. Adding more PC2100 ram to their system when they know they're getting a DDR400 mobo is highly annoying. And forget about popping a new P4 or Athlons into your 1 year old mobo. Gotta buy $300 of new RAM and a $200 new DDR666-PC31337 AsusBitDragonMSI Ultra Deluxe to go with it!
Bleh.
Not true! I have my KT266a motherboard here running a barton, it's just got the FSB underclocked, it runs cool and faster than my old tbird. And this system has PC3200 DDR RAM=, it just is running at PC2100 speeds right now. My next purchase wil be a new mobo that can take FULL advantage of the CPU an RAM. Look at the Intel side, they change the PHYSICAL pinout so you CAN'T do this. The athlon has been on one single pinout while intel has done FC-PGA, FC-PGA2, 427(?), 472(?).
DOn't underestimate the power and value you can get from underclocking.
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All digital data is synchronized to a clock, be it source-synchronous (i.e. clock comes with data), which is the case with DDR, or recovered clock (i.e. clock information is based on rate of change of incoming data). Whatever scheme you get, you will still have a clock inside at some point.
Traditionally, the memory elements or registers on a chip will ignore incoming data until the clock signal undergoes a positive transition, i.e. logic low to logic high. At that point, assuming the data has been stable for a long enough period of time before and after the clock edge, it will be captured. However, since there is only one positive edge per clock cycle, data can only be captured on that edge.
In a double-pumped scheme, what you have is a set of 2:1 multiplexors that go to two different sets of registers. One is sensitive to positive edges, the other is sensitive to negative edges, i.e. logic high to logic low transitions. If you simply wiggle the data out faster, and you have a double-pumped scheme with a small FIFO buffer, you can recover data twice as fast as a single edged scheme. On the interface itself, there are special low skew low insertion delay clock distribution schemes that enable this to happen without too many problems.
In a quad-pumped scheme, you actually have two separate clocks that are 90 degrees out of phase with each other. In effect, you have two positive and then two negative edges to work with internally now. You wiggle data out at 4x the single data rate, and have 4:1 multiplexers to the registers, plus (again) a careful layout of the internal clocks.
The area overhead in such schemes is minimal (~10% for DDR) and really takes advantage of the speed of on-chip devices. It does take some special consideration, but from the perspective of increased die size, it's not a problem. Power, however, is significantly increased for both I/O (SSTL-2 type stuff) and for core devices because of the data rates, and that is also a consideration during design of not only the power distribution, but also the package/module design and the board design.
And, FYI, Rambus uses multiple serial/deserialization (SERDES) that wiggles data between a pair of signals (positive and negative) whose voltage differential is recovered, not for individual levels, which (supposedly but not actually) simplifies matters. Transmitting data via this differential is actually much faster than a single-ended scheme like DDR currently is (single ended meaning all I/O refer to a common ground (and voltage reference)). Then they even IIRC get into exotic schemes like multi-level differential (i.e. steppings between 0 millivolts differential and full swing). I could be wrong about the latter though...