Clearspeed Makes Tall Claims for Future Chip

Josuah writes "ClearSpeed Technology announced today a new multithreaded array processor named the CS301. Their press release states the chip can achieve 25Gflops for only 3W of power. New Scientist and TechNewsWorld have articles on this chip, each with more information about the chip. I wondering if this is too good to be true." The key phrase is in the Wired story: "Soon to be in prototype, the chip...". "Soon to be in prototype" is synonymous with "does not exist".

Comments

"Soon to be in prototype"

[psyconaut]

Chips are virtually fabricated and tested well before the first bit of silicon is etched....you can actually be pretty sure of both a chips performance and reliability just from simulations these days. Also, having to etch development chips constantly is both expensive and time consuming....so the longer you can leave a design in virtual space, the better.

-psy

Skeptical

[cybermace5]

As well as the fact that I've seen this press release trolled by AC's on Slashdot.

25Gflops on 3W? That must be some unorthodox technology at work there. Anyone hear anything about some research corporation finding an amazing processor in a robot from the future?

Maspar

[hobit]

For the last 10 years or so I've been thinking about how to do just this. What I'm 99% sure they are doing is SIMD on a massive scale. The Maspar (and especially the Maspar-2) were computers along this line.

The basic idea is to have lots of "processing elements" that are basically ALUs with a bit of additional smarts (for branches mainly). Each PE has its own memory. The main processor (probably not the PC CPU) tells each PE what to do. Thus the Single Instruction Multiple Data. Things are a bit more complex then this (branches, pointers, and a few other things cause some problems.) but not too much worse. PE to PE communication is also interesting (the Maspar was a toroid as I recall).

The two basic problems with this type of a design are:

• You either need a special programming language (and someone who understands the language and understands the problem really well) or a very very good compiler to get anything out of it.
• The application range is quite limited. Not as limited as supercomputer people seem to think (I mean I've written genetic algorithm code for the Maspar that scales wonderfully.) but still quite limited.

There are also a huge number of other problems. Caches don't generally do a darn thing for massive SIMD computers (if one processing element misses, they all do.) The memory usually has two types of pointers (one to the PE memory and one to global memory). I may contact the company to see if they want to hire a short-term consultant. hummm.... Have PhD will travel?