Intel to Increase Stages in Prescott

Alizarin Erythrosin writes "Further contributing to the MHz Myth, The Register and ZDNet are reporting that the new P4 core, codenamed Prescott, will have a longer pipeline then Northwood. No official numbers have been released, but The Reg is saying an Intel spokesman said that 30 stages seems to be a reasonable estimate. As most of us know, a longer pipeline can lead to slowdowns in the form of branch mispredictions and pipeline stalls. 'And just as the PIII proved faster than the early P4s in some applications, it's likely that Northwood will similarly prove faster than Prescott, which has clearly been designed for speeds of the order of 4GHz.'"

Comments

Holy pipelines

[Breakfast Pants]

With all these pipelines you'd think intel was Bush and Prescott was Afghanistan.

Re:Holy pipelines

[k4_pacific]

Recall that GW Bush's grandfather was Prescott Bush.

Bang for your buck

[ObviousGuy]

Northwood was really unsatisfying. I found that for the money, it was too short with too few stages. While gameplay was fine, the lack of stages simply made the cost not worth it for me.

2 stars.

Re:Bang for your buck

[johnnorthwood]

Hey... I have had many ladies say i was satifying.

Size of pipeline

[odeee]

It's not the size of your pipeline that counts... its how you use it.

Myth?

[The Bungi]

Alizarin Erythrosin writes "Further contributing to the MHz Myth ...

Let me guess - 'Alizarin Erythrosin' is Cupertinus Elvish for 'Mac User', right?

Re:So What ?

[stevesliva]

I'm kind of tired of you armchair OS coders. So the happy few, highly paid Microsoft employees, 20 years experience in copying IBM, thousands of stock options in Redmond decide the next gen OS will have some wack FS and they have to be called morons? How do you know better? Hasn't Microsoft produced the best selling OS on the market for 15 years? Why don't YOU have the job leading the Longhorn team?

Oh. Yeah... LINUX.

Nevermind-- go back to writing the best OS there is.

Re:ummm...

[glwtta]

Are you most of us?

Re:It;'s not that it'll be slower...

[edrugtrader]

I highly recommend reading a computer architecture book if you're at all interested. It's really facinating stuff.

dude, i don't even read the articles.

4-stage pipeline

[mosb1000]

Gosh, I'm feeleing really left behind, my G4 400 only has 4 stages in it's plpeline. At least it's build on a .22 micron process as apposed to the Pentium's measly .13 micron process. Yes, that was a joak

More details on Intel's processor

[rice_burners_suck]

Intel today announced its new 1024-hexabit microprocessor architecture technology. Named the Quantium, Intel's new processor core boasts powerful new technologies which will enable governments to better manage the rights (or lack thereof) of their subjects.

The Quantium has the following new features:

• Intel (r) LightSpeed (tm) technology breaks the processing pipeline into 299,792,458 discreet steps. As there is no internal clock within the processor, all operations occur at the speed of light. Hence, one "cycle" represents the absolute cosmic measure unit of time and all operations occur in one cycle. While this will not increase the processor's performance--indeed, it will pale in comparison to that of the ancient 80286 processor of old folklore--the faster internal clock speed is expected to increase Intel's sales by 0.000001% within 180 quarters.
• Intel (r) SingleAtom (tm) technology squeezes the entire processor into a single atom by modifying the universe at the M-theory level. Individual strings compose modified quarks and other subatomic structures, which combine to form a very heavy atom, one with approximately the same weight as 1 million protons. As the matter is extremely dense, the radioactive decay, combined with the gravity generated by itself causes the configuration of the subatomic particles to remain bonded at the subatomic level while realigning a nearly infinite number of times every second. This realignment constitutes the execution of instructions within the SingleAtom (tm) processor.
• 893,378,665,113 new operations have been added since the previous model, bringing the new total to over 18 googleplexes of instructions. All SCO intellectual property can be programmed in a single instruction, increasing SCO revenues. Corporations will have to pay $799 per processor instruction executed, or face serious legal action.
• RAM has been depreciated. 4 billion exabytes of internal general-use registers allow software to make more efficient data access, providing a more compelling Internet experience over a 28k modem connection.

Re:I guess the home market rules...

[gjm11]

"DIMMMM / DIE / DIE / DIE / D_IE" ... You aren't an employee of Rambus Inc. by any chance?