Stretch Announces Chip That Rewires Itself On The Fly
tigre writes "CNET News reports on a chip startup call Stretch which produces the S5000, a RISC processor with electronically programmable hardware so that it can add to its instruction set as it deems necessary. Thus it can re-configure itself to behave like a DSP, or a (digital) ASIC, and perform the equivalent of hundreds of instructions in one cycle. Great way to bridge the gap between general-purpose computing and ASICs."
Can you imagine the virus you could write if you could change the instruction set of the cpu?
If this doesn't rempresent the death of the megahertz as a processor-benchmark standard, I don't know what will...
/. cliche, but... imagine a cluster of these!
Effective application speed was never based on a cycle count alone, because different processors can have better instruction sets for the given application. The main breakthrough here is that this chip leaves "user-definable" space in its instruction set so they can re-optimize the instruction set on the fly. Whatever you're running, its most commonly used functions can almost slide from being code to being "on the chip" and that's sure to speed up the experienced speed.
Yeah, I know its a
we can have only one standard assembly language? the hell with java if that's the case.
I write code.
... wake me up when i can buy a thousand of them for $10 a piece ...
[okay, okay, so it'll be -hell- fun to design codecs and other protocols that can switch their chipset dynamically, yeah, but i'd need 1000's of them deployed to have a real reason to do it...]
; -- the corruption of government starts with its secrets. a truly free people keep no secrets. --
I think we're going to have to move the crypto benchmarks back a step when this tech comes out. Not very many of us have RISC chips that are optimized for MD5 or any of the other popular crypto formulas, but if the typical consumer PC had this technology, we could all effectively have an on-demand RISC for whatever we need at the moment sitting in our PCs.
In short, the time-to-crack using consumer technologies for almost any form of crypto is about to take a step backwards. It won't "break" anything, but the brute force combinations will be able to be examined in a faster time, meaning higher standards will be needed for the same level of protection you have today.
Not surprising, these breakthroughs will always keep coming...
How can something that normally takes "hundreds of thousands of instructions" be handled in a single instruction? Surely all the same mathematical operations must take place, except for some optimization. Or is it a matter of a certain structure for computation being created in a more permanent fashion rather than being dynamically formed upon demand? Then the operations could be performed in a single cycle. On the other hand, that portion of the processor would become useless to other tasks. Or am I misunderstanding this entirely?
IANAEE, but I was just wondering if this technology provides greater advantages to unique monolithic apps as opposed to apps targeted for virtual machines such as the JVM or CLR. Those VMs are general-purpose, and maybe apps that run on them would be "invisible" to the hardware reprogrammability... however I don't know how just-in-time native compilation might change that picture. Anyone with knowledge of this stuff care to enlighten?
Read my keyboard review.
...I sense another Transmeta coming on...
Yes sure, rewirable chips would be cool for certain applications, but how does one go about making it deal with multiple applications with multiple needs? You'd over load the CPU with a truckload of specialized instructions - which would probably slow it down. Granted, I see uses in things like mobile phones, but for multitasking machines, a 'Jack of all trades' chip is the way to go.
yea, but a working implementation is a long way from a concept paper...
Nope
See the script
Required reading for internet skeptics
This will be useful in places that they mentioned. Places where you do a lot of processing that takes many generic instructions but can be translated into a single string of descrete instuctions.
The more I think about it, this is the direction processors are going. We keep moving processors towards RISC based cores. We keep adding specialized paths for things such as multimedia. Eventually we WILL have half the processor being a purely RISC core and half being programmable hardware for specialized computational intensive instructions. I retract my initial view.
I do wonder though, what the life is on the hardware side. How many times can you reprogram the hardware before it starts to die. What is the error rate in reprogramming it? What happens when a few programmable transistors die?
I do security
Natural questions come to mind like how quickly does the chip configure itself to optimize for the application, does the configuration only occur at start of the application, how many chip-configuring applications can it run concurrently, will it optimize for interpreted languages, can some configurations be made "permanent" to accommodate the OS used. I can see how this chip would optimize some specialized tasks, but I don't know if it will run well in an evironment where many different types of tasks are expected to run at the same time.
Another issue relating to the gaining acceptance is whether Stretch releases specs so that others can write their own compilers. Is Stretch pursuing a pure hardware strategy (not trying to sell compilers, create their own OS, etc)?
General purpose CPUs are fast, ubiqutous, and cheap. While compelling, this new approach is in no sense a slam-dunk in the market. Stretch will have to show a compelling case why this is a faster and cheaper alternative to the x86 (compatible) hegemony.
The same way you detect a virus on any machine that has been compromised, with another machine and or a thorough understanding of normal operation and running processes. Nothing new here. Evaluate the harm done by a potential compromise and take steps accordingly.
There is no practical difference between a hardware and a software compromise and the remedy is the same. Indeed, for critical purposes, there's little difference between a hardware compromise and a simple failure. You should anticipate it and not get burnt. The bottom line is know your shit and be in control when strange things happen.
Security is a process and must be applied system wide. If you don't have reasonable configuration control, you are already lost. If you run junky closed software that's full of bugs and does not keep track of uid, pid or processes themselves you are always in for a rough ride. The trouble given you there will distract your operators, like it did for the last big blackout. Every piece has to be taken considered in context. It's not hard, it just takes time, organization and judgment.
I hate how Ludites always look at any new tool and cry out, "look how awful [insert wonderful new power] is!"
Friends don't help friends install M$ junk.
Looking at their brochure, it is based on Tensilica Xtensa technology (www.tensilica.com) which I know has been around for atleast 3 years. Nothing remarkable. Many companies have developed similar products.
Actually, it's almost certainly based on standard SRAM FPGA technology. It's quite cheap in terms of power, and not especially expensive in terms of time, to reprogram, and there is no degredation over time from doing it too often. The only real disadvantage is that it might be entirely possible to create on-die shorts with bad programming data, as it currently is in FPGA's.
Hardware, software, and blinking lights!