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Stretch Announces Chip That Rewires Itself On The Fly
tigre writes "CNET News reports on a chip startup call Stretch which produces the S5000, a RISC processor with electronically programmable hardware so that it can add to its instruction set as it deems necessary. Thus it can re-configure itself to behave like a DSP, or a (digital) ASIC, and perform the equivalent of hundreds of instructions in one cycle. Great way to bridge the gap between general-purpose computing and ASICs."
How is this different from FPGA's?
Thanks
-b
If I wanted a sig I would have filled in that stupid box.
I remember a project where hardware engineers setup a cpu to modify itself until it learned to do a task by itself. It got to the point where the hardware was doing the right thing, but not because the hardware was reconfigured properly, but because the software was using minute naunances in the electricity flowing through to get the job done. Even the hardware designers had no idea how it could possible be working
From what I gathered, this allows the compiler to create an instruction that can do a lot of work in one instruction, NOT for the processor to decide to create an instruction. Think of it this way, if you know you need to do something like an array multiply many times, the compiler could create an instruction for it, and then use it as needed. The key to this is that the instruction set can be optimized on a program basis, so you don't waste gates on SSE2 instructions if you don't use them, etc.
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This would compare with FPGA's I believe in that most FPGA applications are fixed once loaded, although I know that there was talk about stargate systems on slashdot (http://slashdot.org/article.pl?sid=03/02/15/1629
using FPGA's for general processing before.
"Can you imagine the virus you could write if you could change the instruction set of the cpu?"
Forgive my ignorance, but why would this be any different than the virus you can write with the general purpose CPUs we have today? You could make the machine unreliable, but that wouldn't make for an effective virus distributing machine.
"Derp de derp."
Hardware manufacturers that need special hardware operations (IE MPEG-2 decoding) use dedicated, custom hardware for large volume production. Dynamically configurable hardware is expensive for large scales production, and small scale production will likely use FPGA for similar effect. I may be sceptical, but I doubt it'll catch on.
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This sounds vaguely like the dream solution for developers. The article says:
Does that mean it can handly booting multiple OSes simutaniously? If so, how long before someone writes an app that bridges multiple OSes, allowing the equivalent of emulation, without the emulation? I don't know about the rest of you, but the potential of this chip sounds like a dream come true. And at $35-$100 per chip... it's cheaper than the processor for most systems anyway.
This looks interesting, at this generation it looks to be dedicated applications. You code for your particular application and use their compiler which restructures the CPU to optimize for that application. What it does not say is if the hardware changes are read/write. If you release a maintenance patch to your application, do you have to swap in a new CPU for optimal performance? If the area is read/write just how many times can you change the CPU instruction set? Can you change the CPU instruction set with something else other than using their compiler? That is using a microcode release that rewrites the CPU. I would not want to load a compiler onto every one of my products.
One of the best applications for this chip is a programmable Graphics card.
Imagine the optimizations that you could do for the next release of the Doom engine. They could own the market for GPUs that optimizes itself for specific games. Could be amazing.
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I can just see this processor, mixed with a bit of Mark Tildens analog AI research to really advance Artificial Intelligence. For the uninitiated Mark Tilden discovered that by tying a group of only four or so transistors and sending a regular analog signal through it he could get small robots to walk, and indeed do an amazing number of things, including optimize it's path and even remember it's solution for a small amount of time(about 3 or 4 seconds). Not only that but when given a certain stimulus need (example make them solar powered and have only one are of light they would compete with other bots to gain access to better light. Indeed a lot of the behavior that these little bots produce is so complex and life like that he has spent a long time just documenting behaviour. Now give a set of these bot's circuits the ability to "optimize" the speed of the signal, and a few stimuly and let it play. If the stimulous was for "human approval" some input from a human indicating good or bad.... Heck what do I know, I'm non AI researcher but it always sounded cool to me :-)
For more information on Mark Tilden go to
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I highly doubt anyone is planning on making PCs with these. They are designed for being a processor in something like a data logging / control system, surveillance video compression, etc. Your system will probably have no need for virus detection any more specific than other more general regression and test suites it will need during operation.
That insanely complicated piece of software that can automatically figure out what it needs the chip to do at any given time for its own survival --
oh yeah, we have those... PEOPLE! Now, can I get those neural processor connects and graft this thing to my head already?
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Sounds like this would be a perfect processor for emulating consoles such as the SNES, XBOX, GameCube, PS2, etc etc or pretty much any other processor.
i could imagine it no so much as an 'optimization' device, but as a complete 'system-description' protocol machine.
...
in other words, i can not only embed codec details in my datastream to you, but at the beginning of it all, i can give you a 'cpu package' that you can use to run my custom codec, perhaps just once...
what interests me about the S5000 is, what of the S5500, &etc? do they have plans to segragate cores from each other in other ways - say by way of a 'certficate broker' chip, also on-board?
because if so, this could be a real boon for future media control, as long as the other reasons for this chips success actually are also fruitious, and results in a real market deployment.
being able to change not just instructions, but what those instructions mean, dynamically over a protected core, would give software a new protection mechanism, is what i'm trying to get at
; -- the corruption of government starts with its secrets. a truly free people keep no secrets. --
This reminds me of Field Programmable Gate Arrays. Can someone explain the difference?
Reprogrammable processors would be great for PCs as a sort of subprocessor. Games could offload calculations for their physics and AI models. Spreadsheets could offload all sorts of calculations. Mathematics-intensive applications could implement their own random-number generating algorithm.
In fact, there may be advantages to dumbing down the CPU somewhat. Remove some of the SIMD instructions in favor of applications and libraries implementing more specialized routines in the subprocessor.
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Of course, that was only a little over 20 years ago.
FYI: Since somebody is going to ask... The original Z80000 design was killed when Zilog stalled out as a general purpose processor maker and moved into embedded processors after the bugs in the initial run of Z8001 chips and IBM's selection of the Intel 8088.
We do, say, 2048-bit encryption (asymmetric), because it would be "too slow" to do 20480-bit encryption. "Too slow" here is a fuzzy term, but generally speaking, if you're sending an encrypted email you don't want to hit "send" and have it delayed for three weeks while it gets encrypted. There's no real reason we couldn't do it today.
5 6 times harder.
As computers speed up, both encryption and decryption get faster. However, while adding another 128 bits to 128-bit symmetric cipher may be "free" with newer computers (and eventually will be), the 2^128 multiplicitave increase to the space the decrypters have to search is not free. To increase encryption power, the encryptors merely double their work. (To an approximation; I don't think the work load is strictly linear but it's a lot closer to that then exponential, and that's all that matters.) Meanwhile, for that relatively modest investment in encryption power, the decrypter's jobs got 340,282,366,920,938,463,463,374,607,431,768,211,4
This is why, in the relatively near future, we'll all have encryption that is effectively "unbreakable", because no conceivable decrypter could be built that could do the calculations to crack the encryptions, even with the raw materials of the entire Universe.
Practically speaking, most of us already have damn-near unbreakable encryption today; if you're connecting to a computer with SSH, SSH is most likely the strongest link in your security chain by far; the weak links are the computers on each end of the link, the humans on each end of the link, and possibly the facilities the computers are in. Nobody is going to tap your ssh stream and get any value from the massive decryption effort that would be necessary unless you're trading secrets worth billions.
Specialized hardware can only gain you a linear speed up, at best, and those calculations for "minimal computer" to crack a given encryption key are not extrapolated from modern computers, they are extrapolated from the maximum computation possible to do, given a finite energy supply. (QM-based computation advocates may wait until they have a large-scale (multi-thousand-qubit) machine to jump in here.)
I'm currently working on modular multiprocessor systems implemented on FPGAs, so this field is something I know something about.
Altera produce an FPGA with one or more built in ARM processors. This sounds very similar to the Scratch system, but the ARM processors are limited in connection into the fabric of the FPGA by the not particularly fast bus used with the processor. Scratch appear to have made the data transfer rate between the two parts of utmost importance, which is essential in high throughput applications like this.
Altera have also developed a softcore processor, that is one implemented entirely on an FPGA. It is highly configurable - instructions can be added, cache and memory behavior altered, buses adapted, etc. Coupled with things such as the DSP blocks (trees of multiply accumulates), a 50Mhz processor can process data in a specific task at the same rate as a general purpose processor running at 10 times the speed.
The work I'm doing is investigating the use of many of these processors on one fpga. Levels of optimisation that cannot be done with conventional multiprocessor systems will be possible. Changing the memory system to deal with specific algoriths, or bus widths between certain processors will allow much better performance.
Scratch also seems to be making a difference by claiming to have easy to use and working development tools, which is one thing that Altera cannot really claim to have done.