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End Of The Line For Alpha
Scareduck writes "Infoworld reports HP has released the last iteration of the Alpha chip. I used these babies in the late 90's, and for a time, they were da bomb. Sadly, the economics weren't there, DEC management really didn't have much of a clue, and Alpha has, at long last, bit the dust. Alpha-based servers will continue to be sold through 2006, and supported through 2011. Farewell, Alpha; the world's line of chips seems to have declined to Intel and a handful of niche guys." Slashdot ran for the first 7 or 8 months off an Alpha box.
"Pricing for the ES47 and ES80 systems with the new 1.15GHz EV7 will start at $29,200 and $49,300, respectively."
Holy crap! And here I was, thinking that the Xeon servers were expensive!
He meant intel architecture, you could argue that AMD64 is a new arch but it's still X86. What sort of nerd are you anyway?
AMD is still an Intel architecture.
Here's the article about the alpha: http://en.wikipedia.org/wiki/DEC_Alpha
I'd hardly call Intel the biggest CPU architecture out there.... maybe for PCs.
ARM comes to mind. what about the embedded market? Atmel's AVRs, Microchip PICs, Motorola HC08's,HC11's, there's billions of non-intel architecture CPUs shipped every year. To those guys, intel is just a niche player....
[flame suit off]
hmmmmmmmmmmm.....
lessee, we have the powerPC by IBM, used both in their own machines and in apple hardware. We have the sparc machines by sun (which may or may not exist for much longer). We have AMD, which is becoming more and more mainstream, perhaps the biggest competitor intel has had in a long time. Oh and we forgot one other thing... how about all the chips that go into devices like phones and PDAs. You know, the motorola chips and such. For that matter, what about GPUs on graphics cards?
seems like there are a long more processors out there than the article says, dont you think?
"goodbye and hello, as always" ~Prince Corwin, from Zelazny's Amber series
Slashdot ran for the first 7 or 8 months off an Alpha box.
If memory serves, Slashdot ran on a Multia.
LK
"Hi. This is my friend, Jack Shit, and you don't know him." - Lord Kano
IIRC, Altavista(originally altavista.digital.com) was just a little demo project used to show off the digital alpha systems that it ran on.
IIRC, AMD licensed the Alpha memory bus design and it's still used today. It's how AMD ended up with such a fast bus and beat Intel for ~2 years with a faster FSB.
So, if you run and AMD CPU then you're keeping the DEC Alpha technology alive. Also, don't forget that the DEC StrongARM was part of the DEC technical vision too. It's how Intel got into the handheld market. Too bad DEC thought Microsoft was it's future....
LoB
"Anyone who stands out in the middle of a road looks like roadkill to me." --Linus
What is really sad is you have not heard of the highly powerful, and successful AMD series of chips
You mean the one's BASED on Intel's architecture?
as the Motorola chip sets
No one uses Motorola's chips for PCs anymore. All of Apple's PowerPC chips come from IBM, and IBM uses its bigger cousin (the POWER chip) in its Unix servers.
Of course, I'm not a big IBM fan so I tend to have selective memory about those.
Javascript + Nintendo DSi = DSiCade
In the early 90s, there was this hot debate about RISC vs. CISC, and the merits of each, ...etc.
This has all died out now, with CISC (read: Intel) coming out as a winner.
Well, maybe. Intel is a big winner, but every single Pentium or Athlon is remarkably RISC inside. In fact these chips are so much more complex than any of the "pure" RISC or CISC chips the statement that CISC won is practically meaningless.
Which side does Out Of Order Execution come from? Intel did it fast first.
Who use OOOE now? Everyone.
Theres a huge laundry list of features in modern high-performance CPUs that do not fit into RISC vs. CISC. Trace cache, micro-ops, CMT, CMP, etc etc
Their plan to move everyone to itanic appears to have backfired. Has itanic finally sunk?
Stick Men
"they are not used much"
The numbers of PowerPC embedded processors shipped every year dwarf the combined total numbers of desktop, workstation, and server CPUs shipped every year from every architechture.
I rarely criticize things I don't care about.
PowerPC architecture is probably more widely used than x86.
ARM architecture is VERY widely used.
M68k architecture is still used.
Just because desktops and servers don't use it doesn't mean it isn't used. For example, I worked on a program that sold ~2 million PowerPC chips per year. For one automotive module. How many Pentium 4s does Intel sell in a year? A lot, to be sure, but the number of chips used in embedded applications dwarfs that of desktops, and in the embedded arena there's still a ton of choice of architecture.
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Mod me down, you fucking twits. Go ahead. I dare you.
(I read with sigs off.)
AMD and intel processors do not share an architecture. AMD and intel have been making their own RISC-architecture x86-compatible processors (AMD is more RISCy than intel) since the K5 and Pentium, respectively. In particular the K6 is entirely RISC inside, with an emulator strapped on the front and back ends (fetch and restore.)
I think you mean the one based on intel's instruction set.
Of course, intel's new 64 bit processors are in turn based on AMD's instruction set...
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
Then tey had the stupid idea and buddies decided to kick out Hewlett (who at least knew that the employee loyalty went both ways, and recognised the strength in their printers), and decided to , support Carly's silly idea of
1(HP) + 1(Compaq) + 1/2(Dec) = 0.95(HPQ)
which made them #1 for a very brief moment until they decimated themselves with the first major layoffs in cocmpany history making themselves #2 or worse in most things within a quarter or two after they were #1. Amazing that they try that hard to become #1 (which for some reason they pitched to investors as being more important than having a sustainable business), only to then trim themselves down to be #2 to save costs.
Turns out Hewlett was right in the ind. They were a great printer company, and if they ditch the Compaq crap and the random software that they bought and never used (remeber the "$470 million mistake in buying Bluestone"), they might become a great printercompany again.
Between Compaq&HP this should be a case study of how stupid executive decisions can kill a company. They had the best CPUs (Alpha, and PA-RISC), the best search engine (Alta Vista), etc. They could dhave been Intel+Google.
Now what the hell have they become? A more expensive(at least til they finish their layoffs)-than-Dell reseller of Wintel. God what an embarassment.
Bring back Walter Hwelett!!!! At least he rememberd and understood what HP once stood for.
No it isn't. Stop repeating this garbage. AMD has been making their own RISC-internals processors since the K5. The K5 is not very RISCy, but the K6 certainly is, although both of these processors, as well as the K7 (Athlon) and K8 (Hammer) all emulate the x86 instruction set. The Hammer-core processors in particular do not resemble the cores of the older intel processors, or did you totally fail to notice the 16 externally-expressed 64 bit registers? Intel's cores meanwhile have also changed dramatically since the simple days of the 486 and they have many more registers than are directly addressable, and utilize register renaming (among many other techniques) to speed up execution.
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
Thanks to the ruthless intel vs. AMD competition of the last half decade, that is now the case, but it didn't used to be.
Back in the early '90s when the 64-bit RISC architectures were coming out, x86 was a joke. Now, Opteron is more or less a DEC Alpha with an x86 translation unit slapped on top and hypertransport, which made its way down from Cray, via the Sun E10k to the desktop.
If it hadn't been for these radical RISC architectures, and the intel vs. AMD fight, things would be very different.
Don't even think about multi-processor Xeon systems. The primitive bus architecture and interprocessor communications simply does not scale well at all past 2 processors. You can just about get away with 4 processors, but after that, you might as well just put space heaters in the box.
Stick Men
> No one uses Motorola's chips for PCs anymore. All of Apple's PowerPC chips come from IBM,
False. The eMac and all current Apple laptops ship with Motorola chips. In units, Apple sells more Motorola than IBM.
If you have a system on the Alpha that is say, 3 years old, and you were expecting to upgrade in 2 years, then this forces a decision: go through a PAINFUL migration expense now, or make a capital investment to push it off.
Remember, buying equipment is easily depreciated over 3 years for PCs, probably longer is reasonable for Big Iron (I don't mean for tax purposes, I mean for their financials). If it costs me $0.5m in capital costs spread out over 5 years to upgrade a LOT of Alpha machines, even if it only costs me $200k to migrate off the platform, I may prefer to buy the Alphas that will only hit earnings by $100k...
It also depends, what is IT's budget for new hardware vs. budget for software migration expenses.
Also, if you were planning to buy a new Alpha to replace your old one, this is a smart time to buy it, because you can avoid dealing with the software migration now. Let's say you need to upgrade within 12 months, would you rather rush a migration job, or buy the gear and deal with the migration in 3-4 years, when you have time to plan.
Which 15 years? In the early years of the "IBM PC" architecture, Intel (which didn't have the manufacturing capacity it has today) directly licenced Harris, AMD, IBM, and Hitachi to make their own 808x/80286 chips. (Lots of IBM-brand computers had "IBM Inside", not Intel.) There were also the NEC V20 and V30 chips, which were unlicenced 808x clones. Then AMD, Cyrix, IBM, and TI all produced 386-equivalents, and then the whole slew of 486-alikes that prompted Intel to switch to the trademarkable "Pentium" name, while others sold similar "586" and "686" chips. Which brings us to the modern crop of AMD Athlons, Transmeta Crusoes, VIA C3's and such to which you referred. I'm not sure there was even a 15-month period in which Intel was the only source of x86-compatible CPUs.
http://alternatives.rzero.com/
Sorry. I said ONE PROGRAM. I.E. one specific module. That performed one specific function in an automobile. Not even a very big program. I work for someone who buys PPCs, not makes them - I have no idea what total sold is, but it dwarfs x86.
Most automobiles currently sold have at least 5 embedded processors in them. Some have upwards of 50. Very few of those (I've never even run across one, actually) are x86 architecture. The point is that while x86 may lay claim to the desktop, the desktop is an absolutely minimal part of the entire CPU market, and x86 barely even plays in that market.
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Mod me down, you fucking twits. Go ahead. I dare you.
(I read with sigs off.)
They've got a permanent cross-licensing agreement that lets either party use what the other comes up with.
No one uses Motorola's chips for PCs anymore. All of Apple's PowerPC chips come from IBM, and IBM uses its bigger cousin (the POWER chip) in its Unix servers.
Actually, Apple gets all of the 74xx family (G4) chips - i.e., all PowerBooks, iBooks, current iMacs, etc...in other words, the majority of computers it sells - from Motorola (the semiconductor unit now being "Freescale").
Only the recent 75x (G3) and 97x (G5) family chips come from IBM, and Apple doesn't ship anymore G3-based machines.
Microsoft Windows NT 3.5 was ported to Alpha platform by programmers from Digital Equipment Corporation (hereinafter DEC) and it was not true 64bit processing. It didn't allow a long int, and that is the easiest example I can give you. It also didn't support as much RAM as it would have in 64bit mode. DEC's programmers also caused a small intellectual property dispute by actually using much of DEC's VMS code to compliment porting Microsoft Windows NT 3.5 unto Alpha, to much blessings and praise from Microsoft's high-end customers for its verry quick GUI performance complimentary to the excellent floating-point performance known of Alpha, and for this Microsoft was verry angered. NT version 4.0 had the VMS inclusions removed and that port was governed more-so by Microsoft. DEC was one of the first external porting groups to see Microsoft's code. Although WikiPedia says there is not a port of Microsoft Windows 2000 to the Alpha; that is a half-lie; it was not officialy released for Windows 2000 to be ported, and some of our friendly geek Microsoft employees leaked the Alpha platform version of Windows 2000 to the public. Even Microsoft knows that merit of its software existing on a high-end architecture improves its portfolio for contracts on super-computers.
Sincerily,
I am the nightmare of nightmares.
He was talking about one product line. How many cars use Bosch Motronic? That's PowerPC. How many Fords? That's PowerPC. How many Cisco devices? How many Macs? How many GameCubes (and coming up, Xbox2/PS3/Next gen. Nintendo), how many other devices? How many PowerPC-based printers? And, well, you can count a few satellites and planetary probes.
Sorry Out of Order execution has been done for ages before Intel implemented it. As usual different name, same concept. But the same ideas behind RISC, superscalar, out-of-order, pipelined, etc.. have been around (and implemented) since the 60's.
Not even in micros, as I believe Metaflow and other vendors had out-of-order CPUS out there way before Intel released the P6 microarchitecture.
NT on the Alpha was a crippled operating system. It was a 32-bit operating system with 64-bit hacks to allow it to run on the Alpha.
Mea navis aericumbens anguillis abundat
Well not totally dead. TI is still rockin the 68k's in their higher end graphing calculators, for one thing
It's still the CPU to teach machine language or assembler on, and I even know people who are still using old SUN or similar-vintage workstations based on the m68k. The MC6809E CPUs also make good washing machine controllers, alledgedly.
Not by your interpretations of events, and certainly not because Intel hired a bunch of Alpha engineers (that came much later). Unfortunately it's so old now that I can't find a reference to it in google, but you seem to be blissfully unaware of the law suit that DEC brought against Intel over the theft of Alpha IP that mysteriously found its way into the Pentium architecture. I was working for DEC at the time as a Tru64/Alpha support engineer, so I do.
Some time prior to that there had been a quiet attempt at collaberation between DEC and Intel over the Alpha chip. I believe it was in a vain attempt to try and get Intel to adopt the Alpha architecture for future designs. Whatever the purpose, Intel were given extensive Alpha design docs to look at. Eventually they turned down the offer and went their own way.
I remember eyebrows being raised inside DEC sometime after when the Pentium architecture started to make some very surprising, unexpected and unforecast performance leaps.
It took some time to gather the evidence, but eventually Bob Palmer launched a law suit against Intel for theft of Alpha IP. For a while DEC were threatening to halt all Pentium shipments and demand large unspecified damages. Bob P should have stuck to his guns and screwed Intel for all he could get, but instead (being the bean counter he was and not a technologist) he saw this as an opportunity to unburden DEC of the escalating costs of constantly refitting the FAB production plants. Work that was needed to meet the next chip shrink goals and keep Alpha ahead of the game.
In the end a deal was done. Intel brought all the Alpha fabrication and production plants off DEC, including StrongARM, and agreed to guarantee to produce Alphas for DEC for a number of years (I forget how many).
DEC still kept control of the Alpha design & development, and it wasn't until much later after the Compaq buy out, in one last act of Corporate infanticide from a cadre of incompetent senior managers that lntel finally got their hands on the full set of Alpha technologies.
But then that's what you get when Accountants run computer companies, not technologists and visionaries.
Make no mistake about it, if DEC management had believed in Alpha technology as much as the rest of the people in the company, and DEC had kept the FAB plants and invested in them as they had originally planned to do, and there had been no Comaq buy out, you would today be looking at SMT Alpha EV8 chips running somewhere around the speeds of todays Pentium chips
Macka
That's an odd take on history, unless by 'win' you actually mean: "all but one CISC architecture (Intel x86) eventually capitulated and either exited the field altogether (either adopting a new RISC architecture) or shifted to a niche (usually embedded) market."
A little history lesson for all you folks who either didn't exist or weren't paying attention in early days of the microcomputer revolution: Back in the late-seventies/early-eighties there were a fair number of competing architectures in both the mini- and microcomputer markets.
In the mini-computer world there were:
all of which were CISC designs (relatively few registers, memory-to-memory arithmetic operations, lots of addressing modes, etc.).
In the microcomputer world there were:
all of which were, like the mini-computers of the day on which they were modeled, also CISC variants.
Ever since the mid-seventies, various research groups (at universities and major corporations) had been toying with ways to make architecturally faster computers. (that is, computers whose arrangement of registers and instruction set were inherently fast, rather than just rely on faster transistors and shorter busses for speed increases) A number of these efforts stumbled upon the same set of concepts:
This was dubbed Reduced Instruction Set Computing, or RISC, as a contrast to the contemporary architectural practices, which the RISC camp lumped together under the term Complex Instruction Set Computing, or CISC.
The RISC approach payed off pretty quickly with processors that could easily execute one instruction every clock cycle (CISC architectures tended to take many clock cycles per instruction) and a few commercial products appeared in the mid-eighties from MIPS, Clipper, AMD and IBM. The main complaints against the RISC approach came down to one of
In the end, however, all three arguments proved false (memory capacities followed Moore's law into the stratosphere, most everyone moved to HLL compilers, and the genius level optimizing compilers either didn't materialize or benefitted the RISCs just as much as they did the CISCs).
One by one, all the big players either came around to the RISC way to seeing things:
Well the general idea for RISC according to Paterson came from having to program the microcode in the VAXen, so at some point they figured out that the translation overhead from the CISC instructions was unecesary. CISC came to be as a sort of "compresion" mechanism in which one instruciton could be fetched from memory and then it can be mapped into a sequence of micro-ops inside the CPU. Thus the intruction memory space and bandwidth requirements were substatial (afterall memory was a premium back then). People figured out that memory may get larger, so why not just fetch the microops themselves, so it was a trade off between memory footprint and decoding complexity.
:).
Of course early designs like the CDC 6600 were pretty RISC, although they didn't know it. And the CISC came out as a solution to the memory footprint problems that such architectures poised (in scaling down from supers to minis where cost was a priority).
However it is really eye opening to know the actual translation overhead, control related with the translator in the x86 family is significant. And almost half of the dynamic transistor budget (not SRAM) goes into the translation/scheduling portion not the functional. So the overhead is much more significan than...
And yes their approach is microprogramming, except that RISC-core is more buzzword compliant
Then came the Intel Pentium Pro. It took 3000 people to design. It was far more complicated than any previous microprocessor, or, for that matter, most mainframe CPUs. And it executed more than one instruction per clock, while dealing with all the horrors of the x86 instruction set. Many people had thought that impossible. Intel did it. Actually, several acres of engineers in tiny cubicles in Santa Clara did it. It was an amazing achievement that something designed by 3000 people actually worked well.
The Pentium Pro was expensive to make, because it was a multi-chip module. But as soon as it became possible to fit the cache and Pentium Pro CPU on one chip, Intel came out with that as the Pentium II, and later, the Pentium III. Those took over the industry, relegating the RISC parts to niche markets.
"The RISC guys had it right. So right in fact that even current x86 chips are RISC on the inside, and then waste close to half their transistor count on circutry that does nothing besides transform the x86 instruction set into something that isn't brainfucked. That Athlon-64 would cost half as much, draw half as much power, and generate half the heat if you ripped out the x86 emulation layer."
According to AMD and Intel comments, the translation circuitry is less than 5% of the total CPU. In fact, over half of the transistor count comes from L2 cache.
1) The Alpha is also little endian.
2) Complicated instruction decode can be removed from the critical circuit paths with pre-decoded caches. On one extreme, AMD uses predecode bits to mark where instructions begin in the i-cache. On the other extreme, Intel caches the fully decoded micro-ops in their trace-cache. When the variable length decode is out of the critical path, it can be made slower and therefore smaller.
I don't know where you get your "half" numbers from, but I can assure you that the x86 overhead is nowhere close to "half". There is MAYBE 5-10% overhead in power/area. Most of the non-cache transistors in modern x86 CPUs go towards the out-of-order control logic (re-order buffers, schedulers, highly-ported register files, memory ordering buffers etc...) which attempt to extract instruction level parallelism from the program. High performance CPUs need this logic whether they are RISC or not.
Another note -- Variable length instructions more efficiently encode your program so you don't need as big of an i-cache or as much bandwidth to the i-cache as a RISC processor. It's not all bad. Compile something on x86 and then cross compile it to some RISC processor and tell me how much bigger your binary is...
Instruction sets are not where performance comes from. Circuit technology and underlying microarchitecture are FAR bigger components to performance and how much power your chip burns.
The x86 pain in the ASS is more than just a die area for translation circuitry!
A) Legacy instructions, legacy exceptions legacy... Pain in the ass, self modifying code detection.
B) Strong memory model. Reduces freedom in reordering stuff, or simply increases amount of time.
C) Amount of programmer visible registers, and lack of triadic operations.
D1)
In P4 the trace cache holds quite little number of instructions, because they are MUCH bigger than RISC instructions, and there is more of them for equivalent code.
D2)
Athlon line has extra predecode bits in its Icache and 3 large decoders. That consume POWER!
E) Amount of parallerism available trough the ISA, is limited.
F) Cost of adding parallerism is a LOT bigger in X86 because of
Decoders or tracecache parallerism costs more. POWER, and latency/clockspeed.
All the myriadic exception models have to be compatible.
More memory renaming required and all pain in there.
FLAGS! Renaming, and all trickery making that work so that it won't hurt parellerism,
and accessed by most execution units!
G) Clock speed is hurt because of the issue. Remember than IBM and SUN ran 1/3 of clock speed of alpha all the time, because of their design methology, until alpha lost their fab. The clock speed is more function of design methology, but ISA adds more complexity on some structures, complexity increase the distance travelled so that hurts clock speed, but intel has superiour fabbing and design methology for doing full custom designs.
Now A, and D brings to a nice little point. LEAKAGE POWER which is growing component. Logic transistors leak 30 times the cache transistors. Besides even for inorder RISC:s CPU:s decode and fetch consume most of power so, that is where the X86 complexity hurts, most.
Now the scale of economics, is the reason why X86 is as fast as it is. When you do full custom circuit design there is no way a semiasic design methology will catch you in performance or performance/watt, if goals are same. If you wan't to compare RISC vs X86 go for similar design methology use VIA for X86 candidate, and G4+ for risc. Intel and AMD and Alpha are compareble, up until 0.35u EV6. Yes thats a 600mhz OO 4 inst/cycle risc design made in similar process as under 300mhz PII:s , and that trounced everything. Too bad it came late for Digital. After that there is no highperformance targetting RISC with full custom designmethology available. Power is highly limited by its design methology in terms of clockspeed and instruction latencies, and having different design methology would simply increase the fixed costs for IBM so much that the scale of economics is not there. And for embedded market they prefere ability to customize the processor for customers so design methology choise is obvious for them.
One small point, in power comsumption execution units are CHEAP, its fetch, reorder, and decode that costs power. Cache too is cheap in power comsumption based. So lots of cache and execution units is cheap in powercomsumption and the rest is where the power comsumption lies mostly. Exceptions, decode, fetch, and reorder. Now in ALL things in the list X86 ISA makes things more complex than equivalent RISC, and spends more transistors in there.
Emacs is good operating system, but it has one flaw: Its text editor could be better.
Uh, I don't really know if I'd call eighty-some-odd percent of the procesor market a "niche". PowerPC family processors power almost all of the worlds large embedded systems (cars, planes, networking equipment, industiral robots, etc.). Mips, StrongARM, and dragonball processors are a growth market in the pocketPC space, and lets not forget the 8 and 16 bit processors that run all the little electronic components in your life that you don't ever think about (thermostats, gas and water meters, microwaves, etc.). Don't forget: Just because its not sitting on your desk, doesn't make it not a computer.
Umm... there's a difference between 2nd source and clone.
.09u. .13u, and will be using IBM for .09u.
Zilog's Z80 was a CLONE of the 8080.
AMD WAS a second-sourcer until the Am486.
Harris was a second-sourcer until the 386, at which point they dropped out.
NexGen? I thought they made the Nx586 and Nx686 (released as the AMD K6), never any Intel chips under license. They were fabless, and used IBM.
Cyrix? Same here. I thought they designed their own chips. They were fabless, though, so EVERY Cyrix chip was made by a CYRIX second-sourcer.
IBM both designed their own chips (Blue Lightning) and was a Cyrix and NexGen second-sourcer, and is going to be a VIA second-sourcer at
TI and ST were Cyrix second-sourcers.
IDT designed their own chips (it could be argued that Centaur ran almost completely seperate from IDT, that Centaur was fabless, but was funded by and used the fabs of IDT, but it's a real stretch, as they WERE owned by IDT).
VIA (well, Centaur) designs their own chips, and is fabless. They use TMSC for
TMSC is a VIA second-sourcer.
NEC was an Intel second-sourcer and designed their own chips (the V20 and V30).
I think I got it all in there...