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IBM Claims World's Smallest SRAM Memory Cell
nokiator writes "IBM issued a press release today claiming that it has built an SRAM memory cell that is ten times smaller than those currently available.
My interpretation of the PRese in this release is that IBM will be able to build 256Mb or 512Mb SRAM chips or integrate 32MB or more SRAM into processor dies for cache applications in the future. Of course, showing some SRAM cell prototypes is a long ways from being able to manufacture this technology in a cost effective way.
There is no information in this PR about the speed or power consumption of SRAM blocks that can be built with this new cell technology. This is not likely to be a potential DRAM replacement for mainstream applications as DRAM already offers more than ten times density compared to SRAM at much better cost."
And people keep asking me why we don't buy servers from Dell. Maybe I'm old-fashioned in thinking that a company that continuously innovates the technology and not the distribution or marketing channel is whom I should get my technology from...
There's so many things wrong with this post...
a) the 64-bit CPUs that exist today have 32-bit instructions.
2) just because the width of the registers is 64-bit does not mean that all data that is processed is now 64-bit wide, 64-bit CPUs are certainly capable of processing 32-bit values.
D) somehow having a value stored as 64-bits doesn't mean you can use it for twice as many things as the same value stored as 32-bits (assuming it fits) or somehow all of your programs/algorithms can use the value twice as much as before (implying twice the work)
Of course, showing some SRAM cell prototypes is a long ways from being able to manufacture this technology in a cost effective way.
Well, were still talking about IBM here? Do you really think that a few hundred dollars more would even get noticed at clients that buy a server in the 100K range?
The main advantage of buying high-end gear from IBM, Cisco and the like isn't that you get cheap hardware ('cause you simply don't). You buy the gear from that company because you get 10 years in-house service including remote failure detection if you pay for it. That means, THEY call YOU before you even notice one of your tripple-redunant drives has problems. At this point in time, the technician is probably already on the way up to your office.
Sure, it's very expensive. But you save quite a lot by not having any significant downtime...
Seen in that context, 500 bucks more for RAM is IMHO just irrelevant to even think of...
Look, this thing is totally safe! Built it myself, you know. You just press that button like this and then turn that lev
As long as they can tell you how many zeroes they are holding, it's good enough for me ;).
What are you talking about? Static typing is a linking issue and has nothing to do with whether or not the memory cell requires an electric refresh.
The policy of the United States is worse than bad---it is insane. -- Ludwig von Mises, Economic Policy(1959)
Huh? What you say makes little sense. While it is true that smaller caches with less associativity respond faster, there is no "search through them more quickly" as it is all done in parallel. What makes it faster/slower is the depth of match logic required when you have many way set associativity (all the way up to fully associative which is the most expensive).
Secondly, why in the *world* would you not want to cache more data if you could? Ideally, all of your main memory would be just a large one-way set associative cache for best performance. (Compaq once made a 386 machine that had all SRAM as its main memory. No wait states at all and it was *fast* *fast* but it was also *expensive* *expensive* and upgrades for the memory were incredibly expensive.)
I'm thinking that this post must have been a failed attempt at humor.
I remmber back in the days of the release of the original Macintosh II, a lot of articles (In Byte, MacUser, etc.) about the new 68020 architecture stated that main memory in the Mac would eventually be transitioned to SRAM because of SRAM's speed and power-consumption advantages. Cheap and dense SRAM was coming, "real soon", so that extra wait states or caches would not have to be implemented when the 68020 was scaled past 25 MHz.
Then the original Mac Portable came out, with 1 MB of zero-wait-state SRAM as main memory. It cost $7300 with a 40 MB hard disk, and pretty much sucked in every imaginable way.
And, to add just a little to the parent, more cache is one of the best ways to improve your performance.
If you're working on a 2 Meg file and you only have a 256K cache, then your CPU has to work on a little bit of it, then swap the cache to main memory to work on some more, then again, then again. Each of those swaps takes time, and main memory is way slower than cache. So if you can store most of your work in cache and save the trips to memory, your get much faster speed.
So a webserver with a 2 GHz processor and 8 MB of cache is likely to outperform a 3 GHz processor with 512 KB of cache. Bottom line: bigger, smaller cache is a very good thing.
If you can store and read an unlimited number of zeros, then couldn't you encode your information in the number of stored zeros?
There are no trails. There are no trees out here.
Well, you've basically got it.
The only other thing to think about is the yield of the wafer (ie. how many good dies you get from each wafer).
Some circuits are harder to build or more prone to failures in the manufacturing process - ADCs, DACs and high-speed opamps come to mind. Some of the flaws are inherent in the way the wafer was grown.