IBM Claims World's Smallest SRAM Memory Cell

nokiator writes "IBM issued a press release today claiming that it has built an SRAM memory cell that is ten times smaller than those currently available. My interpretation of the PRese in this release is that IBM will be able to build 256Mb or 512Mb SRAM chips or integrate 32MB or more SRAM into processor dies for cache applications in the future. Of course, showing some SRAM cell prototypes is a long ways from being able to manufacture this technology in a cost effective way. There is no information in this PR about the speed or power consumption of SRAM blocks that can be built with this new cell technology. This is not likely to be a potential DRAM replacement for mainstream applications as DRAM already offers more than ten times density compared to SRAM at much better cost."

Comments

Density vs Speed

[fembots]

This is not likely to be a potential DRAM replacement for mainstream applications as DRAM already offers more than ten times density compared to SRAM at much better cost."

I thought the PR implied "Although not as dense, SRAM is many times faster than dynamic random access memory (DRAM).", density is like a also-run.

Re:512MB cache?

[hotchai]

That is not true at all. The size of instructions is still 32-bits for all 64-bit RISC CPUs and the instruction size is the same in x86-64 as that of regular x86 (CISC). Now 64-bit CPUs give you the *option* to use 64-bit data/pointers, but you are free to continue using 32/16/8 bit data as you deem appropriate. Code/data size doesn't automatically increase.

Also, you may not necessarily be doing twice the work with a 64-bit CPU - it again depends on your compiler. In theory you *can* do two 32-bit operations in parallel using a 64-bit EX/FP unit if the ISA provides for packed operations (also known as SIMD instructions).

This is *not* true!

[Anonymous Coward]

Intel released a press release four years ago claiming to have built SRAM memory cells which (to my calculation) work out about three times as small as IBM's. IBM are clearly claiming to have invented the smallest commercially viable memory cells, but not the smallest outside of that context. Maybe /. should try to keep up a bit more.

The Real Cost of Dram

[Nom du Keyboard]

DRAM already offers more than ten times density compared to SRAM at much better cost.

Excuse me, but isn't the cost of any feature directly related to its size, making the above statement self-redundant?

I mean, a wafer-start is a fixed cost, divided by the number of processors it yields. That makes the area of the processor die directly relate to its cost, and the size of any feature relates to its subcost portion of the overall processor cost.

Or in simple terms: Smaller features should always cost less because you get more of them per fixed cost wafer.

Am I missing something major here?

Re:SRAM has plusses and minuses.

[Anonymous Coward]

As does write-only memory.

http://www.ganssle.com/misc/wom1.jpg
http://www .ganssle.com/misc/wom2.jpg