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Intel Roadmap Update: The Art of Naming Processors
THG writes "CoolTechZone.com has compiled a list of Intel processors from its roadmaps, and discusses Intel's naming convention. According to the article, 'Gone are the days when processor names were something as simple as their clock speeds. If you wanted a nice and powerful 3GHz processor, you simply asked for a P4 3.0GHz and that was it. Ever since Intel has decided to revamp its naming conventions, the confusion makes you wonder if the whole idea of renaming was a smart move. Moving on with Intel and it's desktop endeavors, the problem is that if the names were as simple as stated above, we would've somehow managed to figure them all out. But someone at Intel obviously wanted to ensure that we don't remember processor names without having a 100-page manual on product families, so there are modifications to each series, which may or may not be consistent across different series.'"
Moving on with Intel and it's desktop endeavors...
It's means "it is". You meant to write its. With the exception of one's, possessive pronouns in English do not have apostrophes. Please return to third grade without passing Go.
Trademark issues drove Intel to make up processor names -- Intel couldn't stop competitors from selling non-Intel 80486 chips because chip numbering was a generic identification scheme in the electronics industry.
Two wrongs don't make a right, but three lefts do.
All in all: CPU speed doesn't matter... especially not when talking Intel ;-)
Ahhh...the great dumpster continuum. Many a free computer will be found there. -- sowth (748135)
And of course AMD has been doing something similar for ages (although their scheme is somewhat simpler). For example, an Athlon64 3000+ doesn't run at 3GHz - it only runs at 1.8GHz.
The Raven
It's worth mentioning (for the uninitiated) that the parent is refering to areas in and around Portland, OR. Intel's main campus is in one of the Portland suburbs. Some of the names they've used so far (off the top of my head):
:)
Willamette - A river in Oregon. Runs north-south through Portland.
Prescott - A city in Oregon. Also a major street in North and North East Portland.
Madison - A street in Portland... not sure it it's much else...
Tualatin - A sothern suburb of Portland. Also a street in Portland.
McKinley - A city in Oregon.
Tillamook is a town in western Oregon known for it's cheese factory. ALSO a street in Portland
Jeremy Logan's Website.
This article is old (at least a year?), and not too newsworthy, primarily because :
THERE IS NO EASY ANSWER, because as a G5 PowerPC demonstrates... Mhz is near meaningless for computation estimation!
Intel knew of this over a year back when they approached 4Ghz with nothing to show for itself.. so that is why the naming is as it is nowadays
That depends on their code. Numerical simulations are mostly floating point that's often quite vectorizable. In that case, they could be using SSE2 quite a bit, which generally works better on the Intel chips -- but they probably won't get much benefit from this unless they're hand-optimizing at least a few of their inner loops. Most compilers can do some automatic vectorization, but they don't make good enough use of the capability to overcome the Intel chip's shortcomings elsewhere, as a rule.
OTOH, if they're doing a lot of vector math, they'd probably get considerably better performance still by writing the code to execute on the GPU instead. The obvious shortcoming of that would be accuracy problems -- the GPU's floating point is engineered far more to maximize speed than accuracy.
--
The universe is a figment of its own imagination.
The universe is a figment of its own imagination.
I disagree. The Athlon design [overall] has been fairly consistent. It's implementation has varied greatly since the first 500Mhz Slot A Athlons were introduced.
What is the Athlon? It's a 3-pipe ALU/AGU with the multiplier on pipe 0, 64KB of L1 Code, 64KB of L1 Data and a L2 cache, 3 pipes for FPU [add,mult,load/store]. Engine has directpath/vectorpath instruction sets where the cores use macro-rom for vector ops. They can decode upto three opcodes at once to feed down one of the 9 pipes. The engine is out of order and it can speculatively execute instructions [as well as register rename].
This hasn't changed. EVEN IN THE NEWER AMD64 CORES!!!
What has changed
1. Size of the L2 cache [implementation detail]
2. Length of the ALU and FPU pipelines [longer in later cores]
3. Instructions [Added SSE, SSE2 then SSE3, x86_64]
4. Introduction of DDR controller on board [implementation detail]
5. Newer transistors, process and package [implementation detail]
Athlon is much as a "cpu design" as it is a brand name. Just like the K6 describes a particular core [so does P6 on the intel side].
Tom
Someday, I'll have a real sig.
Other Intel chips and chipset names can give you an indication of where they were developed. Most parts are designed in Oregon. But, for example, most of Intel's low power parts have names of Israeli geographical features (Banias, Dothan, Merom, Gilo, Jonah, Dimona), and this probably means they were developed at Intel Israel. Expect to see some Indian rivers show up on the list as soon as that development site is up to speed. See the huge list of code names for a geography lesson of the Pacific Northwest.