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Reduce Transistor Power Consumption
revelCyllufyalP writes to tell us that University of Kentucky researchers have discovered a way to reduce the overall power consumption of transistors. From the article: "In order to improve computer chips' performance, transistors' size and gate insulators have to be continuously shrunken so that more components can be packed into a single chip. Computer chip producers were hitting a wall in downscaling the transistors and gate insulators because of their inability to reduce the leakage current of the existing gate insulators. This new technique will help the chip producers to develop more powerful chips with low-power consumption."
What this really means is that the next generation has just become possible. As an incidental side benefit, current-generation laptops will be able to run cooler.
The unfortunate corrolary to:is:
Which is why the P4 prescott, while a marvel on the drawing board, is pretty crappy in reality. 90nm technology has largely been an attempt to find a happy medium between higher capacitance and lower resistance, both of which limit speed. The current "nucular age" of chips is a direct by-product of ignoring the drop in resistance until it was too late.
Also, at 4+ Ghz an current-induced EM field has many of the properties of a microwave beam, which can resonate, and essentially self-focus on any imperfections in the semi-conductor structure, essentially burning small holes in the chip, or causing signal noise unless perfectly grounded (which in itself causes inductive leakage). This is why intel and amd have speed-bins, because the chips with the fewest imperfections are able to perform at the highest clockspeeds without thermal or electric failure.
My point is, the mega-hurts race, even assuming one or more miracles of metal-oxide chemistry, is ending. I look forward to the multi-proccessing race which seems to be heating up, as a long-postponed, but neccessary next step. The sad obstacle holding back the day of 1000-thread chips has been programmers complete lack of willingness to move beyond the single-threaded debugging paradigm. As one myself, I understand why it's seen as hard as it is, but consider it more of a viewpoint shift, rather than an insurmountable increase in complexity. New languages/language changes will happen to simplify threaded programming, and new mechanisms like auto-synchronized data structures, self-unrolling iterands, and integrated message-passing stacks will replace old-standbys. The mega-threading doomsday scenario will fall along the wayside with other past programmer nightmares such as the death of the goto loop and the loss of direct memory access in java and higher level languages, left only as subjects of nostalgia.
Clockspeed is dead, long-live multi-threading.
The first rule of USENET is you do not talk about USENET.
C# _is_ a bit more high-level than C, or for that matter, assembly, which is the language they should be learning.
The system had the verbosity of HTML combined with all the readability of compiled assembly viewed as bitmap images
Assuming they really have discovered a way to lower power consumption (forgive me for not understanding semi-conductor principles) would it not be applicable to other semiconductors? I immediately thought about cell phone/mp3 player battery life and other such things. Even so far as to think about laptops. I (roughly) understand the not-so-much-wasted-power train of thought, and heat reduction from a CPU core and all, but wouldn't this have just as much effect on battery-powered devices? Or am I just being an ass again?
considering the fact that static (leakage) power should be
the real killer in microprocessors is the dynamic power - for wireless/dsp/ucontroller type applications, it could be pretty huge
honestly, the article has so few details it's impossible to tell what they're really doing, but i am pretty sure that most companies out there already use RTP on there gate oxide...