Intel's 3D Transistors One Step Closer to Reality

An anonymous reader writes "Reducing power consumption is the name of the game in today's semiconductors and Intel today described its tri-gate transistor technology as one of the key technologies that could free the company from the trap of thinner gate insulators and increasing current leakage. Tri-gate (three gates instead of only one) could reduce the power consumption of transistors by 35% right now and drops off-voltage - one of the main sources of current leakage - by 50%. These results are the good news. The bad news is that tri-gate won't be available until 2009."

Comments

Not fully 3D

[Umbral Blot]

As I am reading it this really isn't a 3D technology at all, it's more like three normal planes of circuitry stacked on top of each other. Of course I know why they haven't been working on a truly "3D" implementation: even though it would cut down the distance on average between any two gates moving heat away from the inside of the structure would be exceedingly difficult, while on a 2D chip getting rid of heat from anywhere is relatively easy (large surface area / volume).

Re:Not fully 3D

[LiquidCoooled]

Hey, when your reaching the maximum density, you know what you gotta do don't you?

You get Perpendicular :)

I instantly thought of this when thinking about the Intel thing.

three gates? or just one big one?

[smellsofbikes]

First off, these are field effect transistors, which they don't specifically mention (although they do use the correct terminology for FET's.)

Secondly, it's not really that they have three gates. It's that they have a block of silicon that can conduct from source to drain, and a gate in the middle of it that can deplete/enrich the adjacent silicon to change its conductivity. Where most FETs have the gate on one surface, or 1/4 of the conduction channel's surface area, this one has a gate that stretches around 3/4 of the channel's surface area. Instead of gating like stepping on a hose, this gates like clamping the hose with pliers (for analogy = depletion-mode). Pretty cool, but that should come with a 3x increase in the gate's capacitance, shouldn't it? and fighting capacitance is one of the major struggles of increased speed, right? People doing very low-power stuff should love this. People doing high-speed design, maybe not so much.

Re:three gates? or just one big one?

[Anonymous Coward]

You're implicitly assuming that these transistors will be on the same scale as current transistors. In reality, these will come in at the 30-40nm technology node, which means the transistor lengths and widths will already be 1/3 the size they currently are (presumably). Hence, the oxide capacitance shouldn't be more than it is today. If building a conventional MOSFET at 30-40nm results in massive leakage and whatnot, there may not be a choice, anyway (well, until someone comes up with another design).

Re:three gates? or just one big one?

[tool462]

Interconnect capacitance generally dominates gate capacitance. And since this type of gate will improve the signal to noise ratio, the device doesn't need to be as large, which would mitigate the increased gate cap.

Re:...and they're already obsolete.

[Aadain2001]

You know, I used to get excited by cool new techs like that. Then I talked to someone who works closely with the process design engineers at Intel and other people who actually produce silicon based chips in mass. While those new discovers are very interesting, they usually don't lend themselves to mass production easily, if at all. Some of those new processes take huge, expensive machines and techniques and even then only produce a couple of workable prototypes. It is pure research at it's best. The issue is adapting that to producing millions of these on thousands of wafers every day with a high level of success (90%+ if not higher).

When a semiconducter producer like Intel announces stuff like in the article, it usually means they have a process that will work in mass production and can be available soon. Same goes for announcements from companies like IBM and AMD. So while they may be "obsolete" compared to what the cutting edge researchers are doing, they are definatly cutting edge for what can actually be used to make products actual people will use.