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Intel - Market Doesn't Need Eight Cores

PeterK writes "TG Daily has posted an interesting interview with Intel's top mobility executive David Perlmutter. While he sideswipes AMD very carefully ('I am not underestimating the competition, but..'), he shares some details about the successor of Core, which goes by the name 'Nehalem.' Especially interesting are his remarks about power consumption, which he believes will 'dramatically' decrease in the next years as well as the number of cores in processors: Two are enough for now, four will be mainstream in three years and eight is something the desktop market does not need." From the article: "Core scales and it will be scaling to the level we expect it to. That also applies to the upcoming generations - they all will come with the right scaling factors. But, of course, I would be lying if I said that it scales from here to eternity. In general, I believe that we will be able to do very well against what AMD will be able to do. I want everybody to go from a frequency world to a number-of-cores-world. But especially in the client space, we have to be very careful with overloading the market with a number of cores and see what is useful."

42 of 548 comments (clear)

  1. We've heard that before. by GundamFan · · Score: 5, Insightful

    I don't doubt an "8 core" desktop will exist in the near future. Then again he has a point... we won't likely need it.

    --
    I don't give a damn for a man that can only spell a word one way.
    Mark Twain
    1. Re:We've heard that before. by kfg · · Score: 5, Funny

      I don't "need" an R sticker and turbo sound synthesizer either, but they sure make my FIAT 500 go faster.

      The Little Mouse that Roars!

      KFG

    2. Re:We've heard that before. by tomstdenis · · Score: 4, Insightful

      If you're basing that on some logical sense of "need" I may remind you the average consumer doesn't need a quarter the computer they already have.

      Tom

      --
      Someday, I'll have a real sig.
    3. Re:We've heard that before. by mrxak · · Score: 5, Interesting

      I frequently run as many as 8 programs at a time, sometimes more, but I seriously doubt each program would know what to do with its own core. With my two-CPU set-up, I find RAM to be almost the biggest limiting factor (although with 2GB, I've never actually run out). There's really no need for 8 cores until my brain is able to take multitasking to the next level, doing many many complex tasks that would gain benefit from (essentially) unlimited CPU power for each program.

      They say the biggest bottleneck of any modern computer is its user...

    4. Re:We've heard that before. by rbgaynor · · Score: 5, Funny

      eight is something the desktop market does not need

      So is he the only person on the planet who has not tried the Vista beta?

      --
      "Good things don't end with eum, they end with mania or teria." - H. Simpson
    5. Re:We've heard that before. by Mayhem178 · · Score: 5, Funny

      And that will almost let you run Oblivion at max settings.

      --

      "You will pay for your lack of vision..." - Emperor Palpatine to Ray Charles

    6. Re:We've heard that before. by hackstraw · · Score: 4, Insightful

      I don't doubt an "8 core" desktop will exist in the near future. Then again he has a point... we won't likely need it.

      My crystal ball is not always crystal clear, but I believe that 8+ cores will exist and are needed in the near future, at least for desktop systems.

      History here. I'm an HPC admin which translates into I run beowulf stuff where pretty much OTS computers are connected together to work as one big computer. I'm also a desktop computer user who is anal retentive about having realtime info regarding the status of my computer with respect to CPU utilization and whatnot.

      Now, in the many years of running desktop systems and being anal retentively monitoring them, I've noticed that CPU utilization is very often bursty. Meaning that its common for the CPU to hover around zero, and spike up with doing something like rendering a webpage, printing, compiling code, etc, etc. But most of the time (> 90% or well more if including when I sleep and stuff), the CPU is doing nothing.

      So, what is my point? Give me cores out the wazoo, and let them completely power down when not needed and crank up to all 8 or more when needed. This will greatly improve power requirements and improve performance at the same time. Evidence of similar stuff in either nature or in other technologies are plentiful. 1) Hybrid gas/electric cars. They use both for higher performance when needed, and then back off and oscillate between the two when its optimal for efficiency. 2) Animal tissue like muscles and nerves. Muscles are pretty much idle most of the time, and only use a few fibers when doing a light contraction, but all of the available fibers become active when exerting maximum effort. Similar, but different with nervous systems. 3) Human workloads. There are certain industries that are not really a constant, and even the seemingly constant ones also have bursts as well, but lets think of things like seasonal things like retail, taxes, or things like seasonal vacation spots. These kinds of jobs bring in more human bodies to handle the peak loads, and let them go when the peaks are over. Its nuts that in many places in the US, seasonal vacation spots are frequently employed by people from half way across the world!

      Now, is my 8+ core pipe dream going to happen tomorrow? No. But I believe this is where computing is going. Another thing that will have to change is that RAM should not be as random. In other words, memory, like CPU cores, should go dormant when not needed in order to conserve power as well, and of course there is the memory bandwidth issue as well.

    7. Re:We've heard that before. by avronius · · Score: 4, Interesting

      See, here's where I have to disagree.

      Imagine an RPG that has multiples (100's) of 'computer' competitors that are "developing" along the same lines as you and your character(s). Or perhaps an MMORPG with thousands of players, competing against 100's of thousands of virtual characters that are developing along the same lines as your and the mmorpg's characters. Say goodbye to random encounters with stale NPC's - and hello to enemies with unique names and playing styles - all due to the computer's ability to handle such incredible virtualization.

      Adding more RAM and a minor increase in speed wouldn't help in either of these scenarios. Bring on the cores, man, and don't stop at 8...

    8. Re:We've heard that before. by fmoliveira · · Score: 3, Insightful

      You can distribute different pages for printing, different frames pro html rendering, or divs or something. Your browser could be decompressing pngs and jpegs in other cpus while one parse the html too.

      Web browsing is still limited by the network anyway, increase cpu to browse the web doesn't make any sense for me. At least with my 400kbps DSL

      But I at least would not want to increase cpu power for these trivial tasks. I would prefer that it happens when I do something heavier, like a game, or at least something that takes more than 1sec.

    9. Re:We've heard that before. by guaigean · · Score: 5, Insightful

      The home consumer market isn't exactly the goal for technology like this intiially, and the price won't be inline with home consumers anyhow. This is the kind of stuff used in High Performance Computing, as a single computing node can maintain large amount of CPU performance with no transfer between nodes. 2GB is nothing in the HPC world, and 8 cores get filled up fast. While it may be easy to assume "I can't fill 1 CPU, what would I do with 8"? you have to remember that there are people out there running huge simulations, which could very easily use up many thousands of CPU's.

      Utility is in the eye of the user.

      --
      Microsoft Sucks, F/OSS Rocks. I get mod points now right?
    10. Re:We've heard that before. by samkass · · Score: 5, Insightful

      Isn't this the same thing they said about 64bit chips?

      Good point... yes, Intel said this about 64bit chips, and they were right. Almost nobody needs 64bit chips. But now virtually all chips are 64bits, wasting a lot of die real estate and engineering effort because of the perceived benefits driven more by AMD's marketing than reality. It's quite possible 8 cores could end up in the same boat-- AMD pushing it for no valid technological reason and Intel being forced to follow suit.

      --
      E pluribus unum
    11. Re:We've heard that before. by synx · · Score: 5, Interesting

      Interestingly enough as you recompile for 64 bits, you also need more memory as you get more memory. Now your memory alignment is now 8 bytes not 4 bytes, and your pointers are much later.

      I'd like to take a moment to rail against most commonly accepted forms of parallel education. I'm sure you were taught about threads, critical sections, semaphores, shared memory, etc.

      These are all inherently dangerous and difficult to program concepts. Write some application that is flexible and can run with N threads - usually this is hard, the best solution from Java-land is the concurrency toolkit which defines units of work which can be parallelized by a thread pool.

      However, there _is_ another way. "CSP" - communicating sequential programs. This is a method of writing naturally parallel systems that do not have the disadvantages of all of the above. (Standard concurrency debugging suggestion in java: "make the method synchronized") A practical example of this is the programming language Erlang. Ericsson invented this language to write high performance telco gear. Their ATM switch line is written in it. In Erlang you have many many 'processes' (not traditional OS processes, but defined in the VM) which cannot share memory - the only way they can communicate is via async messages. You can build a synchronous call on top of async messages pretty trivially (after all, all syncronous network protocols are based on IP which is asynchronous). You never have to worry about memory stomps, or critical sections. You _do_ have to design your applications differently, but it is most definitely worth it.

      Another interesting thing about this is your applications naturally parallelize. The "R11" release was just put out, which included SMP support. The previous versions would only use 1 CPU, but this version will use all your CPUs, which means if you have multiple processes ready to run, they'll run on as many CPUs you have! Instant SMP support, no redesign, no RECOMPILE necessary.

      This kind of language technology is what is necessary to get us to the next level. A similar thing is possible with Functional languages such as OCaml, Haskell, etc.

      I've been working in the industry for 5 years and I'm currently working on a Erlang project. My company was fairly conservative in terms of languages, there was a standing order (until about 2000) "no C++".

    12. Re:We've heard that before. by 2nd+Post! · · Score: 3, Interesting

      Uh, all your examples are only serial in implementation, not serial in nature.

      A webpage, for example, need not be parsed serial, though the performance of current systems is high enough that you get nothing in attempting to parallelize the renderer. A printer, however, can trivially be designed to be parallel, especially if you have unusually high DPI. Think of a printer rendering to a paper in the same way that a graphics card renders to a framebuffer. If you can use multiple pipelines, GPUs, and cards to accelerate video display, why wouldn't the same be possible for printing? The neat thing about printers and printed data is that there is no dependence, the image in the upper right exists independent of the image on the lower right, and etc etc. In theory you could have a core assigned to every PIXEL printed on a page, and a corresponding printhead with a printhead for each core, and you would be able to print an entire page in a cingle CPU cycle. Technically.

      So there are plenty of other things that could be executed on multiple cores:

      Decoding video (playback)
      Encoding video (storage, rendering, chat)
      AI for games (imagine simulating a multitasking AI on multiple cores)
      Physics for games (uncoupled events can be processed independently and coupled events require access to the same data)

      Yes, everything has a serial bottleneck, such as data access, but once properly set up most things can also be set up to be multicore as well. Saving a file, for example, can be multicore if you imagine the write as happening all at once, rather than serially, with each core assigned to a write head, each write head then operating independently... Etc.

    13. Re:We've heard that before. by steveo777 · · Score: 3, Funny

      I, for one, plan on living forever... so far, so good.

      --
      This sig isn't original enough, it's time to come up with something witty...
    14. Re:We've heard that before. by IamTheRealMike · · Score: 3, Insightful

      Almost no desktop programs actually use 4 gigabytes of RAM. Not even allowing for rapid expansion will we reach that bottleneck anytime soon.

      The Intel guys were right. What are the uses of 64 bit systems? They are removing a bottleneck that very few were hitting. The AMD64 instruction set fixes (more registers etc) are nice but not worth the hassle of losing binary compatibility. Result? Hardly anybody uses a pure64 system. Only enthusiasts.

    15. Re:We've heard that before. by vadim_t · · Score: 4, Interesting

      Actually, I've been discussing this with a friend recently.

      Take NWN for instance. How about making a game where things are REALLY happening? So far most worlds are extremely static. MMORPGs are static in that nothing ever changes, you kill the Lord of Evil and he's back on his dark throne 5 minutes later. And in most RPGs things just stay there and wait for you to appear (say, you never miss a battle in progress, as they just stay there until you appear nearby so that you can conveniently join the battle).

      For example, in NWN it's very clear that there are multiple factions living in the area. How about having kobolds, knolls, wolves, etc move around on their own, gather food, kill each other, reproduce, try to invade, etc? Wouldn't it be neat if you could defeat the gnolls, then wander off for whatever reason, and when you return find the kobolds now took over the gnoll cave, increased their population, and Tymofarrar got out of the cave and set fire to the town?

      Of course, make it too realistic and it gets a bit weird... imagine having to kill kobold children and walking on gnolls having sex.

    16. Re:We've heard that before. by JamesTRexx · · Score: 3, Insightful

      Although I also have plenty of programs running, I could really use them for all the virtual machines I have running. Having each one run on its own cpu would speed things up considerably.

      --
      home
    17. Re:We've heard that before. by 2nd+Post! · · Score: 3, Interesting

      The problem we are running into is that webpages were designed to be parsed serially; if they were designed to be parsed in parallel, then they would be woefully inefficient being parsed serially, which until now has been the norm. The same with your printer example.

      So imagine a situation where a webpage was DESIGNED to be parsed in parallel. The page hierarchy would be formatted into independent chunks that could be assigned to different threads and cores without first preparsing it. It would be like having an index built into the webpage such that different elements on the page could automatically, without additional effort, be spun off to different cores. A navigation bar, a banner, the main content, a link-box, and a footer, for example, could all be defined in a webpage such that as soon as the render saw that there exists five elements on the page each element is spun off to a different core to be handled.

      The same with a printer; if the printing language were designed up front to be parallel, rather than serial, you could see speedups in rendering, though such gains is probably negligible. An image, such as an embedded jpeg in a document, would be split into four, for four cores, and then rendered into the appropriate printing language, which might come in handy when 10 megapixel pictures become common. Imagine a printer with four print heads, now. You could conceivably send four streams of data at once, which again could be fed by four cores (or a single core of course, if it pre-computed the data needed to be sent to the printer).

      Decoding video: Uh, take a look at HD... that's pretty hardcore :) No imagine decoding on the fly HD video chat; unlike HD DVD, on the fly encoded video will not have the best encoding/compression/compute values, but rather an average one. No imagine multi-chat, in which four people are talking, and four HD video streams are being decoded at once.

      Encoding video: Imagine now encoding an HD video chat on the fly :) My parents, for example, talking to their grand-daughter in HD, is clearly superior to seeing a 640x480 image, which is again clearly superior to 320x240. Multiple cores would allow for a much nicer, cleaner, 30fps 1024x768 video stream, especially if background tasks are occurring.

      AI: I think you misunderstand. One AI enemy which formulates, simultaneously, five DIFFERENT responses from the same data structures... in other words, an AI of split mind. In the same way I can imagine writing four different responses to you, but only acting on one of them, an AI with multiple responses, but only a single action, becomes much richer, more unpredictable, and unbelievably more complex.

      Physics: Physics is really a generic superset of graphics. Graphics is merely how light interacts with the data structures. Throw in gravity, sound, friction, and mass, and you have physics. The same reason why graphics can use multiple cores, then physics can too. Imagine if the 3d sound effects were split among two CPUs, just like frames are? Sound can be trivially represented as frames, much like graphics. Imagine the same with gravity being calculated by two CPUs every other frame, or friction, etc. You can calculate, for example, the spray pattern of a shotgun in time; the trajectory is known, the number of pellets are known, and the environment is known. Right now we approximate the intersection of a shotgun blast with the intersection of a player or a structure, but with additional compute resources you can actually trace each pellet individually!

      The same with falling rocks, a flooding room, etc.

      Most problems ARE parallelizable, I think, the only real question is approaching the problem from the onset with multiple cores in mind.

    18. Re:We've heard that before. by GaryOlson · · Score: 3, Insightful
      ...only enthusiasts ?!

      Obviously, you have never tried to simualate or graph propagation of an organic virus with a 4 million node set using Matlab x64 on a desktop system.

      We would be pleased to take your enthusiast money and 128 of your gaming buddies' money and build a Linux computational cluster to solve a problem that will likely save your life or the life of someone you know.

      --
      Every mans' island needs an ocean; choose your ocean carefully.
  2. The desktop market is the largest market. by khasim · · Score: 4, Insightful

    If you put 8 core procs in desktop machines, software will be written that will take advantage of them. Which means you'll sell more 8 core procs.

    Are you going to lead or follow?

  3. Translation by lisaparratt · · Score: 4, Insightful

    "Our multiprocessor technology doesn't scale, but we don't want to scare investors away, so we'll pretend it doesn't matter."

  4. Question. by Max_Abernethy · · Score: 3, Insightful

    Does having multiple cores do anything about the memory bottleneck? Does this make the machine balance better or worse?

    1. Re:Question. by Aadain2001 · · Score: 5, Informative
      It depends on which memory bottleneck you are talking about. There is a memory hierarchy in computers, with the fastest also being the closest to the processor, the level 1 or L1 cache (usually split into separate data and instruction caches). This is then tied into a much larger, but slower, L2 cache (combined instruction and data lines). Some processors use an L3 cache, but not many these days. Current processors have L1 and L2 directly on the chip. If you see those die pictures they show off to the press, the largest areas of the chip are the caches. Finally, the chip can go across the front side bus and access the main system memory, which is very large compared to the L2 and L1 caches, but much slower in terms of number of cycles to access.

      So which bottleneck are you refering to? The new Core 2 Duo chips of Intel's share the L2 cache and, as far as I can tell from the reviews I have read, this setup works very well. Both chips can share data very quickly or when executing a single sequential program one of the cores can use all of the L2 cache (which in the Extreme Edition verion is up to 4MB!). Or are you refering to the main memory? It is possible for both cores to need to access the main memory at the same time, but modern pre-fetching and aggress speculation techniques reduce how often that occurs and the timing penalties when they do occur. And of course, the larger the L2 cache the more memory can be stored on the chip at once, reducing the need to access the main memory very often. According to Intel's own internal testing, they had a very hard time using all of the bandwidth the current front side bus and memory offers, which means the main memory shouldn't be a bottleneck.

      So what is the bottleneck you are refering to?

      --
      Space for rent, inquire within
    2. Re:Question. by NovaX · · Score: 3, Insightful

      Worse.

      For Intel, they are currently using a shared bus approach. It makes sense for a lot of reasons (mainly by being very cost effective), and they are developing a point-to-point bus for the near future. In such a system, each CPU is using the bus for retrieve data. This means that they lock the bus, make their calls, finish, and unlock. The total bandwidth available is split between all parties, so if there are multiple active members (e.g. CPUs) then their effective bandwidth is split N ways. The only solution to this is to have multiple shared busses, which is expensive.

      A point-to-point bus gives each member their own bus to memory. Thus, there is NxBW effective bandwidth available. As memory cells are independant, the memory system can feed multiple calls. You'll only run into issues if multiple CPUs are accessing the same memory, but models have been around for a long time. There might be a slightly higher latency, but not by much.

      With multiple cores, you may get the benefit of shared caches which could remove a memory hit.

      Overall, I would assume a multi-core system would scale fairly similarly to a multi-processor system.

      --

      "Open Source?" - Press any key to continue
    3. Re:Question. by NovaX · · Score: 3, Insightful

      One thing to remember, Sun has a lot more expertise on memory busses than Intel does. The UltraSparc chips have never been great performers, but are wonderful at scaling in multiprocessor systems. Intel has never put too much effort in their bus system, because the economics favor cheaper solutions. Their shared bus approach reduces costs for a mass market, but they even use it for ultra high-end systems like Itanium. Those systems really need a better system bus, but simply used a tweaked version of the standard Xeon one. I believe Intel is targetting 2007 for the release of their new bus architecture.

      --

      "Open Source?" - Press any key to continue
  5. well, by joe+155 · · Score: 3, Insightful

    I don't want to insult the person but saying that 8 is something that will not be needed seems very short sighted. People were saying only a few years ago "1GB is too big for a hard-drive"... Never under estimate the increasing need for power in computers, even for home users

    --
    *''I can't believe it's not a hyperlink.''
    1. Re:well, by man_of_mr_e · · Score: 5, Insightful

      I think he was talking about the foreseeable future.

      1 core is really enough for most users. 2 cores is enough for most power users. 4 cores will be enough for all but the most demanding jobs. Workstations are different, however and are not usually considered part of the "desktop". For example, I could see 3D artists using 4 or 8 cores easily. In fact, there's simply no such thing as a computer that's "too fast" for certain purposes.

      The issue, though, is one of moderation. Why would a desktop user want 8 cores, which are drawing insane amounts of power, when they're not even utilizing 4 to full advantage? Word processing, accounting, and surfing the web don't need any of this. Games? I can imagine in 10+ years we'll have some photo-realistic 3D games that run in real-time, but the vast majority of the work will likely be handled by GPU's and won't need 8 cores to deal with it.

      I simply cannot fathom a purpose for 8 cores for any "desktop" application that isn't in the "workstation" class.

    2. Re:well, by koreth · · Score: 4, Insightful
      effectively using 8 cores usually requires talented programmers who have mastered multithreaded programming.

      But ineffectively using 8 cores can be done by any dumbass with a C# compiler or a book on the pthreads library. Which is why we actually will need 8 cores.

  6. Silly Perlmutter by ackthpt · · Score: 5, Funny

    If the home user can justify (even indirectly due to demands of the operating system or changes in software architecture) 4 cores then 8 is immenently logical. Seems some minds at Intel are falling back to the dubious position they held regarding home users never needing 64 bit CPUs. Then again, maybe they're just playing dumb and are slaving away, burning midnight oil by the drum, to make 8 and 16 core processors.

    Three Cores for the Clippy, but I don't know why,
    Seven for the Vista kernel which is defect prone,
    Nine for for Bloat which will make the cooling fry,
    One for the Screensaver to toil alone,
    In the Land of Redmond where Marketing lies.
    One Core to rule them all, One Core to find them,
    One Core to bring them all and in the darkness bind them
    In the Land of Redmond where Marketing lies.

    --

    A feeling of having made the same mistake before: Deja Foobar
  7. Neither four nor eight. by MarkByers · · Score: 5, Funny

    I think there is a world market for maybe five cores.

    --
    I'll probably be modded down for this...
  8. Classic mistake by ajs · · Score: 4, Insightful

    He's right. Current desktops don't need 8 cores. However, as four cores become widely available, desktops will begin to change. They will become more threaded, and more processing that would have been avoided previously will begin to happen passively. Constantly streaming video in multiple thumbnail size icons on taskbars, stronger and more pervasive encryption on everything that enters or leaves the machine, smarter background filtering on multiple RSS sources, MUCH beefier JIT on virtual machines, on-the-fly JIT for dynamic languages, more complex client-side rendering of Web content (SVG, etc), these will all start to become more practical for constant use. Other things that we haven't even thought of because they're impactical now will also spring up. By the time 8-core systems are available, the market will already be over-taxing 4-core systems.

  9. Do all cores have to be smart? by spyrochaete · · Score: 5, Interesting

    I recently read about a 1024-core chip for small devices like cell phones Each core ran on a simplified instruction set and specialized in a certain task like muting the microphone when incoming sounds are too quiet, smoothing text on the low resolution screen, and other minute tasks. Individual cores could be placed in low power sleep mode until the software dictated a need for that instruction set.

    Is it possible to couple CISC and RISC cores on one die? Is this how the math coprocessors of the 386 era worked? This sounds like an ideal solution to me since nobody needs 4 or 8 cores to be fully powered and ready to pounce at all times.

    1. Re:Do all cores have to be smart? by Kjella · · Score: 3, Informative

      Is it possible to couple CISC and RISC cores on one die? Is this how the math coprocessors of the 386 era worked?

      It's essentially how all modern processors are. I think the old coprocessors were the last that weren't on the same die (except the fake "coprocessors" that actually took over and completely ignored the old CPU, was more like a CPU upgrade in drag). Modern processors have a CISC instruction set which gets translated to a ton of mircoops (RISC) internally, and with parallel execution you in essence have multiple cores on one die - they're just not exposed to the user.

      The limitation compared to a cell phone, which has an extremely fixed feature set is trying to find workable dedicated circuits for that are meaningful for a general purpose computer. That's essentially what the SSE[1-4] instruction sets are, dedicated encryption chips (on a few VIA boards, plus the new TCPA chips), dedicated video decoding circuitry (mostly found on GPUs) and maybe a few more. But on the whole, we've not found very many tasks that are of that nature.

      In addition, there are many drawbacks. New formats keep popping up, and your old circuitry becomes meaningless or CPU technology speeds on and makes it redundant. The newest CPUs can so barely decode 1080p H.264/VC-1 content, but I expect that to be the hardest task any average desktop computer will face. What more is there a market for? I don't think too much.

      --
      Live today, because you never know what tomorrow brings
  10. People Will Always "Need" More by ausoleil · · Score: 4, Insightful

    "Need" is subjective.

    Once upon a time, Bill Gates said we would never "need" more than 640K.

    Once upon a time, mainframes only had 32K of RAM -- and that was a vast amount more than their predecessors.

    The '286 came out and was primarily aimed at the server and workstation market. "No one will ever need all of that power."

    Thing is, people always "need" more speed, more RAM and more storage. And they'll pay for it too, so Intel may "need" to sell 8X cores.

  11. 6 Coors enough by CrazyJim1 · · Score: 5, Funny

    The 6 pack has been tried and true, why try and stuff an additional 2 Coors into it.

  12. Re:640K cores ought to be enough for anybody... by mrchaotica · · Score: 3, Informative
    a multi-"computer" model, where each set of, say, 4 cores works the way it does now, but each set of 4 gets its own memory and any other relevant pieces.

    That's called NUMA.

    --

    "[Regarding the 'cloud,'] ownership was what made America different than Russia." -- Woz

  13. Re:Translation by ssista537 · · Score: 4, Insightful

    Seems like people dont RTFA. Let me Quote "Will we see eight cores in the client in the next two years? If someone chooses to do that, engineering-wise that is possible. But I doubt this is something the market needs." He is talking about next two years not ever. We just have an abundance of dual core machines in the market now and the apps to take advantage of it. Tell me how much different software we had two years ago than today. If so there is no way a desktop market needs 8 cores two years from now. Geez we have so many fanbois and script kiddies here with absolutely no knowledge of the industry, it is sickening.

  14. Comparisons to 640K misguided ... by AHumbleOpinion · · Score: 3, Insightful

    What quite a few other posters are failing to understand is that he is referring to diminishing returns. 1 to 2 give you some fractional improvement, 2 to 4 gives you a smaller fractional improvement, 4 to 8 gives you an even smaller fractional improvement, etc. At some point the cost, size, heat, noise (for the cooling), etc is not worth the fractional improvement. For most users that will probably be dual or quad.

    For those extremely rare apps and jobs that are highly parallelable 8 and above will be useful. However this will be very rare and this is why the comparisons to the infamous 640K quote are misguided. Increasing RAM is easy, software naturally consumes RAM with no additional work necessary, just do more of what you are alraedy doing. Multiprocessing is something completely different, the code must be designed and written quite differently, and it is often very difficult to retrofit existing code for multiprocessing. Now you have the practical problem that not all problems are parallelable.

    Strangely enough, I think one case where 8 cores could be useful in a home environment would be a bit retro. A multiuser/centralized system. One PC with the computational power for the entire family, dumb terminals for individual users, connections to appliances for movies, music, etc. Such a machine might go into the basement, garage, closet, or other location where noise is not an issue. Of course, I'm not sure such a centralized machine would be cost effective.

  15. I'll be the first to say it... by Junior+J.+Junior+III · · Score: 5, Funny

    640 cores ought to be enough for anybody.

    --
    You see? You see? Your stupid minds! Stupid! Stupid!
  16. Yes and no : depends on the brand by DrYak · · Score: 5, Informative

    Not quite exactly. Things depends on the brand.

    For Intel that's exactly the case :
    With current intel architecture, memory is interfaced with the NorthBridge.
    With multicore and multiproc systems, all chips communicate to the NorthBridge and get their memory access from there.
    So more cores and processors means same pipe must be shared by more, and there for memory bandwith per core is lower.
    Intel must modify their motherboard design. They must invent QUAD-channel memory bus, they must push newer and faster memory types (that's what hapenned with DDR-II ! They needed the faster datarates, even if those come at cost of latency), etc...

    But the more their pursue in this direction, the more latency they add to the system. Which in the end will put them in a dead end. (Somewhat like the deeper pipe of their quest for Gigahertz put them in dead-end of burning-hot and power-hungry P4).

    For AMD that's not quite the same :
    With the architecture that AMD started with the AMD64 series, memory is directly interfaced with a memory controller that is on-die with the Chip.
    The multiple procs and the rest of the mother board communicate using a standarized HyperTransport.
    The rest of the mother board doesn't even know what's hapenning up there with the memory.
    And with the advent of HyperTransport-plugs (HTX) the mother board doesn't even realy need to know it.
    Riser cards with Memory-And-CPU-Both-of-Them (à la Slot 1) is possible (and highly anticipated, because it'll make possible a much wider possibility of specialized accelerators to be plugged than currently with AM2 socket)

    The most widely publicised advantages of this structure are the lower latency.
    But this also makes it easier to scale up memory bandwith : Just add another on-board memory controller and voilà you have dual-channel. That was the differences between first generations of entry-level AMD64 (Athlon 64 for 7## socket : one controller - single channel, Athlon FX for 9## socket : 2 controllers, dual channel).
    by the time 8 cores processors come out and if CPU riser-board with standart HTX connector appears, nothing will prevent AMD to just build riser board designed for 8 cores chips with 4 memory controllers (and Quad-channel speed). Just change the riser board, memory speed will scale. Mother board doesn't need to be re-designed. In fact, same mother board could be kept.
    And this won't come at the price of latency or whatever : the memory controller is ON the cpu die, and must not be shared with anything.

    In fact, that's partially already happening :
    In the case of multi procsystems, instead of all procs sharing the same pipe thru the NorthBridge, each chips has it's own controller going at full speed.
    And this memory can be shared over the HT bus (albeit with some latency).
    It's basically 4 memory controllers (2 per proc) working together. Acheiving quad-channel alike shouldn't be that difficult.
    Specially when Intel is pushing the memory standart to chips with higher latency : asking for more bandwith in parallel over the HT-bus won't be that much penalizing.

    So I think AMD will be faster at developping solutions to scale against higher number of cores than Intel, due to better architecture.

    Maybe, it's not a coincidence that AMD is working on technology to "bind together" cores and present them as single proc to not-enough SMP-optimized software, and that at the same time Intel is telling who ever wants to listen to them that 4 cores is enough, 8 is too much. (Yeah, sure, just tell it to the database- and Sun Niagara people. Or even to older BeOS users. This just sounds like "640k is enough for everyone")

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  17. Re:The point is... by timeOday · · Score: 3, Insightful
    Those running huge simulations and using far more than 2GB of RAM are not doing so on a desktop.
    That's obviously because a desktop can't do the job. I run cluster jobs, and I assure you I'd prefer to run them on my laptop, if only I could put 100 cores in there.
  18. Re:Main memory of course. by Aadain2001 · · Score: 3, Insightful
    I'll give you that the data sets programs are using today are getting gigantic, which can easily lead to constant memory block swaping between the main memory and the caches. But when it comes to instruction caches, you obviously haven't heard of the 90/10 Locality rule of thumb: a program executes about 90% of its instructions in 10% of its code. That's because of branches, loops, the fact that there are large sections of code that are run only once, during initialization, and never run again, etc. So while the Java run time engine is larger than the L2 cache in all but the most expensive workstation processors, the majority of the instruction that are executed are only a small subset of the actual code, which can fit easily in typical L2 caches.

    If you look at Intel's Core 2 Duo, the cache space is not "divided" as the number of cores increase. Each core, if running at full load, will have 2MB of cache (extreme edition anyway). That is a very respectivable cache size and would be a respectable single core processor. When one core is not running (like when running only Word), one core sleeps while the other core is given all of the cache.

    Past marking ploys (GHz) were definately wrong, and trying to directly replace those metrics with the number of cores is also a bad choice. But don't you see that that is exactly what Intel is trying to prevent? The interviewee in the article is saying that more cores != more performance. Hence why desktop users will have no need for 8 cores or more. Most of the posts on this topic are along the lines of "ya right, more cores FTW!", which is a very uninformed mentality.

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