Slashdot Mirror
AMD Multi-Core G3MX DRAM Interface Details Emerge
MojoKid writes "New details have emerged regarding AMD's upcoming G3MX technology. The 'future Opteron Platform' AMD mentioned in their press release
seems to be built around a CPU currently codenamed 'Hydra'. Hydra will
still feature an on-die memory controller, but unlike current platforms it will
be geared for DDR3 memory. The processor will interface to one or more
G3MX chips, which
in turn provides the interface to the memory slots. G3MX will act as a memory port extender for the memory controller in the CPU socket and a serial link to the RAM.The electrical signaling between the memory controller and G3MX is based on HyperTransport 3.0."
Looks like a mini northbridge - just memory and no PCIe or AGP or anything else.
I wonder what the latency hit is going to be with lots of them on a server and moving data from one branch of a tree to another?
BR> I guess if they don't deviate from HT3 spec too much lots of other applications could emerge for this chip, with the inclusion of partnerships to bring DSP's and other accelerators / CPU alternatives to the server line this is turning more and more into Lego.
No, it's not all bad. GM3X is a sensible solution, with a different set of tradeoffs than FB-DIMM.
In both FB-DIMM and G3MX case you have the basic concept: Memory Controller --- buffer --- DRAM
The difference is where the buffer is. On G3MX is't on the board and it can handle 1 or 2 DRAM modules. On FB-DIMM it's on the DIMM itself and can only handle one module but buffers can be daisy chained.
G3MX allows you the flexibility of having up to 2 modules per channel without an extra latency.
With FB-DIMM, each modules in the channel worsens your average latency. The only way to add more modules without worsening latency is adding more channels. But each channel requires quite a bit of sillicon on the memory controllers, so it's not the best solution in the world.
OTOH, FB-DIMM allows up to 8 modules per channel. G3MX only allows two.
The only way to get more modules with G3MX is adding more channels. Not only each channel costs a bit of sillicon as I mentioned earlier (I'm ignoring the fact that it actually costs you an entire CPU), it also costs quite a bit of board area too.
DDRx channels require a lot more traces and board area than the FB-DIMM or HT links. We'll problably see some servers with the G3MX buffers and memory slots in daugher boards instead of mainboards, which will mititage the board area problem.
I don't think G3MX chips will have any kind of intelegence. They'll just be "dumb buffers", like FB-DIMM's AMBs or E8500's XMBs.
All the intelegence will be back at the memory controller, in the CPU die as usual: which pages will be open, what should be prefetched, etc.
They have probably meant to say that the same pin drivers will be used as they are on the HT-3.0 links.
Given that it took a considerable effort to develop such superfast drivers on silicon chip and that it is now in their existing know-how it seems only reasonable to leverage it to the maximum use...