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Researchers Design Microchip Ten Times More Efficient
WirePosted writes to mention that a new highly efficient microchip has been announced by researchers from MIT and Texas Instruments. The new chip touts up to 10 times more energy efficiency than current generation chips. "One key to the new chip design, Chandrakasan says, was to build a high-efficiency DC-to-DC converter--which reduces the voltage to the lower level--right on the same chip, reducing the number of separate components. The redesigned memory and logic, along with the DC-to-DC converter, are all integrated to realize a complete system-on-a-chip solution."
The article doesn't say whether these chips are cheaper to make than the current technology. That will be the deciding factor regarding how soon these make their way into our portable devices.
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I thought this sounded familiar.
Prov 9:8 Do not rebuke mockers or they will hate you; rebuke the wise and they will love you.
The first thing that came to mind when I saw this article was the Transmeta Crusoe processor. Which unfortunately never achieved much of any significant market penetration. Indeed, it seems that you really have to have something more than just an incredibly efficient chip in order to compete against the Intel - AMD behemoth.
Personally, I would love to see a chip that requires very low power make it into the mainstream market. I think it would great to have something like that for the miniITX form factor or something of that nature that hobbyists could tinker with and find fun applications for. The Transmeta, unfortunately, never realized that as far as I ever saw.
Damn_registrars has no butt-hole. Damn_registrars has no use for a butt-hole.
Just like all these articles on breakthroughs in energy efficient technology, there's only one thing I'm interested in.
from TFA:
So far the new chip is at the proof of concept stage. Commercial applications could become available "in five years, maybe even sooner, in a number of exciting areas," Chandrakasan says.
-- Boycott Shell
Since power usage is (roughly!) proportional to voltage squared, getting the chip to run at less than one third the usual voltage will indeed give an order of magnitude reduction in power usage.
From the report: One of the biggest problems the team had to overcome was the variability that occurs in typical chip manufacturing. At lower voltage levels, variations and imperfections in the silicon chip become more problematic. "Designing the chip to minimize its vulnerability to such variations is a big part of our strategy," Chandrakasan says. I.e. current state of the art transistors does not work reliably at such voltage levels, I'm guessing that they have to give up significant parts of the theoretical power reduction in order to make it work at all.
Terje
"almost all programming can be viewed as an exercise in caching"
The researchers are: "graduate students Yogesh Ramadass, Naveen Verma, and Joyce Kwong, along with Professor Anantha Chandrakasan". While they may very well all be U.S. citizens, it makes me want to ask for a precise definition of "American know-how".
Prov 9:8 Do not rebuke mockers or they will hate you; rebuke the wise and they will love you.
The know how to get them all into one institution doing work for one of our companies at one of our schools has to count for something.
Wow, sent an e-mail as suggested when clicking on "use classic" banner, and got a fast response that addressed my msg
Cute anime style chobits type ear implants????
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Their work is definitely interesting, but I think some important questions remain unanswered, the main among them is the tradeoff between correctness of operation vs. performance because of variability. There is a paper in ISLPD 2006 which shows that for a 65nm circuit to operate at 0.3 V, the clock period must be scaled up by a factor of at least 230% to compensate for variability related issues. Additionally, there is a huge problem as far as tool support goes. This is not just mix-and-match style design. In order for this to have widespread use, it needs to work well in the EDA tool workflow. This means that libraries (and to some extent transistors) need to be characterized well at the subthreshold operating voltages. This causes a catch-22 situation. In order to design something using this subthreshold voltage technology, you need good transistor models, but the fabs have no interest in providing these models unless there is large customer demand. It is pretty expensive to get good models. The way this works is most fabs actually create transistors/gates at the given feature size, characterize them, including parameters for variation/process variability and give these to their customers, who design their chips based on these simulations. The reason these are so important is that for synchronous circuits, you have to base the design of the clock scheme on the worst/average case delay, and this you can get only by doing complete (usually Monte Carlo based) simulation of the chip using the transistor models that fab gives you. If you base the parameters solely on simulation based tools, you ignore all sorts of effects in the real world, causing a massive drop in yield(i.e. working chips made by fab).
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Even when I was in engineering school, the majority of graduate students were foreign. I forget where, but I once read a quote that went something like this: "American universities are the best in the world. In fact, they are so good that American high school graduates can't compete in them".
Prov 9:8 Do not rebuke mockers or they will hate you; rebuke the wise and they will love you.
He's getting rather old, but he's a good mouse.
You're thinking about a physics-land purely resistive circuit, where we can arbitrarily control the resistance. Unfortunately, that's not quite the case with very-much-minified microprocessors. We can't arbitrarily force a couple hundred million transistors to use less current. And at the same time, transistors can be designed so that they don't require 1000V to operate.
Every transistor leaks current to some extent. And as those transistors get smaller, that amount of leakage likes to get bigger, because the "off" resistance of the transistor decreases. There has been an awful lot of research into how to reduce the leakage, with some remarkable successes, but the problem is becoming harder as the features shrink. So in order to limit the amount of leakage, the manufacturers are working to lower the voltage required for the transistors to operate. A lower voltage across that same off resistance means less current leaking (V=IR), and so less power is lost. The fact that the power is a function of the square of the voltage (or current) means that even a relatively small decrease in the voltage means a significant power savings.
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You're assuming R is independent of applied voltage, which is not true for any transistor. Resistance is a derived quantity that can be (for example) formulated in terms of the ratio of resulting current from an applied voltage. Ultimately, electronic devices require a certain current to operate, so it's not as simple as minimizing power by arbitrarily scaling down current. If you cannot supply enough current to a system, transistors may not have enough juice to produce those 1's and 0's quickly enough, causing unreliable operation. A more accurate way to look at the problem is that if you wish for a device to operate and it requires a given current, if you can find a way to deliver this current at a lower voltage then you will require less power to run the device.
If they have a substantially better DC-DC conversion technology, that's worth a lot of money to a lot of people already.
-jcr
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