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IBM Water-Cools 3D Multi-Core Chip Stacks
An anonymous reader writes "Water cooling will enable multi-core processors to be stacked into 3D cubes, according to IBM's Zurich Research Laboratory which is demonstrating three-dimensional chip stacks. By stacking memory chips between processor cores IBM plans to multiply interconnections by 100 times while reducing their feature size tenfold. To cool the stack at a rate of 180 watts per layer, water flows down 50-micron channels between the stacked chips. Earlier this year, the same group described a copper-plate water cooling method for IBM's Hydro-Cluster supercomputer. The Zurich team predicts high-end IBM multicore computers will migrate from the copper-plate water-cooling-method to the 3-D chip-stack in five to 10 years." Reader Lilith's Heart-shape adds a link to the BBC's article on these internally-cooled chips.
But they're really gonna rev up performance once they move to 4-cornered time cubes.
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Water cooling is great for the bleeding edge enthusiast, but it's hardly an option for the workaday computer users. Laptops certainly could stand to use some better heat dissipation, and if water cooling through 50nm tubes is possible here, how long until it is both cost effective and size-effective for people who aren't interested in hardware for its own sake to see this type of thing offered to us, the average computer user?
And is stacking the chips better than laying them flat and in a strip (like Pentium M)?
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How can IBM be this stupid? You can't cool a stack of chips with water, they'll just get soggy. I know it's hard to be patient, but if your chips are too hot to eat, you're better off just waiting for them to cool down.
Sounds like too much, with typical numbers around 60 watts per processor this days.
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Do it yourself, because no one else will do it yourself. [beta blockade 10-17 Feb]
I always liked the idea of a 3D CPU with all the cores and memory interweaved through each other in a way to have the optimal short path for its purposes. A LOT of memory could be there right next to the CPU. It would be fast even without clocking it very high, so not even have to consume that much watts per layer. It's a crazy amount of watts per layer mentioned in the article btw...
Right now, if the pump is off, or if the flow isn't flowing, the processor is none the wiser and happily starts up. I've seen my Core2Duo hit 100C when my pump died, my only warning was when the comp just shut off when it hit the temp cap. There needs to be some sort of control system that is actually linked in to the processor, so that it won't start if the flow of water through the block (or now the CPU itself) is below a certain rate. Most people who do use watercooling, however, know what they are doing and this usually isn't an issue, it would just be nice to know the server rack won't melt itself when someone blows the pump breaker.
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Actually boiling removes much more heat than conduction. This is the principle used in heat pipes, where you want a low boiling temperature, because that will be the temperature in the hot side.
Only if you are making a wet/dry system, such as one that relies on phase change. If that's the case, it's refrigerant you want, and not alcohol (there is no real benefit to the vaporization unless the pressure swing is high). If you are doing closed loop all liquid, you want something that stays a liquid since vapor can't carry as much energy as liquid can given the same space. See automotive liquid cooling and refrigeration phase-change cooling for plenty of high-efficiency examples, none of which use alcohol or any similar substance.
I can see it now, "IBM struck with class-action lawsuit after several incidents of computers being left out in the cold of winter cause the processors to explode due to the natural properties of water expanding into ice. Other incidents with water contamination in liquid nitrogen-cooled 3-D processors have resulted in a similar lawsuit."
IBM and water cooling of chips is not really new. I remember reading of some research they did back in the 80's when they etched micro channels on the back of processor chips, and forced water through them. IIRC, they reckoned they could eventually dissipate almost 1KW per square centimeter.
You want to drive bipolar chips fast, you apply more power. And end up with a piece of silicon dissipating way more heat per unit area than an electric fire. Mind you, so do Athlons.
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If you like to read more information on multicore processors, go to http://www.multicoreinfo.com/ .
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"When it's 1024 processors in a water-cooled solid block of silicon"
Somewhere there's a geek who has already accomplished this goal. He's using it to run Crysis at 4800x3600 with full detail, at 1600 frames per second, and no matter who he shows it off to, he still can't get laid.
In those good old days, CMOS was efficient because a CMOS gate draws very little power when it is not switching. This leakage current could be very small in the old days when power supplies were 5V and thus transistor threshold voltages could be high enough to make leakage small. The power drawn during switching was the main component and was relatively small because clock speeds were low. Now, both static and dynamic power are high and even equal in modern chips. High clock speeds means high dynamic power. Scaled-down devices with 1V supplies means that there is no good threshold voltage that achieves both low leakage and the expected levels of high performance. Indeed, most technologies offer multiple threshold voltages to at least let the circuit designer use a high-performance or low-leakage device in any given circuit, depending on the needs of that circuit.
CMOS is still a whole lot more power efficient than the TTL logic (i.e., bipolar junction transistors) that they replaced. Ideally, a CMOS transistor only requires power when switching states, whereas a BJT burns power continuously. Per transistor, they are a much better way to go.
The problem with high total power dissipation is the result of several interrelated trends, all of which can be related to Moore's Law. More transistors got crammed onto a single chip (a linear increase in power dissipation - double the transistors doubles the power). The clock speeds increased from kHz to MHz to GHz (power increases linearly (or squared) with increasing frequency). Thinner gate oxides permitted greater leakage currents. These trends can also be weighed against competing trends that save power, the greatest being that a smaller transistor uses less power than a large one - it is proportional to area.
The result is that you have orders of magnitude more transistors in a chip (hundreds of millions for a microprocessor), switching orders of magnitude faster (a few GHz), while each transistor is orders of magnitude smaller (less than a square micron) and requires orders of magnitude less power per switch.
On balance, it means that a microprocessor's TPD has increased only 1-2 orders of magnitude over the last few decades, and has leveled out at ~100 W as a sort of practical limit. When you think about it, and consider that a microprocessor today is millions or billions of times more computationally powerful than the first CPUs, it is amazing that all these orders of magnitude manage to balance out to a reasonable increase.
helium doesn't cool things to low temps. you cool the helium down to low temps, and then pump the cooled helium against your heat source. it takes a lot of energy to cool the helium in the first place, and would take up a lot of space.
Here's the chip http://www.starstore.com/acatalog/hellraiser_puzzle_box_L.jpg
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tert-butanol 82.4 C
2-propanol 82.7 C
2-methyl-2-propanol 83 C
2-butanol 94 C
1-propanol 97 C
2-methyl-2-butanol 102 C
2-methyl-1-propanol 108 C
1-butanol 117.7 C
2-methoxyethanol 124 C
3-methyl-1-butanol 130 C
2-hexanol 136 C
1-pentanol 138 C
1-hexanol 151.4 C
2-butoxyethanol 171 C
1-heptanol 176 C
1-octanol 195 C
1-nonanol 215 C (freezing point is -7 C)
1-decanol 231 C (freezing point is +7 C)
The boiling point of 1-octanol is pretty good, so it could be used to cool reliably at higher temperatures than water. Also, its viscosity is only one quarter that of water, so it can be pumped through narrow channels more easily (higher flow at lower pressure) to achieve higher heat removal. It remains liquid down to -16 C, so it would not have to be purged from the chip for storage in cool environments.
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