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IBM and AMD Create First 22nm SRAM Cell

arcticstoat notes an announcement from IBM that, along with technology partners, they have produced the first working sample of a SRAM cell built on a 22nm fabrication process. According to the article, this represents the next generation after 32nm process chips and won't be in products for some years. "The technology was developed with several partners, including AMD, Toshiba, STMicroelectronics and Freescale, as well as the College of Nanoscale Science and Engineering, where IBM performs a lot of its semiconductor research. IBM says that the cell's development involved 'novel fabrication processes,' including high-NA immersion lithography..., high-K metal gate stacks, extremely thin silicide, damascene copper contacts, and advanced activation techniques."

12 of 83 comments (clear)

  1. When will it stop? by 4D6963 · · Score: 4, Interesting

    22 nm?? Aren't we dramatically approaching the theoretical limit? What is the theoretical limit by the way?

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    You just got troll'd!
    1. Re:When will it stop? by TheMeuge · · Score: 5, Interesting

      Well, a single silicon atom has a radius of 110pm. I assume silicon dioxide molecule is ~500pm, which is something like 40X smaller than the 22nm process.

      However, silicone dioxide is not perfectly stable and can "leak", as far as I understand it, which limits the process somewhat.

      Again, assuming you need something 100X larger area-wise, you're looking at maybe a factor of 4X remaining until the process can't be shrunk any further.

      But I am not an engineer.

    2. Re:When will it stop? by wizardforce · · Score: 4, Informative

      Aren't we dramatically approaching the theoretical limit?

      yes.

      What is the theoretical limit by the way?

      for Silicon it's probably around 10nm or so. as for what is thought to be possible, molecule size components measuring a few nm.

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    3. Re:When will it stop? by x2A · · Score: 4, Interesting

      I think the limits we're hitting at the moment are not so much due to the material we're cutting into, but the light we're using to do so. To cut finer we need narrower wavelength (=higher energy) light. We're already hitting the very high end of the ultra-violet spectrum (around 10nm) and approaching x-ray light. As the wavelength decreases, all sorts of other things start to change. Materials the used to reflect the light now start letting photons through, lenses no longer have any effect etc, so new ways have to be found to control light at higher frequencies.

      But even here there are ideas to get around the problems, such as using quantum effects like creating interference patterns (I believe I read recently, but don't quote me on it) to cut details finer than the wavelength of the light.

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      The revolution will not be televised... but it will have a page on Wikipedia
  2. Re:IBM and AMD by XanC · · Score: 4, Funny

    Morgan Freeman? Is that you?

  3. Remember by Anonymous Coward · · Score: 5, Funny

    apple uses intel processors so we should hate amd and ibm.

    1. Re:Remember by x2A · · Score: 5, Funny

      But IBM put money into linux/oss development (*cheers*) and they fought SCO (*boo's*) who hate so that makes them good... but they also built machines for the nazi's (*boo*) but cuz of the whole nazi thing we have Fanta (*...erm... do we like fanta?*). AMD + ATI = open source graphics drivers (*yay*) but Intel = open source graphics drivers all by themselves (*bigger yay*). IBM, even if they did get shat on during the process, are kinda responsible for putting MS (*smashes bottle and puts broken sharp pieces to its neck*) where it is now.

      Erk... I think I'm going to need to have to create some kinda graphical relationship manager for this one, create a love/hate score for everyone involved, in the same way Google create pageranks, and I'll get back to you on whether we do in fact love or hate IBM or not. Stand by...

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      The revolution will not be televised... but it will have a page on Wikipedia
  4. In case you're wondering why SRAM... by Anonymous Coward · · Score: 5, Informative

    New manufacturing processes are typically tested by producing SRAM cells, because they're a relatively typical structure and big arrays of SRAM cells are easily tested to measure the defect rate.

  5. FFS! by ZarathustraDK · · Score: 4, Funny

    The more I pay the less I get! What have the world come to?

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    If you quote this signature there'll be 72 copies of Windows ME waiting for you in Heaven.
  6. Re:IBM and AMD by Anonymous Coward · · Score: 4, Informative

    In other news IBM and AMD have used words I don't know

    Is that what you meant to say?

    Silicide. Damascene. And have you never heard of a Damascene conversion?

  7. Ah, Silicide by Pope · · Score: 5, Funny

    Like when a clown kills itself.

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    It doesn't mean much now, it's built for the future.
  8. Re:IBM and AMD by vigour · · Score: 5, Informative

    In other news IBM and AMD have hired linguists to invent new words for this process. "silicide, damascene copper contacts, and advanced activation techniques." seemed far to cool to saddle with the brand- name of the new "Blubberon(TM)" and "Humpderon(TM) processor line.

    You need to think before mouthing off in ignorance.

    Silicides are silicon based compounds, eg Copper Silicide, Cu_5 S. The high purity of the Si used by IBM etc means that the formation of Silicides in their samples is unlikely to come from impurities in the wafers (Fe, Co, Ni and other transition metals are generally the worst offenders). So they are most likely to form at Si-stack interfaces after annealing (essentially baking) their samples (chips).

    Damascene copper is contacts are small interconnects made in multi-step stages.
    1.There's a lithography step (patterning & chemical wet-etch) to make trenches for the copper connects.
    2.Followed by either electrochemical deposition, or sputtering of the copper.
    3.Finally after an etch/polishing step you have your connects.

    "advanced activation techniques" refers to modifying the surface of the silicon wafer, and/or deposited layers on the silicon to increase deposition rate, and current efficiency. In the case of electrodeposition, you need to aim for a current efficiency of more than 10% (as in, for a given applied potential, measured current/charge, how much metal has been deposited compared to what you would expect). An electrochemist working in industry would be able to give a much more accurate value than this.

    It's all a lot more complicated than this, and optimising each step is a painstaking process, and yes IAAPBOWIMSNSP (I am a physicist, but one working in magnetic systems not semiconductor physics), but that is the general gist of it.