Toshiba To Test Sub-25nm NAND Flash

An anonymous reader writes "Toshiba plans to spend about $159.8 million this year to build a test production line for NAND flash memory chips of less than 25 nanometers. The company hopes to kick off mass production of the chip as early as 2012. The fabrication facility for this key NAND flash memory will be located at Yokkaichi, Mie Prefecture."

Comments

You forgot the "so what".

[rindeee]

Not everyone (including me) understands what the benefit to consumers will be when less than 25nm production is possible. Does that mean 1TB flash memory cards for my camera? Same sizes as now but cheaper? What? Just an additional sentence giving a "once possible, this will mean blah blah blah blah blah". Simple as that. Of course, with an 'article' (actually just PC Mag parroting a Thoshiba presser...for pay I'd imagine) as crappy as the one linked to in the headline, I don't know that it really matters.

Re:You forgot the "so what".

[RabidMoose]

The reason this is a big deal, is that this is the type of flash that goes into SSD's. Right now, a 256GB SSD costs over $600. Read/write speeds on mainstream HDDs are one of the biggest bottlenecks in today's machines, and SSDs are the answer to the problem, once they come down in price. Also, SSDs draw less power than traditional hard drives, so longer laptop battery life is an added benefit. Not to mention the benefit that data centers could see, both from a throughput standpoint, and a lower power/cooling requirement.

Re:You forgot the "so what".

[TheRaven64]

witch means an approx 4 x larger yield on a 300mm wafer

I'm not sure what witches have to do with it, but the yield improvement from a process shrink is more than just the 4x that you get from cramming four times as many chips on a wafer. An impurity in the wafer typically destroys one die. If you're unlucky it may be between 2 or even 4. If you make each die smaller then an impurity of the same size may only destroy 1-3 of the 4 in the same area as one of the originals.

ultimate limit

[goombah99]

Is there a proposed ultimate limit for lithography before one has to jump to molecular electronics? 25nm is well below what anyone though practical a decade ago (since it's so many times smaller than easily produced optical wavelengths). Now it's closing in on the limit of easily produced x-rays.

while the resolution of the smallest resolvable element is shrinking, is the utilization of area increasing proportionally. That is are we densely filling the area with 25nm structures or is that simply the finest linear element and these are well separated?

A 1cm chip would have 1E15 resolvable points at 0.025 micron resolution. And then there is the vertical resolution to multiply that. I should think it would become prohibitively difficult to design something with so many possibilities.