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New Manufacturing Technology Enables Vertical 3D Transistors
MrSeb writes "Applied Materials has taken the wraps off a new etching system meant to turn vertically stacked, three-dimensional transistors from lab experiments into commercial reality. The new Centura Avatar solves multiple problems facing manufacturers who are interested in 3D NAND but find their current equipment not up to the task of actually building it. According to the folks at Applied Materials, trying to build 3D NAND structures in real life would be like trying to dig a one-kilometer-deep, three-kilometer-long trench with walls exactly three meters apart, through interleaved rock strata — and that's before we discuss gate trenches or the staircases. While this machine specifically targets 3D NAND today, a number of the challenges to scaling flash memory apply to scaling CPU logic as well. As for when 3D chips will be available for commercial purchase, Applied Materials was vague on that point, but personally I would expect to see companies adopting the new etch equipment in the next few years."
"would be like trying to dig a one-kilometer-deep, three-kilometer-long trench with walls exactly three meters apart, through interleaved rock strata..."
No problem dudes, let me fire up Minecraft and I'll show you how its done!
I foresee this going at about the pace that perpendicular recording did with hard drives. Remember how we heard about this whiz-bang great new idea years ago, and look how long it took to actually come to the practical market.
But now it's ubiquitous. So I suppose the same will happen with the chip. And I can see this dealing a crushing blow to the already hurting spinning disc hard drives with them being able to vastly increase flash storage density.
I work for the Department of Redundancy Department.
dig a one-kilometer-deep, three-kilometer-long trench with walls exactly three meters apart
Please avoid these strange and esoteric units and use units that are familiar to us. The approved units are football fields for lengths, Olympic size swimming pools for volume and libraries of congress for data volume, Rhode Island or Delaware for area.
sed -e 's/Chuck Norris/Rajnikant/g' joke > fact
1. Random ballpark guess, I'd say 5 years, and it will probably be extremely expensive then (likely for enterprise and professionals who need extremely high density NAND).
2. It probably won't, not for a while anyways. It should allow much (much) higher density, but only after they start mass producing it. So, don't expect to be buying 1TB flash cards for $100 anytime soon. It will also almost certainly have major reliability issues for a long time to come, due to the difficulties with the process. Seriously, don't even start looking forward to it yet, it's that far away.
"None can love freedom heartily, but good men; the rest love not freedom, but license." --John Milton
There's two semantic goofs in this submission, one in the title and the other in the first sentence, and neither was noticed or corrected by Soulskill. The phrase "vertical 3D transistors" is misleading, since a literal interpretation doesn't describe z-axis stacking and instead describes objects whose most significant dimension is oriented vertically; it would be more accurate to write "stacked 3D transistors". In the first sentence, the adjective phrase "vertically stacked" is certainly a pleonasm if there ever was one; the definition of "stacked" already describes a z-axis or "vertical" state. The use of the word "vertical" in both of those instances is ineffective semantics.
This technology bears about the same resemblance to what Intel is doing as anaglyph 3D does to a hologram. Intel basically just stuck a 3rd gate on top of two others, stacking normal planar transistors. It's "3D" in the technical sense, but only barely. This new(ish) technology takes essentially a single block and molds it into arbitrarily many levels of transistors, so you can have a stack of dozens or hundreds deep. Much more difficult, and potentially far more rewarding.
"None can love freedom heartily, but good men; the rest love not freedom, but license." --John Milton
They aren't talking about non planar FETs ... their 3D NAND requires a far higher anisotropy (the whole 1 km deep 3 m wide bit).
And potentially far more difficult to get the heat out of.
I don't believe this is actually the *first* fab process using vertical structures (having actually RTFA). I worked at Texas Instruments in the mid-80's and most of the ALS (Advanced Low power Schottky) devices were of vertical well construction (as opposed to planar process or lateral junction bipolar construction). Looks like the sizes are a lot smaller, and the ratio of depth to width is a lot higher (a lot more junctions stacked in one well).
Chaos maximizes locally around me.
I would think this tech will come sooner, and while expensive, it should also increase performance while increasing density. Shorter traces = faster signals and less problems trying to coordinate synchronization between multiple paths since the difference between longest and shortest traces is reduced.
Five years are barely enough to get a small modification of a process from a research fab to a real one, if it works flawlessly. A couple more years are typical for technologies that don't work flawlessly at the first try. This process needs an antire new fab, with much more layers than normaly available, and their special etching tech. I wouldn't expect it to get mainstream soon.
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With all the SSD money coming in instead of just SD cards, flash drives, and RAM, I bet the main companies will be able to fund this technology and implement it without even the need for external investors. That'll speed things along more than other projects. A lot of vaporware disappears because of a lack of investment money being available of course.
Yeah, I'm not sure what they plan on doing about that. Seems like it could be a major issue. They might not even have a solution to that yet, although TFA seems to be thinking this is going to be used for Flash memory, rather than CPU transistors, which makes heat considerably less of an issue.
"None can love freedom heartily, but good men; the rest love not freedom, but license." --John Milton
Yeah, I'm not sure what they plan on doing about that. Seems like it could be a major issue. They might not even have a solution to that yet, although TFA seems to be thinking this is going to be used for Flash memory, rather than CPU transistors, which makes heat considerably less of an issue.
NAND memory, and memory in general, is generally first in adopting new process technologies. It's far easier to make (relatively simple) memory circuits (generally consisting of a tiny number of transistors) than it is to make (relatively complex) logic circuits (consisting of orders of magnitude more transistors).