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Magnetic Transistor Could Cut Power Consumption and Make Chips Reprogrammable
ananyo writes "Transistors, the simple switches at the heart of all modern electronics, generally use a tiny voltage to toggle between 'on' and 'off.' The voltage approach is highly reliable and easy to miniaturize, but has its disadvantages. First, keeping the voltage on requires power, which drives up the energy consumption of the microchip. Second, transistors must be hard-wired into the chips and can't be reconfigured, which means computers need dedicated circuitry for all their functions. Now, researchers have made a type of transistor that can be switched with magnetism. The device could cut the power consumption of computers, cell phones and other electronics — and allow chips themselves to be 'reprogrammed' (abstract)."
Been so for 25 years. It's called FLASH memory.
They mean the transistors are programmable. If you can change the chip logic, you can get custom behaviours at top speed. Flash is for firmware, but doesn't change the chip itself. This stuff is awesome if it can be made to be as fast as a regular transistor. OTOH magnetism itself is a bit of a worry, as the chip could get wiped quite easily.
Do it yourself, because no one else will do it yourself. [beta blockade 10-17 Feb]
programmable gate arrays that can operate in the gigahertz. some specially made for networking
one that requires voltage to keep it on, one that requires voltage to keep it off (P channel vs N channel FET's), ones that require current levels to keep it on and off (npn and pnp BJT's)
so to say
"First, keeping the voltage on requires power"
is a broad statement, yea something that uses power requires power
Then
"Second, transistors must be hard-wired into the chips and can't be reconfigured"
well yea, but we have long established configurations of transistors that can be reconfigured to suit needs, its called programable logic and spans the life of PAL's, GAL's, CLPD's, and upto FPGA's
so, what exactly are you trying to tell me other than magnets can drop power consumption since they have a physical state memory, we already know that from core memory.
The idea of mutating the hardware directly sounds akin to the regulation of gene expression in living cells. For example, the "software" of a virus takes control over the "hardware" of a cell's DNA production, and forces it to make copies of itself. That sounds pretty interesting. (And dangerous) In that kind of a system, you'd need an analogue of white blood cells to seek out and "destroy" (re-wire) captured logic gates.
"We receive as friendly that which agrees with, we resist with dislike that which opposes us" - Faraday
Magnetic states aren't as easily harmed by cosmic rays, thanks to spin majorities. That's why MRAM (magnetic RAM) is good for space applications. Now just bring in the magnetic processors, courtesy of this new magnetic transistor switch, and you can have a robust system that's much more capable of standing upto the harsh radiation environment of outer space without suffering crashes and glitches that can jeopardize a mission.
They mean the transistors are programmable.
Xilinx, Altera, and others have made reprogrammable chips for years. This new technology could potentially provide a different/better/cheaper/faster way of making a FPGA, but it isn't anything brand new, just a different way of doing the same thing.
Core !! Old as the hills !! So old, it has come back around !! Probably some shit unix time wrap failure !!
It's a standard field effect transistor, except the gate can hold a magnetic charge on its own, with no voltage applied. You only need to apply a charge to change its state. It actually looks sort of like a flash cell, except as the gate of a transistor.
However, it's made with indium antimonide, which apparently doesn't work well with existing fabrication methods. And I have to wonder what the switching times on it would be - if it can handle the multi-gigahertz frequencies in modern processors.
The whole "reconfigurable" bit is journalist bullshit. Pay no attention to it.
No. The chip interprets a program, but in itself cannot do anything it was not designed to do at the factory. You can't add a new command (e.g. Assembly ops), and all commands need some form of hardware implementation to work (I'm not a chip designer, gross simplifications etc. etc.).
This would allow the chip to be reprogrammed, perhaps even by itself. For example, you could have a circuit do addition, but then change it so it does division. The closest we have to this right now would be field-programmable gate arrays (FPGAs), but those require significantly more circuitry to be reprogrammable as each gate needs to be able to perform any of a set of basic commands depending on what the current setup is.
It's too early to say whether this'll pan out, but it's definitely interesting research and not useless as you seem to imply.
You could say the same thing about transistors vs vacuum tubes.
That was my thought also, but especially at small geometries CMOS has leakage everywhere. Flash devices can have zero leakage, but they have programming speed and durability problems. Magnetic devices could have zero standby current, but I have substantial doubts about the practicality of very small devices. On the other hand, there is already a supplier of ferroelectric RAM, Ramtron (now a part of Cypress Semiconductor).
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First, keeping the voltage on requires power, which drives up the energy consumption of the microchip.
Barely. Almost every digital chip out there uses CMOS logic. The whole point of CMOS logic is that, when the gates aren't switching, no current flows. That means that no power is drawn. In practice, a little bit of current leaks, but this is a small effect at all but the smallest process sizes.
It's not all clear from the abstract how the authors expect to maintain a magnetic field without any static power consumption. Perhaps using ferromagnets, but I wouldn't hold my breath -- MRAM still hasn't happened.
We gonna have some real smart robots someday.
What if that chip got wiped in the middle of a very critical mission?
Current crop of chips made of silicon transistors don't have that problem, unless the force of electro-magnetic interference got so great that it fries the chips.
Muchas Gracias, Señor Edward Snowden !
The whole field of spintronics is opening up and includes quantum computing. Here's an interesting article on a new 3D spintronic memory which could produce new memory chips 1000s or even 1000,000s of times denser that existing devices with high speeds and all the advantage mentioned in this article mentioned about magnetic technologies.
An FPGA gate is basically just a lookup table for a logical function, stored in a tiny memory cell. Routing, etc. is also configured using memory (flip-flops). I would guess the magnetic transistor would at least make FPGAs less power hungry (no need to power the flip-flops), or they might allow the chip to be built from programmable transistors, rather than using lookup tables and dedicating part of the chip area to conventional memory and arithmetic circuitry.
No. The chip interprets a program, but in itself cannot do anything it was not designed to do at the factory. You can't add a new command (e.g. Assembly ops), and all commands need some form of hardware implementation to work (I'm not a chip designer, gross simplifications etc. etc.).
.
Sorry, but CPUs have had microprogrammed instruction codes for decades.
When our name is on the back of your car, we're behind you all the way!
(magnetic) core memory is entirely different, because it only contains one bit of information (and requires crazy timings, plus you have to rewrite the data when you read it, quite fun...)
You have crazy timing and you have to rewrite the data when you read it from DRAM as well.
When our name is on the back of your car, we're behind you all the way!
FPGAs essentially have "gates" that are not merely gates but small look up tables (LUTs), they also have storage elements, some dedicated arithmetic units for DSP (powerful ones do that), and a whole bunch of routing resources. If you want programmable logic of any sort, you'll need all that no matter what technology is used to reprogram the transistors. An FPGA usually has either internal or external configuration source (FLASH, a download from a CPU, etc.), and a volatile configuration storage that's attached directly to the transistors/gates to control their operation. Magnetic technology there would merely reduce power consumption by those volatile configuration storage elements. It'd not reduce the need for wiring the write elements for those configuration storage bits into a memory array of some sort, and any sort of magnetic technology would probably occupy way more space per bit of configuration data due to the size of the write elements - unless you can somehow make a multi-layer design where the circuitry for the write elements doesn't take up real estate from underlying CMOS circuitry. Sure the storage elements may be tiny, but the write elements needed to flip their magnetic state will not be so tiny, even if done using MEMS techniques. That's what I make of it.
A successful API design takes a mixture of software design and pedagogy.
Not really. Magnetism trails off with the cube of the distance, rather than the square of the distance.
Exactly. For a decent 150nm process I think you can keep the leakage at microamps per a million transistors, or did I get that wrong? Alas, for a 30nm process, it's like 4-5 orders of magnitude worse.
A successful API design takes a mixture of software design and pedagogy.
Sorry, but microprogrammed instruction codes are still several layers above the transistor switch level.
Oh yes. A DDR3 device datasheet is more complex than that of quite a few peripheral chips from the 80s.
A successful API design takes a mixture of software design and pedagogy.
This article is almost 100% weasel words. Of course, just like optical computers and 3d storage cubes, it's 5-10 years away, right?
Jeez.
mu-Metal works better than iron. It has 80-100 times better shielding capability. It's also lighter (kinda a big thing for space use...)
Chaos maximizes locally around me.
Don't FPGA chips require logic on top of transistors to function? This suggestion appears to make this unnecessary as transistor level hardware becomes reprogrammable without additional stuff on top.
logic is made out of transistors
FPGA's are about addressability of combinations. The finer the grain the more configuration and potential interconnect is needed to achieve flexibility.
Conversely, the larger the blocks are the more capacity can be fitted but the less combinations possible.
The cool part is possible efficiency savings - assuming it can also beat SRAM for speed and thereby get used right in the heart of processors.
The new function is MRAM - good for DRAM replacement. I don't see it beating flash any time soon simply on the basis of density. But as a DRAM alternative it has real potential.
After that, the risky part becomes coming up with ways to design hardware that can't get in a lockup state. Because a power down won't rescue you any more than the reset button does. It'll give a whole new variety of bricks!
That brings us to CMOS. CMOS was claimed to basically be a no power draw static fabrication technology too. But over the years, as the tech got miniaturised more and more it eventually started leaking so much that, on average, the leakage dominates.
These new spintronic techs will prolly end up having the similar leakage issues at similar scales.
It is called IGBT
Yes, but a magnetic field needs a current. FPGAs are electrostatic in nature, once you're past the big startup current it levels off. To keep a magnetic field going (small as it might be) you need to have a current flowing...
EEPROMs as flash RAM or firmware is old, very old. But the idea of a processor being field reprogrammable *is* new. It's so new, nobody has anything that would benefit yet. Think of something like Cisco booting based off the startup config, then optimizing the processors based on the config. Port 2 shutdown? Divert the gates to process something else. Want to be able to turn anything on and off without any delays? Then consider dynamic memory allocations. Not dynamic storage, the way everyone thinks, but looking at whether there are 64 bit requirements, and if not, programming it as parallel 32-bit CPUs for extra speed, and if 64-bit is requiring, booting up in 64-bit mode. Got an idle encryption ASIC? Now you have another general processor.
You claim it is common, but has anyone ever released a CPU that changed dynamically? Rather than optimizing code for the CPU, optmize the CPU for the code. I see this being biggest in the area where ASICs are biggest, networking gear. Need more hardware encryption? Need more QoS profiles?
Learn to love Alaska
Remember all those post-apocalyptic shows in which a giant EMP reverts the world to a technological wasteland?
Put this these in all our electronics and we might get to find out what that's like.
Check this video out:
http://www.youtube.com/watch?v=pEof8E2cF8o
Back then I was thinking of how this could overcome the heating problem we would get if we could change the characteristics of each transistor in a 3D layered transistor array. Imagine having a FPGA with 10x10x10 layers, all cross addressable and connectable, Diagonally as well as parallel.
What this world is coming to - is for you and me to decide.
EEPROMs as flash RAM or firmware is old, very old. But the idea of a processor being field reprogrammable *is* new. It's so new, nobody has anything that would benefit yet. Think of something like Cisco booting based off the startup config, then optimizing the processors based on the config.
Let's see if Cisco can "optimize" IOS to not crash because of stupid memory leaks & buffer overruns first :-)
To keep a magnetic field going (small as it might be) you need to have a current flowing...
And that's why I have wires and batteries connected to all my fridge magnets...
From my understanding the magnetic field is only required to configure the tranistor not sustain it.
Do it yourself, because no one else will do it yourself. [beta blockade 10-17 Feb]
You don't need a current to sustain the magnetic domain in something like a hard disk, which is the impression I get of what this technology is about.
Not sure you understand how a Faraday cage works - they are not powered.
If you can change the chip logic, you can get custom behaviours at top speed.
That's what we thought about FPGAs, but it didn't quite work out that way. Using this technology won't change that, it will just allow us to make better FPGAs.
Reprogramming an FPGA is slow (many switches to reconfigure, usually serially), which means it would only increase overal performance if you can use the custom function long enough, and it only works if you don't have to switch functions too often.
Writing software for an FPGA is difficult (it's more logic design than software) and requires specialized software. Reconfiguring it in a wrong way could damage the silicon (though modern devices and software have some protections and checks). So any custom functionality would come in the form of libraries, written by specialists.
The amount of extra interconnect and transistors needed to make a CPU reprogrammable are also significant, resulting in higher die area (and thus cost), lesser transistor density (=slower speed), and overall higher energy consumption.
The result of all this is that FPGAs are only used in very custom hardware (usually low volume), with the programming remaining largely static, only to be altered when there are bugs found or improvements needed (once a month or less).
The power consumption claims sound a lot more like plain old static ram, even older than 25 years.
In sleepy mode, a large sram draws a current low enough that there's no need to use anything bigger than a rechargeable AA battery, because the battery self draining current of an AA is already a multiple of the sram current so the battery will last almost as long as it would take to die on the shelf. Maybe shortening the "shelf life" by a couple hours or even a day.
Dallas Semiconductor makes a lot of interesting controllers for this task. Something like the DS1210 senses when the main power is shutting off, then it slams the sram its connected to into sleep mode and disables CPU access so it doesn't get messed with by the powering off CPU. Just soldered one in last weekend for a little experiment, but its really old tech. It likes a very clean power supply, otherwise it thinks the power is failing and disables the sram, which can be annoying... it has to be more sensitive to the supply voltage than any realistically connectable CPU would be, otherwise it might leave the CPU connected to the SRAM while the CPU is in low voltage bonkers mode thus defeating the purpose of having a backup...
One of the minor mfgrs, maybe DS don't remember, used to sell a big and chunky DIP package with a lithium watch battery and associated hardware that was plug compatible with traditional sram except it had an almost magic 10 year battery backup. That was over a decade ago and I remember it was a PITA when they all started croaking. There is a way to dremel the package open and stick a new battery inside, supposedly anyway.
"Science flies us to the moon. Religion flies us into buildings." - Victor Stenger
It's so new, nobody has anything that would benefit yet.
I think more than a few people have ideas... here is one: a chip that can switch between AMD64 and ARMv8 instruction sets, even supporting both simultaneously...
I think the reality is that no big chip manufacturer wants such a thing to exist.. how is ARM going to get its licensing fee if you can just download the instruction set from the pirate bay?
"His name was James Damore."
The article says the switching depends on the direction of the magnetic field, so that sounds like it has to be sustained.
However, it could be possible to use magnetic nanoparticles to provide that magnetic field, which is the solution proposed in the second half of the article. A stronger-than-normal electric field could be used to rotate those magnets. The problem is that building such a structure is very difficult. A bottom-up nanotech approach combined with our current top-down lithography would introduce far too many contaminants. Trying to get a nanoparticle solution to go exactly where you want it is extremely difficult, especially due to the high surface forces that make nanoparticles like to stick to things. The difficulty of using a traditional top-down approach is making the nanoparticles able to rotate. There would need to be multiple types of resist used, likely, one to define the shape, and the other to be removed at the end to provide spacing during fabrication. The high surface forces as mentioned previously would also pose a big problem. Nanocrystals lack the stability given by long-range order and, especially with sub-10nm crystals, can have unique crystal structures due to this large stress. In order to mainain stability and not try to merge with neighboring crystals, there either needs to be an electrostatic barrier or physical barrier. Because it's impossible to keep something passively balanced with a electric or magnetic field, there would need to be the additional complexity of a pivot placed at the necessary angle. It's possible that something like graphene could be used to provide lubercatoin of the pivots, but this means that both the graphene and magnet would have to have compatible crystal structures so that the depostion growth grows with a known crystal orrientation (for knowing where to place the pivot).
On the other hand, this technology could be very useful with current technology in MEMS (microelectromechanical systems). A field of these transistors could be used to very accurately know the position of a magnet, in, say, an actuator, or on a spring for an accellerometer.
Yes, but now try integrating a feromagnetic material. You can't just vapour deposit anything you wish.
You're right. It's so new that we've had entire conferences and journals dedicated to reconfigurable computing for more than a decade now.
Never mind all the companies that released actual commercial hardware that uses these techniques.
Optimizing the CPU for code is something that is still being worked on, but even that has been going on for years.
Just to add, another possibility would be to provide a powerful enough source of electricity to alter the magnetic orrientation within the crystal without actually melting it.
As IAmR007 explains so nicely in #42777533. There are problems when attempting to integrate magnetic particles with current production techniques is quite a challenge. But an interesting one. Semiconductors generally use materials like aluminium, copper, titanium, and so on. None of these materials actually exhibit feromagnetism, as such you need to keep a current flowing to sustain a magnetic field.
Flash-based in-circuit reprogrammable logic arrays have been around for at least 20 years. Move along, nothing to see here.
"Eve of Destruction", it's not just for old hippies anymore...
Oh yes. A DDR3 device datasheet is more complex than that of quite a few peripheral chips from the 80s.
Yes. Quite a bit more complex. Today's devices have to cope with different power levels (suspend, hibernate, etc), their data busses are eight times as wide, and the address busses are also quite a bit wider. The clock timings are quite a bit tighter, etc.
Nevertheless, DDR3s, like all dynamic memory, requires refresh cycles and rewrite on read in order to maintain the data (in fact, all that a refresh cycle is is a read and rewrite session). These days, that is handled by control circuitry on the memory module, and within the north bridge chip on the motherboard, so the CPU doesn't have to deal with it However, it is still there. After all, at its heart, each bit in a dynamic ram chip is stored as a charge in a capacitor, and over time all capacitors leak their charge away.
When our name is on the back of your car, we're behind you all the way!
... you can brick a computer if you get it to near a large magnet.... like a speaker?.
And there's no such thing as an FPGA with embedded FLASH? This sounds very much to me like scientists trying to find a solution to a non-problem using a basic method that has innate vulnerabilities that conventional technology does not have.
At the scales they mention in the article, you could have a whole lot of reconfigurable logic gates in the space that one cell of their prototype takes up. They haven't figured out how to miniaturize the cell to anything like modern semiconductor cells, let alone shield it from stray fields or make it work as fast as semiconductors.
and at the tail end of the article, you'll find this zinger...
But Johnson notes that magnetism is already catching on in circuit design: some advanced devices are beginning to use a magnetic version of random access memory, a type of memory that has historically been built only with conventional transistors. “I think a shift is already under way,” he says.
I guess Nature never heard or core.
Even with boring general purpose CPU tasks, this could be useful. Say a machine is going idle, it would be able to re-pattern a core from high wattage and CPU to a more power saving design.
Taking this technology to software would allow CPU architectures to be used in tandem. For example, ARM executables could be run on the same die (not the same core) as x86. Or, if one is allowed to "import" old CPU architectures, one could have one core running a SPARC domain, a POWER LPAR, a couple VMs under vSphere, and be playing Dungeon Master for the Amiga with true 68k emulation and timings on the console.
It also might allow for CPU architectures to vary by task. For example, one executable type might need more registers than another, so it can be handed additional registers, something that would be impossible without a technology like this.
What might be interesting is having cores reprogram to a different CPU architecture for security specific code. For example, extremely security critical stuff is better off running on a Harvard architecture machine where code and data are stored separately. Done right, it would help stomp most basic issues with code.
It can also help to enforce security on virtual machines (JVM, Dalvik), to ensure that some software failure would not mean that the VM could be used as a stepping stone to gain a complete user context.
use a tiny voltage to toggle between 'on' and 'off.'
LOL
Electronics 101: Transistors are current switched devices.
transistors must be hard-wired into the chips
LOL
That comment just speaks for itself. Friggin softies.
A pox on web designers who feel that window.innerWidth == screen.availWidth
You know the material of the shield doesn't matter, when someone suggests it as a possibility.
Some of the transistors wanted to become the new type, but then changed their mind and wanted to be hard wired, then changed their minds again ... in the end we decided they were flip flops!
Sure enough, the cow costume was hanging up next to the superhero outfit and sailors uniform. (S,Spud)