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Warning At SC13 That Supercomputing Will Plateau Without a Disruptive Technology

Posted by Unknown on from the series-of-nanotubes dept.

dcblogs writes "At this year's supercomputing conference, SC13, there is worry that supercomputing faces a performance plateau unless a disruptive processing tech emerges. 'We have reached the end of the technological era' of CMOS, said William Gropp, chairman of the SC13 conference and a computer science professor at the University of Illinois at Urbana-Champaign. Gropp likened the supercomputer development terrain today to the advent of CMOS, the foundation of today's standard semiconductor technology. The arrival of CMOS was disruptive, but it fostered an expansive age of computing. The problem is 'we don't have a technology that is ready to be adopted as a replacement for CMOS,' said Gropp. 'We don't have anything at the level of maturity that allows you to bet your company on.' Peter Beckman, a top computer scientist at the Department of Energy's Argonne National Laboratory, and head of an international exascale software effort, said large supercomputer system prices have topped off at about $100 million 'so performance gains are not going to come from getting more expensive machines, because these are already incredibly expensive and powerful. So unless the technology really has some breakthroughs, we are imagining a slowing down.'" Although carbon nanotube based processors are showing promise (Stanford project page; the group is at SC13 giving a talk about their MIPS CNT processor).

118 comments

  1. Work smarter, not harder. by Anonymous Coward · · Score: 1

    Coding to make best use of resource.

    Moving to clockless.

    Minimal use processors (custom ASIC).

    Live with it. Sometimes you may have to wait Seven. And a Half (what? not till next week?) Million Years for your answer. It may be a tricky problem.

    1. Re:Work smarter, not harder. by K.+S.+Kyosuke · · Score: 2

      Moving to clockless.

      Chuck Moore-style?

      Minimal use processors

      That doesn't make sense. Or rather, makes multiple possible senses at once. Could you elaborate on what in particular do you have in mind?

      --
      Ezekiel 23:20
    2. Re:Work smarter, not harder. by Anonymous Coward · · Score: 0

      My guess the next tech breakthrough will be in the interconnect. A lot of these supercomputers use hyper-dimensional topologies to put resources into groups where message passing doesn't have to deal with long distances. But a lot of that has to do with making the software work with these topologies. Before a computer gets ranked, much time is spend to optimize Linpack for their particular setup.

    3. Re:Work smarter, not harder. by Anonymous Coward · · Score: 1

      That doesn't make sense. Or rather, makes multiple possible senses at once. Could you elaborate on what in particular do you have in mind?

      I believe he was referring to building the processor for the task - getting rid of unnecessary gates, prioritizing certain operations over others, etc, based on the research being done. An example are the custom machines available for mining bitcoins now - prioritize running integer hashes, get rid of all the junk you don't need(high memory, floating point processors to name a couple).

    4. Re:Work smarter, not harder. by mlts · · Score: 3, Interesting

      I wonder if the next breakthrough would be using FPGAs and configuring the instruction set for the task at hand. For example, a core gets a large AES encryption task, so it gets set to an instruction set optimized for array shifting. Another core gets another job, so shifts to a set optimized for handling trig functions. Still another set deals with large amounts of I/O, so ends up having a lot of registers to help with transforms, and so on.

      Of course, fiber from chip to chip may be the next thing. This isn't new tech (the PPC 603 had this), but it might be what is needed to allow for CPUs to communicate closely coupled, but have signal path lengths be not as big an engineering issue. Similar with the CPU and RAM.

      Then there are other bottlenecks. We have a lot of technologies that are slower than RAM but faster than disk. Those can be used for virtual memory or a cache to speed things up, or at least get data in the pipeline to the HDD so the machine can go onto other tasks, especially if a subsequent read can fetch data no matter where it lies in that I/O pipeline.

      Long term, photonics will be the next breakthrough that propels things forward. That and the Holy Grail of storage -- holographic storage, which promises a lot, but has left many a company (Tamarak, InPhase) on the side of the road, broken and mutilated without mercy.

    5. Re:Work smarter, not harder. by solidraven · · Score: 1

      Clockless isn't a very good idea, designing such a large asynchronous system with current CMOS technology is going to end in a big disaster.

    6. Re:Work smarter, not harder. by Jane+Q.+Public · · Score: 3, Interesting

      "Of course, fiber from chip to chip may be the next thing. This isn't new tech (the PPC 603 had this), but it might be what is needed to allow for CPUs to communicate closely coupled, but have signal path lengths be not as big an engineering issue. Similar with the CPU and RAM."

      Fiber from chip to chip is probably a dead end, unless you're just primarily taking advantage of the speed of serial over parallel buses.

      The problem is that you have to convert the light back to electricity anyway. So while fiber is speedier than wires, the delays (and expense) introduced at both ends limits its utility. Unless you go to actual light-based (rather than electrical) processing on the chips, any advantage to be gained there is strictly limited.

      Probably more practical would be to migrate from massively parallel to faster serial communication. Like the difference between old parallel printer cables to USB. Granted, these inter-chip lineswould have to be carefully designed and shielded (high freq.), but so do light fibers.

    7. Re:Work smarter, not harder. by mikael · · Score: 1

      FPGA's are slower than ASIC's. And an ASIC processor can always be made to be programmable. Beyond ASIC's are systems-on-a-chip: memory, CPU, vector processing, internetworking all on one chip. Perhaps even thousands of cores and blocks of shared memory everywhere.

      Moving to optical computing seems to be the most likely move, unless something completely different comes in - maybe processors could store bits in electromagnetic fields between electrodes rather than that actual moving electrons. There was some research going on into magnetic storage that used individual magnetic vortices to store bits rather than millions of atoms. So it would seem logical that they could extend that to logic gates.

      --
      Vintage computer adverts: http://www.vintageadbrowser.com/computers-and-software-ads
    8. Re:Work smarter, not harder. by Anonymous Coward · · Score: 0

      The idea of going clockless was also known as asychnronous computing. Each logic block would go at it's own speed, ramping up clock speed when demand required it, otherwise just slowing down or switching off completely. It was an idea modeled after the way the brain worked.

    9. Re:Work smarter, not harder. by symbolset · · Score: 3, Funny

      Assume a spherical data center...

      --
      Help stamp out iliturcy.
    10. Re:Work smarter, not harder. by marcosdumay · · Score: 1

      Yes, and that's a great idea for mobile computers (maybe it'll be the next big thing there some time). It's just not that usefull for surpercomputing... still usefull, but not revolutionary.

      The problem is that supercomputers are made with the best of mass produced chips. You are already discharging the processors that can't run at top speed, and you already designed their pipeline in a way where variation in instruction times won't reduce your throughput. This way, all that you can gain from asynchronous chips is the variation that you ignored at the above optimizations because it was too small.

      --
      Rethinking email
    11. Re:Work smarter, not harder. by buswolley · · Score: 1

      Considering how disruptive computer power AI is becoming, a temporary slow down can be good for us...To give us time to adapt, put in place controls, and decide on a future without need for human labor

      --

      A Good Troll is better than a Bad Human.

    12. Re:Work smarter, not harder. by geekoid · · Score: 1

      Yeah, you try to create some laws to govern a speculative future.
      Could you imagine writing regulation for the internet in 1950?
      You can't regulate until after something is in the wild, otherwise it will fail horrible.

      --
      The Kruger Dunning explains most post on /. http://en.wikipedia.org/wiki/Dunning%E2%80%93Kruger_effect
    13. Re:Work smarter, not harder. by glueball · · Score: 1

      FPGA's are slower than ASIC's

      Not to market they aren't. And post-production reprogramming is a problem for ASICs.

    14. Re:Work smarter, not harder. by Blaskowicz · · Score: 1

      Probably more practical would be to migrate from massively parallel to faster serial communication. Like the difference between old parallel printer cables to USB. Granted, these inter-chip lineswould have to be carefully designed and shielded (high freq.), but so do light fibers.

      Did that happen already? Hypertransport looks like a serial bus, and Intel's QPI is much of the same thing. Likewise PCIe replaced PCI, like your printer cable exemple. All those buses are "serial, but you use multiple lanes anyway" though.

    15. Re:Work smarter, not harder. by buswolley · · Score: 1

      I meant a cultural adaption. Things are changing very very very quickly now, even within a single generation.

      --

      A Good Troll is better than a Bad Human.

    16. Re:Work smarter, not harder. by Blaskowicz · · Score: 2

      This makes me think of the Cray, nice-looking cylinder shape with a big mess of small wires inside. Or that video a while back where people were time-lapse wiring a cluster with lots of colored cables, in the center of it.

    17. Re:Work smarter, not harder. by strack · · Score: 1

      i like how you used the word 'cultural' in place of 'all this newfangled tech is scaring the olds, slow down a bit dagnammit'

    18. Re:Work smarter, not harder. by Jane+Q.+Public · · Score: 1

      Did that happen already? Hypertransport looks like a serial bus, and Intel's QPI is much of the same thing. Likewise PCIe replaced PCI, like your printer cable exemple. All those buses are "serial, but you use multiple lanes anyway" though.

      Yeah, because of that last part they're really not "serial". They're called serial because each device communicates independently (rather than a common shared bus like PCI), but the data packets are actually sent in parallel. So technically they're not serial at all, except for PCIe x 1, because its "bus" is only 1 bit wide.

    19. Re:Work smarter, not harder. by Anonymous Coward · · Score: 0

      Yeah, because of that last part they're really not "serial". They're called serial because each device communicates independently (rather than a common shared bus like PCI), but the data packets are actually sent in parallel. So technically they're not serial at all, except for PCIe x 1, because its "bus" is only 1 bit wide.

      You are picking nits and inventing your own terminology and taxonomy. Extending your logic, parallel buses aren't parallel either, because they are actually bus-wide-word serial! Parallel or serial is determined by the smallest unit of information that is transferred across the transfer medium at the time, and PCIe isn't dividing single data unit transfer across its lanes. IOW, if you are sending single word across multi-lane PCIe, only a single lane is used.

    20. Re:Work smarter, not harder. by CastrTroy · · Score: 1

      We already have this to an extent. Even something as simple as your phone has special hardware for decoding and encoding video. It has special hardware for doing AES calculations It has special hardware for doing 3D graphics rendering. The new iPhone has a processor dedicated to processing the motion information from the accelerometers. As hardware shrinks, it will be more and more feasible to have dedicated hardware for more tasks.

      --

      Anthropic principle: We see the universe the way it is because if it were different we would not be here to see it.
    21. Re:Work smarter, not harder. by Jane+Q.+Public · · Score: 1

      "You are picking nits and inventing your own terminology and taxonomy. Extending your logic, parallel buses aren't parallel either, because they are actually bus-wide-word serial! Parallel or serial is determined by the smallest unit of information that is transferred across the transfer medium at the time, and PCIe isn't dividing single data unit transfer across its lanes. IOW, if you are sending single word across multi-lane PCIe, only a single lane is used."

      Sorry, but it's not ME who's defining my own terms. You are trying to re-define serial.

      Wikipedia says it nicely: the data in packets are striped across the lanes. Which means the bits are being sent in parallel... but that doesn't mean a whole word is being sent all at once.

      What I meant to state earlier, but it accidentally got left out of my comment, is that PCIe is a hybrid of serial and parallel technologies. I did say it isn't serial. But I didn't claim it was parallel! It isn't parallel either. It's a combination of both technologies.

    22. Re:Work smarter, not harder. by Agripa · · Score: 1

      They are serial in respect to how the data has to be reassembled to compensate bit skew at the receiver. With a parallel bus the bit skew is less than the bit timing so all bits can be latched simultaneously from the same clock. With a serial bus like HT, QPI, the wider versions of PCIe, and more recent DRAM buses, the bit skew is greater than the bit timing so each lane has to have its own phased locked clock signal and assembling all of the bits together happens at a later stage. In practice either a clock embedded in each data line is used or a synchronous clock line for each small group of data lines but in the later case skew compensation is often still needed.

  2. MIPS CNT... by motd2k · · Score: 5, Funny

    MIPS CNT... how do you pronounce that?

    1. Re:MIPS CNT... by Flere+Imsaho · · Score: 1

      MIPS CNT... how do you pronounce that?

      MIPS CNT - do you even beowulf? SPECint me IRL!

      --
      It gripped her hand gently. 'Regret is for humans,' it said.
  3. Breakthroughs are there. by Anonymous Coward · · Score: 0

    Quantum/optical computing is going from impossible to possible within 1 decade. Is it really a "slowdown" or just a few years of lag time? We'll see.

  4. So what? by Animats · · Score: 2, Interesting

    So what? Much of supercomputing is a tax-supported boondoggle. There are few supercomputers in the private sector. Many things that used to require supercomputers, from rocket flight planning to mould design, can now be done on desktops. Most US nuclear weapons were designed on machines with less than 1 MIPS.

    Supercomputers have higher cost/MIPS than larger desktop machines. If you need a cluster, Amazon and others will rent you time on theirs. If you're sharing a supercomputer, and not using hours or days of time on single problems, you don't need one.

    1. Re:So what? by Anonymous Coward · · Score: 5, Insightful

      There are actually a half-decent number of 'supercomputers' -depending on how you define that term- in the private sector. From 'simple' ones that do rendering for animation companies to ones that model airflow for vehicles to ones that crunch financial numbers to.. well, lots of things, really. Are they as large as the biggest National faciltiies? Of course not - that's where the next generation of business-focused systems get designed and tested and models and methods get developed and tested.

      It is indeed the case that far simpler systems ran early nuclear weapon design, yes, but that's like saying far simpler desktops had 'car racing games' -- when, in reality, the quality of those applications has changed incredibly. Try playing an old racing game on a C64 vs. a new one now and you'd probably not get that much out of the old one. Try doing useful, region-specific climate models with an old system and you're not going to get much out of it. Put a newer model with much higher resolution, better subgrid models and physics options, and the ability to accurately and quickly do ensemble runs for a sensitivity analysis and, well, you're in much better territory scientifically.

      So, in answer to "So what?", I say: "Without improvements in our tools (supercomputers), our progress in multiple scientific -and business- endeavors slows down. That's a pretty big thing."

    2. Re:So what? by fuzzyfuzzyfungus · · Score: 1

      "If you need a cluster, Amazon and others will rent you time on theirs."

      You come from the planet where all algorithms parallelize neatly, eh? I've heard that they've cured the common cold and the second law of thermodynamics there, too...

    3. Re:So what? by Kjella · · Score: 4, Interesting

      Of course these people are using talking about supercomputers and the relevance to supercomputers, but you have to be pretty daft to not see the implications for everything else. In the last years almost all the improvement have been in power states and frequency/voltage scaling, if you're doing something at 100% CPU load (and isn't a corner case to benefit from a new instruction) the power efficiency has been almost unchanged. Top of the line graphics cards have gone constantly upwards and are pushing 250-300W, even Intel's got Xeons pushing 150W not to mention AMD's 220W beast, though that's a special oddity. The point is that we need more power to do more and for hardware running 24x7 that's a non-trivial part of the cost that's not going down.

      We know CMOS scaling is coming to an end, maybe not at 14nm or 10nm but at the end of this decade we're approaching the size of silicon atoms and lattices. There's no way we can sustain the current rate of scaling in the 2020s. And it wouldn't be the end of the world, computers would go roughly the same speed they did ten or twenty years ago like cars and jet planes do. Your phone would never become as fast as your computer which would never become as fast as a supercomputer again. We could get smarter at using that power of course, but fundamentally hard problems that require a lot of processing power would go nowhere and it won't be terahertz processors, terabytes of RAM and petabytes of storage for the average man. It was a good run while it lasted.

      --
      Live today, because you never know what tomorrow brings
    4. Re:So what? by Anonymous Coward · · Score: 0
      There are a lot of supercomputers in the private sector, although most of them don't bother submitting rankings to something like the top 500 list. Oil companies in particular have some really large machines, along with various simulation software used by some large aircraft and computer chip designing companies. Some companies are now trying to get into engineered materials and that requires substantial resources to simulate atomic structures of materials and derive macroscopic properties.

      Supercomputers have higher cost/MIPS than larger desktop machines.

      Well duh, the same as semi-trucks and sports cars have a higher post per mile than a typical family car. They do different things and are optimized for different problems though. If you have a problem that needs a cluster, then you build a cluster. A lot of universities have clusters of varying size for problems that don't need as much communication between processes as in supercomputers. They just don't end up in the news as much as they are relatively boring, but still important for both research and education.

    5. Re:So what? by unixisc · · Score: 1

      I somewhat agree w/ this. For the applications that do need supercomputers, they should really work on escalating the levels of parallelism within them. After that, just throw more CPUs at the problem. Indeed, that's the way Intel managed to wipe RISC out of the market.

      Also, as others pointed out, improve the other bottlenexts that exist there - the interconnects and that sort of thing. We don't need to move out of CMOS to solve a problem facing a fringe section of the market.

    6. Re:So what? by Anonymous Coward · · Score: 2, Interesting

      Actually, the sort-of sad reality is that, outside the top few supercomputers in the world, the "top500" type lists are completely bogus because they don't include commercial efforts who don't care to register. Those public top-cluster lists are basically where tax-supported-boondoggles show off, but outside the top 5-10 entries (which are usually uniquely powerful in the world), the rest of the list is bullshit. There are *lots* (I'd guess thousands) of clusters out there that would easily make the top-20 or top-50 list of the public clusters, that are just undocumented publicly. So yes, "supercomputing"-level clusters are in wide commercial use. I know for a fact I've worked at two different companies in the past in this situation. One had a bit over 10K Opterons in a single datacenter wired up with Infiniband doing MPI-style parallelism, and this was back in like ... I want to say about 2005? They were using it to analyze seismic data to find oil. Never showed up on any list of supercomputers anywhere, like almost all commercial efforts.

    7. Re:So what? by Anonymous Coward · · Score: 0

      You come from the planet where all algorithms parallelize neatly, eh? I've heard that they've cured the common cold and the second law of thermodynamics there, too...

      Yes, it's really wonderful here. Unfortunately we have decided not to share our science and technology with Earthlings, it's for your own good. But we do give you this.

    8. Re:So what? by whoever57 · · Score: 1

      We know CMOS scaling is coming to an end, maybe not at 14nm or 10nm but at the end of this decade we're approaching the size of silicon atoms and lattices.

      I have heard that statement made many times since about the mid-80s or at the very latest, early '90s -- not the exact size, but the prediction of the imminent end to CMOS scaling. Perhaps it is true now, as we approach single molecule transistors.

      --
      The real "Libtards" are the Libertarians!
    9. Re:So what? by interkin3tic · · Score: 1

      I'd argue that most scientific progress doesn't depend on supercomputers, and anything we know we can use supercomputers for, we can do with current computers, it will just take longer. Aside from the science of making more powerful computers I suppose. Protein folding, for example, could go faster, but it's already going.

      This is not to say I don't think we should be content with the computers we have now, just saying it doesn't seem too catastrophic to science. And buisiness seems to make money no matter what. They'll be able to sell people new computers one way or another. "THIS version of the mac book... uh... IS YELLOW!!!!"

    10. Re:So what? by geekoid · · Score: 2

      "... current rate of scaling in the 1980s err 1990 err 2000, definitely 2000 err 2010.. I know; definitely 2020.

      --
      The Kruger Dunning explains most post on /. http://en.wikipedia.org/wiki/Dunning%E2%80%93Kruger_effect
    11. Re:So what? by whoever57 · · Score: 1

      You come from the planet where all algorithms parallelize neatly, eh? I've heard that they've cured the common cold and the second law of thermodynamics there, too...

      Because supercomputers are not massively parallel computers ... Oh wait....

      --
      The real "Libtards" are the Libertarians!
    12. Re:So what? by fuzzyfuzzyfungus · · Score: 3, Informative

      They have no choice in the matter, since nobody makes 500GHz CPUs; but there is a reason why (many, not all) 'supercomputers' lay out a considerable amount of their budget for very fast, very low latency, interconnects (myrinet, infiniband, sometimes proprietary fabrics for single-system-image stuff), rather than just going GigE or 10GigE and calling it a day, like your generic datacenter-of-whitebox-1Us does.

      There are problems where chatter between nodes is low, and separate system images are acceptable, and blessed are they, for they shall be cheap; but people don't buy the super fancy interconnects just for the prestige value.

    13. Re:So what? by lgw · · Score: 2

      Yes, the difference now is reaching the limits of physics, and even with something better than CMOS there's not much headroom. There's only so much state you can represent with one atom, and we're not that far off.

      I think the progress we'll see in the coming decades will be very minor in speed of traditional computers, significant in power consumption, and huge in areas like quantum computing, which are not incremental refinements of what we're so good at today.

      Our tools are nearly as fast as they reasonably can be, but that's not to say there aren't important gains to be had from different kinds of tools.

      --
      Socialism: a lie told by totalitarians and believed by fools.
    14. Re:So what? by Miamicanes · · Score: 1

      Exactly. Thanks to atomic uncertainty, we're rapidly approaching the point where CPUs are going to need 3 or more pipelines executing the same instructions in parallel, just so we can compare the results and decide which result is the most likely to be the RIGHT one.

      We're ALREADY at that point with flash memory. Unlike SRAM, which is unambiguously 0 or 1, SLC flash is like a leaky bucket that starts out full (1), gets instantly drained to represent 0, and otherwise leaks over time, but still counts as '1' as long as it's not empty. MLC flash is even worse... one bucket represents 2 or more bits, so the amount that can leak away without corrupting the value is even less. Twenty years from now, CPUs will be the same way... 16 times the transistors, but maybe 4x the performance of today if we're lucky, because the transistors will be so small, they'll occasionally get "stuck" or "leak", and CPUs will need additional logic to determine when it happens and transparently fix it when it does (we might even be at that point already to some extent).

    15. Re:So what? by Anonymous Coward · · Score: 0

      With respect, I think you're stuck on the current mode of thinking. Everything you say is certainly true so long as you apply the standard CPU design ideas.

      What am I talking about? OK, by way of analogy. In the field of wireless transmission, multi-path signals were considered 'distortion' or worse, for decades. The multiple paths were typically the result of signal reflections and those were clearly noise to be vigorously tuned out, toned down, suppressed or ignored. Clearly.

      Then the WiFi alliance realized that multi-path signals could be exploited to increase data transmission rates. This was a major change of perspective. Cue the entrance of MIMO signalling.

      Many of the effects you mention are the result of quantum effects becoming apparent, as transistor feature sizes shrink. Burying quantum effects with statistically significant numbers of electrons is becoming, well is on the horizon to be, impractical.

      However we already have a nascent field of quantum computing. It's early days yet but the promise is exciting. What if those quantum effects, rather than being viewed as a 'problem', are in fact a huge opportunity? We'll need to learn how to harness quantum logic in the real world. We're talking about mass market products, small and power efficient, cheap enough to produce in the millions.

      Suddenly Moore's law kicks in again. Smaller transistor sizes would promote quantum effects, whereas larger features suppress them. Quantum superpositions allow quantum transistors to represent many logic states simultaneously. You can break the relationship where 1 transistor = 1 bit (a simplification of course). Enter the qubit.

    16. Re:So what? by Anonymous Coward · · Score: 0

      I would say you don't know what you're talking about.

    17. Re:So what? by Kjella · · Score: 1

      A single silicon lattice is about 0.55nm across, so at 32nm like we had at the start of this decade you're talking about 58 lattices wide. At 5nm (what Intel's roadmap predicts in 2019) you're down to 9 wide, keep that up to 2030 and you're down to 1.5 lattices wide. I guess the theoretical limit is a single lattice, but then you need perfect purity and perfect alignment of every atom of that processors or true nanotechnology in other words. We will probably run into problems earlier with quantum effects and current leakage, but either way by the end of the next decade we're definitively done.

      --
      Live today, because you never know what tomorrow brings
    18. Re:So what? by Anonymous Coward · · Score: 0

      It is high time for another technological revolution in electronics. It's been roughly four decades between invention of vacuum valve triode and invention of solid state transistor, but we haven't had technological breakthrough of such magnitude since. Right, there was invention of silicon planar technology and integrated circuits, but that were just refinements of semiconductor technology. If semiconductors didn't caught our attention, industry would probably gone on to miniaturize and flatten valves, probably replacing thermionic emission cathodes with, e.g. photo-effect emission ones, down to scales, and using manufacturing technology of todays micromachines. Therefore, I stand by the claim that we are well past due term for Next Big Thing in electronics.

  5. Does disruptive mean affordable? by UnknownSoldier · · Score: 4, Interesting

    We've had Silicon Germanium cpus that can scale to 1000+ GHz for years. Graphene is also another interesting possibility.

    The question is that "At what price can you make the power affordable?"

    For 99% of people, computers are good enough. For the other 1% they never will be.

    1. Re:Does disruptive mean affordable? by bluefoxlucid · · Score: 1

      Yeah, SOS-CMOS like SOG-CMOS or SOD-CMOS. You can't have a data core without SOD-CMOS.

      --
      Support my political activism on Patreon.
    2. Re:Does disruptive mean affordable? by Anonymous Coward · · Score: 1

      We've had Silicon Germanium cpus that can scale to 1000+ GHz for years.

      Not really. We've had transistors that can get almost that fast... no one builds a CPU with those, for good reasons. It's not a question of cost.

    3. Re:Does disruptive mean affordable? by green+is+the+enemy · · Score: 2

      The problem is heat. Simple as that. Currently there are no technologies more power efficient than CMOS. Therefore there are no technologies that can produce more powerful computers than CMOS. If a significantly more power-efficient technology is found, the semiconductor manufacturers will absolutely attempt to use it.

    4. Re:Does disruptive mean affordable? by K.+S.+Kyosuke · · Score: 2

      Do they also scale thermally? It is ultimately a problem of computations per joule, not a problem of computations per second. Supercomputers already have to use parallel algorithms, so building faster ones is about how much computing power can you squeeze into a cubic meter without the machine catching fire. That's actually the other reason why CMOS is being used, and not, e.g., ECL. ;-)

      --
      Ezekiel 23:20
    5. Re:Does disruptive mean affordable? by triffid_98 · · Score: 1

      No, they can't. We've known that for some time...and this is why.

    6. Re:Does disruptive mean affordable? by mlts · · Score: 2

      I'd say computers are good enough for today's tasks... but what about tomorrow's?

      With the advent of harder hitting ransomware, we might need to move to better snapshotting/backup systems to preserve documents against malicious overwrites which are made worse with SSD (TRIM zeroes out stuff, no recovery, no way.)

      Network bandwidth also is changing. LANs are gaining bandwidth, while WANs are stagnant. So, caching, CDN services, and such will be needing to improve. WAN bandwidth isn't gaining anything but more fees here in the US.

      Right now, the basic computer is sort of stagnant, but if fast WAN links become usable, this can easily change.

    7. Re:Does disruptive mean affordable? by Anonymous Coward · · Score: 0

      Bullshit. We have fancy material TRANSISTORS that SWITCH at terahertz speeds and even then, only when cooled to around absolute zero. This doesn't mean you can just connect it all together and expect a CPU to run 2 magnitudes faster than current CPUs. Money doesn't trump physics.

    8. Re:Does disruptive mean affordable? by fuzzyfuzzyfungus · · Score: 4, Informative

      Even if you are willing to burn nigh unlimited power, thermals can still be a problem (barring some genuinely exotic approaches to cooling), because ye olde speed of light says that density is the only way to beat latency. There are, of course, ways to suck at latency even more than the speed of light demands; but there are no ways to suck less.

      If your problem is absolutely beautifully parallel (and, while we're dreaming, doesn't even cache-miss very often), horrible thermals would be a problem that could be solved by money: build a bigger datacenter and buy more power. If there's a lot of chatter between CPUs, or between CPUs and RAM, distance starts to hurt. If memory serves, 850nm light over 62.5 micrometer fiber is almost 5 nanoseconds/meter. That won't hurt your BattleField4 multiplayer performance; but when even a cheap, nasty, consumer grade CPU is 3GHz, there go 15 clocks for every meter, even assuming everything else is perfect. Copper is worse, some fiber might be better.

      Obviously, problems that can be solved by money are still problems, so they are a concern; but problems that physics tells us are insoluble are even less fun.

    9. Re:Does disruptive mean affordable? by fuzzyfuzzyfungus · · Score: 2

      Arguably, WAN bandwidth (except wireless, where the physics are genuinely nasty) is mostly a political problem with a few technical standards committees grafted on, rather than a technical problem.

      Even without much infrastructure improvement, merely scaring a cable company can, like magic, suddenly cause speeds to increase to whatever DOCSIS level the local hardware has been upgraded to, even as fees drop. Really scaring them can achieve yet better results, again without even driving them into insolvency, however much they might deserve it...

    10. Re:Does disruptive mean affordable? by Anonymous Coward · · Score: 0
      "We've had Silicon Germanium cpus that can scale to 1000+ GHz for years."

      We do? Can you provide a source for this astounding claim? I have the feeling that Slashdot has a number of "technology conspiracy theorists" that truly have no clue whatsoever what they're talking about.

    11. Re:Does disruptive mean affordable? by Meditato · · Score: 1

      Terahertz circuitry exists, it's just stupidly expensive to produce and cool, and plus performance isn't just about clock speed. Pipelining and memory access speed play into it a great deal.

    12. Re:Does disruptive mean affordable? by lgw · · Score: 1, Interesting

      Light-carrying fiber is slower than copper (5ns/m vs 4 for copper) - it sort of has to be, as the higher impedance goes hand-in-hand with the need for total internal reflection at the boundary of the clear plastic. Optical helps with band-width-per-strand, not with latency.

      I think the next decade of advances will be very much about power efficiency, and very little about clock rate on high-end CPUs. That will benefit both mobile and supercomputers, as power are power-constrained (supercomputers by the heat rather than the raw power, but it works out to the same thing).

      --
      Socialism: a lie told by totalitarians and believed by fools.
    13. Re:Does disruptive mean affordable? by UnknownSoldier · · Score: 1

      Unfortunately you won't find civilian documents as that information is classified.

      One of my best friends used to work for the Army. He observed that their tech was constantly about 20+ years ahead of the available civilian technology. i.e. When civilians had 1 MHz CPUs the Army was _already_ using 100 MHz CPUs; when civilians were using 100 MHz the Army was already on 1 GHz. My friend also mentioned they had MASSIVE (and expensive) cooling to drive the temperature down as low as possible in order to achieve high speeds. The sky is pretty much the limit when you have access to near "unlimited" R&D funds.

      The army abandoned Silicon for high-speed computing decades ago primarily due to the 5 GHz "Wall". *That* is the primary reason Intel and AMD stopped talking about the "GHz wars" because they didn't want to expose the white elephant in the room. So not very practical (or affordable) from a consumer's point of view but similar to how the "enthusiast" will overclock a desktop CPU that normally craps out at ~ 5 GHz to hit 8.429 GHz long enough to run CPUZ and take a screenshot. It is entirely possible to push "conventional" electronics WAY beyond their means when you dive deep down into near absolute zero temperature.

      No "technology conspiracy theorists" required -- just 2nd information based on facts. Go to an Army surplus store sometime; you will find various gear (especially Night Vision) that used to be outlawed at the civilian level at one point but is now available.

      Technology marches forward -- for some, just a little faster and sooner then others. :-)

  6. If only by Anonymous Coward · · Score: 0

    If only there was some newer technology to save us! Maybe something using light and quantum super states... idk... crazy talk...

  7. My inner grammar nazi says by MikeTheGreat · · Score: 1

    that this is not a complete sentence:
    "Although carbon nanotube based processors are showing promise [...]."

    Go, speed-editor, go! :)

    1. Re:My inner grammar nazi says by K.+S.+Kyosuke · · Score: 1

      That sentence was just a lab sample.

      --
      Ezekiel 23:20
  8. on the nature of disruptive... by schlachter · · Score: 4, Insightful

    my intuition tells me that disruptive technologies are precisely that because people don't anticipate them coming along nor do they anticipate the changes that will follow their introduction. not that people can't see disruptive tech ramping up, but often they don't.

    --
    My God can beat up your God. Just kidding...don't take offense. I know there's no God.
    1. Re:on the nature of disruptive... by BringsApples · · Score: 0

      It seems to me that any technological advancements that humans have "invented" is merely a fabrication of context, in order to do what Nature is already doing. Perhaps the next "super computers" will not be what we think of as computers, but more like biological structures that are able to process things without using mathematics, or bits at all. As if all aspects of mathematics will be inherently built into the structure itself.

      just a thought.

      --
      Politics; n. : A religion whereby man is god.
    2. Re:on the nature of disruptive... by bluefoxlucid · · Score: 1

      No, they're disruptive because they change what is technically possible. The ability to directly manipulate ambient energy would greatly change ... everything. I've got piles and piles of things we can do with quantum tunneling junctions, when they're refined enough--currently you get a slab with 1% of the area functional (it works, but it's overly expensive to manufacture and too large).

      Anticipating a new advance to produce multi-thousand-GHz processors for 15 years won't make them disruptive. We'll see sudden explosive CPU clock speed growth when they come into existence, and sudden new efforts to take advantage of it all.

      --
      Support my political activism on Patreon.
    3. Re:on the nature of disruptive... by fuzzyfuzzyfungus · · Score: 4, Interesting

      my intuition tells me that disruptive technologies are precisely that because people don't anticipate them coming along nor do they anticipate the changes that will follow their introduction. not that people can't see disruptive tech ramping up, but often they don't.

      Arguably, there are at least two senses of 'disruptive' at play when people talk about 'disruptive technology'.

      There's the business sense, where a technology is 'disruptive' because it turns a (usually pre-existing, even considered banal or cheap and inferior) technology into a viable, then superior, competitor to a nicer but far more expensive product put out by the fat, lazy, incumbent. This comment, and probably yours, was typed on one of those(or, really, a collection of those.)

      Then there's the engineering/applied science sense, where it is quite clear to everybody that "If we could only fabricate silicon photonics/achieve stable entanglement of N QBits/grow a single-walled carbon nanotube as long as we want/synthesize a non-precious-metal substitute for platinum catalysts/whatever, we could change the world!"; but nobody knows how to do that yet.

      Unlike the business case (where the implications of 'surprisingly adequate computers get unbelievably fucking crazy cheap' were largely unexplored, and before that happened people would have looked at you like you were nuts if you told them that, in the year 2013, we have no space colonies, people still live in mud huts and fight bush wars with slightly-post-WWII small arms; but people who have inadequate food and no electricity have cell phones), the technology case is generally fairly well planned out (practically every vendor in the silicon compute or interconnect space has a plan for, say, what the silicon-photonics-interconnect architecture of the future would look like; but no silicon photonics interconnects, and we have no quantum computers of useful size; but computer scientists have already studied the algorithms that we might run on them, if we had them); but application awaits some breakthrough in the lab that hasn't come yet.

      (Optical fiber is probably a decent example of a tech/engineering 'disruptive technology' that has already happened. Microwave waveguides, because those can be tacked together with sheet metal and a bit of effort, were old news, and the logic and desireability of applying the same approach to smaller wavelengths was clear; but until somebody hit on a way to make cheap, high-purity, glass fiber, that was irrelevant. Once they did, the microwave-based infrastructure fell apart pretty quickly; but until they did, no amount of knowing that 'if we had optical fiber, we could shove 1000 links into that one damn waveguide!' made much difference.)

    4. Re:on the nature of disruptive... by Anonymous Coward · · Score: 0

      most insightful comment on this thread.. receives a "1" score.. sheesh

  9. SOLUTION for CMOS "band gap" by kdawson+(3715) · · Score: 3, Interesting

    I suggest we go back a few levels and back to the 1970's when TTL was being replaced because of it's higher voltages. Remember back when core memory was replaced but before CMOSS? These were the TTL eras made by similar but NOT THE SAME transistors.

    1. Silicone bandgap of CMOSS is higher than TTL
    2. Gate length is more fabricable. (Fabricate the gates in Mexico; say they were made in USA)
    3. Drain has "quantum clogging" problems in TTL but not CMOSS
    4. Dopant levels make GaAs less commercially feasible.
    5. Wafer sizes still dominated by "silicon" technology. It is not cheaper to go to more e-toxic and alien technologies. Far cheaper to stick with the wafers commercially produced today. GaAs and Indium Phosphate are like communion wafers!!!
    6. Investors. We need to keep money at the fore front. Global depression is iminint. Must make cheep and available components with "WHAT WE HAVE" allready!!

    TTL. I think its a good idea.

    -KD

    1. Re:SOLUTION for CMOS "band gap" by Anonymous Coward · · Score: 0

      TTL: Because CPUs need 10x or more power consumption and massive amounts of switching noise.

    2. Re:SOLUTION for CMOS "band gap" by ebno-10db · · Score: 2

      Bah. You want to burn power? Try ECL. The lights dimmed when you turned it on, but on the bright side you could cook your breakfast on a chip. ECL people were also using decent transmission line layout techniques for PCB's back in the 60's - a few decades before other digital designers had to worry about it. For many years the MECL handbook was the standard reference for hi-speed digital PCB design.

    3. Re:SOLUTION for CMOS "band gap" by Agripa · · Score: 1

      Integrated and discrete ECL is still used where the lowest jitter is needed.

  10. MOD PARENT UP! by Anonymous Coward · · Score: 0

    As a silicon engineer, I beckon you to mod parent up.

  11. Didn't that boat sail with the Cray Y-MP? by tlambert · · Score: 2, Insightful

    Didn't that boat sail with the Cray Y-MP?

    All our really big supercomputers today are adding a bunch of individual not-even-Krypto-the-wonderdog CPUs together, and then calling it a supercomputer. Have we reached the limits in that scaling? No.

    We have reached the limits in the ability to solve big problems that aren't parallelizable, due to the inability to produce individual CPU machines in the supercomputer range, but like I said, that boat sailed years ago.

    This looks like a funding fishing expedition for the carbon nanotube processor research that was highlighted at the conference.

    1. Re:Didn't that boat sail with the Cray Y-MP? by timeOday · · Score: 3, Insightful

      All our really big supercomputers today are adding a bunch of individual not-even-Krypto-the-wonderdog CPUs together, and then calling it a supercomputer. Have we reached the limits in that scaling? No.

      This is wrong on both counts. First, the CPUs built into supercomputers today are as good as anybody knows how to make one. True, they're not exotic, in that you can also buy one yourself for $700 on newegg. But they represent billions of dollars in design and are produced only on multi-billion dollar fabs. There is no respect in which they are not lightyears more advanced than any custom silicon cray ever put out.

      Second, you are wrong that we are not reaching the limits of scaling these types of machines. Performance does not scale infinitely on realistic workloads. And budgets and power supply certainly do not scale infinitely.

    2. Re:Didn't that boat sail with the Cray Y-MP? by Anonymous Coward · · Score: 4, Informative

      The problem is that there are many interesting problems which don't parallelize *well*. I epmhasize *well* because many of these problems do parallelize, it's just that the scaling falls off by an amount that matters the more thousands of processors you add. For these sorts of problems (of which there are many important ones), you can take Latest_Processor_X and use it efficiently in a cluster of, say, 1,000 nodes, but probably not 100,000. At some point the latency and communication and whatnot just takes over the equation. Maybe for a given problem of this sort you can solve it 10 days on 10,000 nodes, but the runtime only drops to 8 days on 100,000 nodes. It just doesn't make fiscal sense to scale beyond a certain limit in these cases. For these sorts of problems, single-processor speed still matters, because they can't be infinitely scaled by throwing more processors at the problem, but they can be infinitely scaled (well, within information-theoretic bounds dealing with entropy and heat-density) by faster single CPUs (which are still clustered to the degree it makes sense).

      CMOS basically ran out of real steam on this front several years ago. It's just been taking a while for everyone to soak up the "easy" optimizations that were laying around elsewhere to keep making gains. Now we're really starting to feel the brick wall...

    3. Re:Didn't that boat sail with the Cray Y-MP? by Anonymous Coward · · Score: 0

      The problem is that there are many interesting problems which don't parallelize *well*.

      Do you have an actual example?

      Serious question here... I work in HPC. Not saying there aren't problems like that, just that too often people making comments like that just don't know anything about how to parallelize anything.

      Maybe for a given problem of this sort you can solve it 10 days on 10,000 nodes, but the runtime only drops to 8 days on 100,000 nodes.

      To nitpick, not only are your numbers unrealistic (though your point is well-taken), I believe that you probably mean 100,000 cores instead of 100,000 nodes... I don't know for sure, but I don't think that I've heard of any cluster with 100,000 nodes in existence, or even planned. Also, those large clusters that make the news are typically run mainframe-like, in that you don't use them all yourself, but there are many users, and you take a much smaller group of nodes.

      When you talk about running problems on the complete system, you actually get into hardware problems long before you hit software problems -- hardware failures are common enough that for some clusters, they have troubles running for long enough to finish the benchmarks to prove that they're as fast as they are.

    4. Re:Didn't that boat sail with the Cray Y-MP? by tlambert · · Score: 1

      First, the CPUs built into supercomputers today are as good as anybody knows how to make one.

      Well, that's wrong... we just aren't commercially manufacturing the ones we know how to make already.

      There is no respect in which they are not lightyears more advanced than any custom silicon cray ever put out.

      That's true... but only because you intentionally limited us to Si as the substrate. GaAs transistors have a switching speed around 250GHz, which is about 60 times what we get with absurdly cooled and over-clocked silicon.

    5. Re:Didn't that boat sail with the Cray Y-MP? by timeOday · · Score: 1

      Well, that's wrong... we just aren't commercially manufacturing the ones we know how to make already.

      What is missing?

    6. Re:Didn't that boat sail with the Cray Y-MP? by antifoidulus · · Score: 1

      Actually cost to fab custom chips is a huge impediment to getting faster(at least faster on Linpack) supercomputers. Both the Japanese entries that have grabbed the top spot in the past 10 years(earth simulator and the K-Computer) were actually custom jobs that added in extra vector CPUs. These machines were very fast but also very expensive to make because they had such small runs of CPUs. The K-computer was slightly better in this regard as it uses a bunch of SPARC CPUs with basically an extra vector unit bolted on, but it is still a custom CPU that needed to be custom fabled.

      It would be great for supercomputing if there were more commodity cpus that had multiple vector units per core, but unlike GPUs, where gamers subsidize a lot of the research, development, and production of high performance hardware, there is just no demand outside supercomputing for more than one vector unit per core on a CPU. So at least for the time being we may see the current pattern continue: someone will come up with the funding for a custom cpu that will have multiple vector units per core, leapfrog everyone else for a while, then eventually fall behind commodity hardware as they do not have the resources to continue developing their hardware designs for their very small customer base. Rinse and repeat.

      --
      Monstar L
    7. Re:Didn't that boat sail with the Cray Y-MP? by rubycodez · · Score: 1

      the attempts to make large chips and supercomputers failed spectacularly for good reason, even at the slow speeds of the early 1990s the stuff had to be in a bucket of coolant. that bad choice of GaAs made the cray 3 fail.

    8. Re:Didn't that boat sail with the Cray Y-MP? by timeOday · · Score: 1

      The XEON Phi has vastly greater SIMD capability than any Cray or SPARC architecture. In stock now.

    9. Re:Didn't that boat sail with the Cray Y-MP? by strikethree · · Score: 1

      And budgets and power supply certainly do not scale infinitely.

      Unless you are the NSA. ;)

      --
      "Someone needs to talk to the tree of liberty about its ghoulish drinking problem." by ohnocitizen
  12. It may not be necessary to be so large if clockles by Anonymous Coward · · Score: 0

    It may not be necessary to be so large if clockless.

  13. subtlety by green+is+the+enemy · · Score: 1
    A bit of humor in one of the linked articles?

    To eliminate the wire-like or metallic nanotubes, the Stanford team switched off all the good CNTs. Then they pumped the semiconductor circuit full of electricity. All of that electricity concentrated in the metallic nanotubes, which grew so hot that they burned up and literally vaporized into tiny puffs of carbon dioxide. This sophisticated technique was able to eliminate virtually all of the metallic CNTs in the circuit at once.

    Bypassing the misaligned nanotubes required even greater subtlety.

    ......

    1. Re:subtlety by Meneth · · Score: 1

      Yeah. "Sophisticated". :)

    2. Re:subtlety by ShoulderOfOrion · · Score: 1

      Wow. That's the same technique I use inadvertently in a lot of my circuits.

  14. Power and legacy codes by Orp · · Score: 2

    ... are the biggest problems from where I'm sitting here in the convention center in Denver.

    In short, there will need to be a serious collaborative effort between vendors and the scientists (most of whom are not computer scientists) in taking advantage of new technologies. GPUs, Intel MIC, etc. are all great only if you can write code that can exploit these accelerators. When you consider that the vast majority of parallel science codes are MPI only, this is a real problem. It is very much a nontrivial (if even possible) problem to tweak these legacy codes effectively.

    Cray holds workshops where scientists can learn about these new topologies and some of the programming tricks to use them. But that is only a tiny step towards effectively utilizing them. I'm not picking on Cray; they're doing what they can do. But I would posit that before the next supercomputer is designed, that it is done with input from the scientists who will be using it. There are a scarce few people with both the deep physics background and the computer science background to do the heavy lifting.

    In my opinion we may need to start from the ground up with many codes. But it is a Herculean effort. Why would I want to discard my two million lines of MPI-only F95 code that only ten years ago was serial F77? The current code works "well enough" to get science done.

    The power problem - that is outside of my domain. I wish the hardware manufacturers all the luck in the world. It is a very real problem. There will be a limit to the amount of power any future supercomputer is allowed to consume.

    Finally, compilers will not save us. They can only do so much. They can't write better code or redesign it. Code translators hold promise, but those are very complex.

    --
    A squid eating dough in a polyethylene bag is fast and bulbous, got me?
    1. Re:Power and legacy codes by fuzzyfuzzyfungus · · Score: 2

      "Why would I want to discard my two million lines of MPI-only F95 code that only ten years ago was serial F77? The current code works "well enough" to get science done."

      Out of genuine curiosity (I'm not nearly familiar enough with either the economics or the cultural factors involved), would the hardware vendors, rather than the scientists(who, are scientists, not computer scientists, and just want to get their jobs done, not become programmers, so aren't strongly motivated to change), be in a position to attack the legacy code problem?

      While a lot of academic code isn't FOSS in the techie sense (it may be in some way encumbered, it may just never have been formally released at all, it may be a total wreck, etc.), I'd assume that most of it isn't so secret that a deal couldn't be arranged to get specific people a look at it, even if under NDA.

      If I were somebody like Intel or Nvidia, would it ever be worth my time to attempt to juice hardware sales (especially someone like Nvidia, whose strongest product is rather unlike a standard-issue general-purpose CPU cluster) by selling the customer on a combined "We'll sell you 10,000 Tesla boards, and provide software engineers to rebuild 'cranky-oldschool-geophysics-sim' as an equivalent; but CUDA-aware, application."

      Doable? Far too expensive? Faces serious pushback from the old timer who knows how to make that ol' fortran dance? Code considered too valuable to risk disclosure? People would rather be locked into a ghastly mess that is at least old enough to be widely supported, rather than some new and possibly proprietary ghastly-mess-in-10-years?

    2. Re:Power and legacy codes by jabuzz · · Score: 1

      Interesting thought. I guess the answer is that for the small percentage of HPC users that code stuff, they need to keep updating the code as time goes by. So they might not want to learn CUDA/OpenCL etc.

      On the other hand in my experience most HPC users are using a preexisting application to do something like CFD, molecular dynamics etc. For these there are open source applications like OpenFOAM, NAMD etc. that it would make sense for Nvidia to throw engineering effort at to improve the GPU acceleration.

      The 1000 and 3500 core HPC systems I look after both have a GPU component. They are not widely used however at this point in time, though the few users that do use them use them heavily.

      Hum I think I will suggest this to Nvidia at the MEW24 next week.

    3. Re:Power and legacy codes by jd · · Score: 1

      A surprising amount is FOSS. I routinely get screamed at by irate scientists for listing their stuff of Freshm...freecode.

      --
      It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
  15. The Cray 4 by stox · · Score: 1

    was going to be gallium arsenide, but it never made it to market.

    --
    "To those who are overly cautious, everything is impossible. "
    1. Re:The Cray 4 by Anonymous Coward · · Score: 0

      The Cray 3 actually was GaAs. Years later, my MacBook Air is faster than it was. Life moves on.

  16. A lot of supercomputing motivated by bad science! by Theovon · · Score: 3, Interesting

    There are plenty of algorithms that benefit from supercomputers. But it turns out that a lot of the justification for funding super computer research has been based on bad math. Check out this paper:

    http://www.cs.binghamton.edu/~pmadden/pubs/dispelling-ieeedt-2013.pdf

    It turns out that a lot of money has been spent to fund supercomputing research, but the researchers receiving that money were demonstrating the need for this research based on the wrong algorithms. This paper points out several highly parallelizable O(n-squared) algorithms that researchers have used. It seems that these people lack an understanding of basic computational complexity, because there are O(n log n) approaches to the same problems that can run much more quickly, using a lot less energy, on a single-processor desktop computer. But they’re not sexy because they’re not parallelizable.

    Perhaps some honest mistakes have been made, it trends towards dishonestly as long as these researchers continue to use provably wrong methods.

  17. Re:Complete garbage by The+Master+Control+P · · Score: 4, Informative

    By definition, computers are scalable. Need more performance? Add more processing units/memory.

    BZZZT, WRONG.

    This is where you can stop reading, folks.

  18. Re:Complete garbage by geekoid · · Score: 0

    so adding more processing units/and memory doesn't mean more performance on a specialized machine design to have those added?
    Interesting..no wait, stupid, not interesting. My mistake.

    --
    The Kruger Dunning explains most post on /. http://en.wikipedia.org/wiki/Dunning%E2%80%93Kruger_effect
  19. Micronize by Tim12s · · Score: 2

    The next step has already started.

    Micronizing truely massive supercomputers is the next step for "applied sciences". We've gotten used to measuring data centres in power, I recon it will be computing power per cubic foot or something like that. It'll start with drones, then it will move to shipping and long haul robotics. After that it'll move to mining applications. I'm not talking about automating but rather truly autonomous applications that require massive computation for collision avoidance and programmed execution.

    At this point it'll be a race to redo the industrial age, albeit with micronized robotics. Again, already started with 3D printing.

    Hopefully by then someone figures out how to get off this rock.

    1. Re:Micronize by Anonymous Coward · · Score: 0

      If only the various parts of your post had anything to do with each other at all, or even followed on from the premise it started out with.
      Lay off the meth Timmy.

  20. The plateu of supercomputing is a good thing. by Anonymous Coward · · Score: 1

    That means there are hard limits to technology the NSA is using against us.

    1. Re:The plateu of supercomputing is a good thing. by rubycodez · · Score: 1

      they mostly just need storage, for later when they need dirt on any particular person

  21. Tianhe-2? by therealobsideus · · Score: 3, Informative

    Totally off topic, but I ended up getting drunk with a bunch of people that are here in town for SC13 last night. Those boys can drink. But I'm surprised that there wasn't more talk about Tianhe-2 there, and how Chinese is going to kick the US off the top 25 in international supercomputing.

    1. Re:Tianhe-2? by Anonymous Coward · · Score: 0

      The Tianhe-2 is a Linpack monster. I would be very surprised if it is as capable in running applications as several other supercomputers on the list. The Xeon Phi accelerator processors aren't easy to program and likely get very little actual use. Same goes for many systems beefed up with GPUs. Lots of macho-flops with little additional real work.

  22. Argh Moore's Law is Over! by Anonymous Coward · · Score: 1

    Yes, Moore's Law is just about over. Fortunately all signs point towards graphene transistors actually being workable within a decade. We can make them have a bandgap, we can produce ever larger crystals of pure graphene, we can isolate it from the environment to avoid contamination. We can, in labs, do everything needed to make graphene transistors already. Combining everything effectively and commercially may take a while, but it'll happen and by 2023 you'll be running your Google Glass v10's CPU at several hundred gigahertz with optical interconnects (which can already transition to graphene) with little heat and tons of battery life.

    1. Re:Argh Moore's Law is Over! by ebno-10db · · Score: 1

      Meanwhile in the software world we'll still be arguing Java vs. C++.

    2. Re:Argh Moore's Law is Over! by therealobsideus · · Score: 1

      BASIC is where it's at, you insensitive clod!

  23. Meetup by Anonymous Coward · · Score: 0

    Meetup is the world's largest network of local groups. Meetup makes it easy for anyone to organize a local group or find one of the thousands already meeting up face-to-face. More than 9,000 groups get together in local communities each day, each one with the goal of improving themselves or their communities.For more info , please visit http://www.meetup.com/

  24. Superconducting chips made from Niobium? by quax · · Score: 1

    D-Wave scaled up superconducting foundry output for their quantum chip, see no reason to not leverage this for conventional superconducting chips.

  25. Doesn't seem hard by jd · · Score: 1

    Intel's latest creations are basically x86-themed Transputers, which everyone (other than Intel) has been quite aware was inevitable. The only possible rival was processor-in-memory, but the research there has been dead for too long.

    Interconnects are the challenge, but Infiniband is fast and the only reason Lightfleet never got their system working is because they hired managers. I could match Infiniband speeds inside of a month, using a wireless optical interconnect, with a budget similar to the one they started with.

    Hard drives - you're doing it wrong. The drive should be battery-backed and have significant amounts of RAM on the controller. By significant, I mean enough to ensure that typical users will not be capable of distinguishing the hard drive from a RAM disk AND to ensure physical writes are delayed long enough that you maximize the number of writes that can be done as a sustained burst. (This reduces drive head movement, simultaneously making writes faster and drives longer-lasting.) Since this requires smart drives, you might as well have an OS on there. No sense wasting your main CPUs on filesystem work that can sensibly be offloaded.

    For chips, for chrissakes get with the picture! Wafer-scale integration is the only way to go! There was also recently talk of some new gallium compound-on-silicon approach, with the gallium compound providing the transistors, silicon the connections. Interesting, but the US has outsourced almost all chip manufacture. If they want the new materials, they'll need to train a new generation of engineers and build new plants. If they're going to do that anyway, go wafer-scale. The initial costs will be high, when using the new materials, so you might as well go for broke and make the new stuff just too damn good to not get.

    What's left? Ah yes, software. Easy. Pass a law stating that in order to get government funding, schools should teach Occam-pi and not Java. Big government? Too bad. Code quality out there is shite. The only way to fix that is to break bad code. Well, that or put the worst 10% of students likely to turn professional against the wall. However, that would produce a backlash. You could put bags of skittles in their pockets, I suppose.

    There. That's the supercomputer industry fixed for another couple of decades. Do I get paid for this?

    --
    It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
    1. Re: Doesn't seem hard by Anonymous Coward · · Score: 0

      no, you don't get paid. but you have pointed to the crux of the problem. all talk, no action.
      You see "developed" countries don't actually do anything anymore. except print and borrow money.

    2. Re: Doesn't seem hard by jd · · Score: 1

      I'd fix the problems myself, but that would mean risking being sued to oblivion by patent trolls. Most of what I outlined could be prototyped and demo'd in very short order, but if the return for my investment is financial death, what is the point?

      I'd be happy to give action, not words, in a rational, fair environment. We don't have one right now, and short of setting up an office in Antarctica (which has not signed any patent treaties), I don't see how I can make it viable to operate in the system we do have.

      --
      It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
  26. SC Centers have gotton cheap! by johnwerneken · · Score: 1

    50 years ago, state of the art was a billion dollars, equivalent to $25USD billion today. So they are .004 or 1/250 what they formerly cost. WTG Techies!

  27. We can build bigger than we can use. by markhahn · · Score: 1

    I'm not saying that lagging software is a problem: it's not. The problem is that there are so few real needs that justify the top, say, 10 computers. Most of the top500 are large not because they need to be - that is, that they'll be running one large job, but rather because it makes you look cool if you have a big computer/cock.

    Most science is done at very modest (relative to top-of-the-list) sizes: say, under a few hundred cores. OK, maybe a few thousand. These days, a thousand cores will take less than 32u, and yes, could stand beside your desk, though you'd need more than one normal office circuit and some pretty decent airflow. I think people lose touch with the fact that our ability to build very big machines, cheaply, filled with extremely fast cores. You read all that whinging about how we hit the clock scaling (dennard) wall around the P4 and life has been hell ever since - bullshit! Today's cores are lots faster, and you get a boatload more of them for the same dollar and watt. And that's if you stick with completely conventional x86_64/openmp/mpi tech, not delving into proprietary stuff like Cuda.

    People who watch the top of top500 closely are addicts of hero-numbers and hero-facilities. The fact is you can buy whatever position you want: just pay up. Certainly it's impressive how much effort goes into a top10 facility, but we should always be asking: what whole-machine job is going to run on it? IMO, the sweet spot for HPC is a few tens of racks - easy to find space, easy to manage, can provide enough resources for hundreds of researchers.

  28. Re:Complete garbage by Firethorn · · Score: 1

    I think what TMCP was trying to get at is that real-world performance depends on the tasks you're looking to do. Adding more hardware might 'always' work for benchmarks, but if your task isn't that parallelizable it won't improve your performance.

    It's sort of like how a while ago I'd buy a faster dual-core over quad cores - the games I played weren't written for multiple cores, but windows was smart enough to offload it's stuff to the other core, which still wasn't anything near fully utilized. I'd have actually been better off with a ~1Ghz 'control' CPU and a ~5Ghz 'game' CPU.

    Honestly, I figure that if we really hit a road-block hardware wise we'll start switching back to optimization. It's a known issue that our current generation software are bloated and inefficient. Rather than just develop and bolt-on new features, go back and optimize - With enough work I think you could make an Office suit that does everything current versions do with 1/4 the memory and CPU.

    --
    I don't read AC A human right
  29. Some disruptive solutions are... by Katatsumuri · · Score: 1

    3D chips, memristors, spintronics. I am surprised these are not mentioned prominently in this thread. I was hoping to hear about the latest advances in these areas from people in the industry.

    3D chips. As materials science and manufacturing precision advances, we will soon have multi-layered (starting at a few layers that Samsung already has, but up to 1000s) or even fully 3D chips with efficient heat dissipation. This would put the components closer together and streamline the close-range interconnects. Also, this increases "computation per rack unit volume", simplifying some space-related aspects of scaling.

    Memristors. HP is ready to produce the first memristor chips but delays that for business reasons (how sad is that!) Others are also preparing products. Memristor technology enables a new approach to computing, combining memory and computation in one place. They are also quite fast (competitive with the current RAM) and energy-efficient, which means easier cooling and possible 3D layout.

    Spintronics. Probably further in the future, but potentially very high-density and low-power technology actively developed by IBM, Hynix and a bunch of others. This one would push our computation density and power efficiency limits to another level, as it allows performing some computation using magnetic fields, without electrons actually moving in electrical current (excuse me for my layman understanding).

    Photonics was already mentioned by others here.