AMD Announces First ARM Processor

MojoKid writes "AMD's Andrew Feldman announced today that the company is preparing to sample its new eight-core ARM SoC (codename: Seattle). Feldman gave a keynote presentation at the fifth annual Open Compute Summit. The Open Compute Project (OCP) is Facebook's effort to decentralize and unpack the datacenter, breaking the replication of resources and low volume, high-margin parts that have traditionally been Intel's bread-and-butter. AMD is claiming that the eight ARM cores offer 2-4x the compute performance of the Opteron X1250 — which isn't terribly surprising, considering that the X1250 is a four-core chip based on the Jaguar CPU, with a relatively low clock speed of 1.1 — 1.9GHz. We still don't know the target clock speeds for the Seattle cores, but the embedded roadmaps AMD has released show the ARM embedded part actually targeting a higher level of CPU performance (and a higher TDP) than the Jaguar core itself."

Comments

Despite it's name

[dbIII]

Jaguar is for tablets and seems to be designed for price point and not speed. That's why they are comparing it with the ARM stuff and not using an Opteron 6386 as a comparison.

Re:Despite it's name

[hairyfeet]

Which is why I don't get this chip. After all they have the Jaguar for ULV applications, Opteron for when you need more horsepower, what good are these ARM units?

And I'm sorry ARM fans but as we keep seeing ARM just doesn't scale, you bump up the IPC and you blow the power budget, which is why I've been saying for awhile that days of "ARM Mania" will be quickly coming to an end. Folks want their handhelds to perform like an HTPC in their pocket and that means high instructions per second which ARM can't do without blowing through the power. This is why Nvidia is up to 5 cores, Samsung to 6, because ARM just doesn't scale. Its gonna be easier for AMD and Intel to cut X86 down with jaguar and Atom than it is to get ARM to scale.

So I just don't get what the market for this is exactly. Most server code is X86 anyway, be it wintel or Linux, so you are talking about some serious expense porting it over and with jaguar on the low end and Opteron on the high? Well i just don't see a huge market for ARM servers, am I missing something?

Re:Despite it's name

[Anonymous Coward]

Nonsense.

Most serve code can just be recompiled and it just works. Even that is not required it are are running a Linux distro.

That's before we think that a lot of server code is Java, PHP, Python, Ruby, JavaScript etc that does not even need recompiling.

I can't speak for the power budget on servers but clearly someone thinks there is a gain there.

Besides, some competition in that space cannot be a bad thing can it?

     

Re:Despite it's name

[MrEricSir]

Jaguar is for tablets and seems to be designed for price point and not speed. That's why they are comparing it with the ARM stuff and not using an Opteron 6386 as a comparison.

The question is whether Jaguar itself is really 64-bit, or if it's just the graphics processor that's 64-bit and the rest is 32-bit.

Re:Despite it's name

[Anonymous Coward]

These things seem almost purpose-built for memcached servers and... well, can't think of much else. And for a memcached box, all the profit is going to the DRAM vendors. Saw somewhere else that "AMD will take a loss on every chip, but make up for it in volume..." That sounds about right for their business plan, but can they even execute on that...? Will be an interesting year for them, I suppose.

Re:Despite it's name

[Billly Gates]

Microsoft supports Windows, IIS, SQL Server, and Exchange on ARM. Linux and its FOSS supports ARM as well. I believe RHES has an openJDK for java apps to run on ARM servers too.

Besides a few niche apps I really do not see the application compatibility problem.

It is not like these are used to run win32 desktop apps.

Re:Despite it's name

[bzipitidoo]

I agree. Recompiling is not a big deal. C/C++ is standardized. The heavy lifting is the creation of standard libraries, and any sensible chip and system vendor will help do that because it's absolutely necessary. This is not the same thing as porting from an Oracle database to MariaDB or some other DB. That's a big job because every database has their own unique set of extensions to SQL.

x86 never was a good architecture. It was crap when it was created back in the 1970s, crap even when compared to other CISC architectures of that era, and despite tremendous improvement, it's still crap today. Motorola's 68000 series was superior. Intel went with a load/store design for the integer math, which is okay, but then for no good reason whatsoever they didn't stay consistent for the floating point math, opting for a horrible stack based approach. The reason the true underlying architecture of a modern x86 CPU is RISC is that RISC is just that much better. Yes, so much better that even after allowing for the overhead in translating from x86 to RISC instructions, it is still faster than a CPU that executes x86 operations natively. They've done an amazing job of working around and amending the shortcomings of the x86 design, but it would be better to ditch the legacy cruft and make a fresh start. I mean, the instruction set has specialized instructions for handling packed decimal! And then there's the near worthless string search REPNE CMPSB family of instructions. The Boyer-Moore string search algorithm is much faster, and dates back to 1977. Another sad thing is that for some CPUs, the built in DIV instruction was so slow that sometimes it was faster to do integer division with shifts and subtracts. That's a serious knock on Intel that they did such a poor job of implementing DIV. A long time criticism of the x86 architecture has been that it has too few registers, and what it does have is much too specialized. Like, only AX and DX can be used for integer multiplication and division. And BX is for indexing, and CX is for looping (B is for base and C is for count you know-- it's like the designers took their inspiration from Sesame Street's Cookie Monster and the Count!) This forces a lot of juggling to move data in and out of the few registers that can do the desired operation. This particular problem has been much alleviated by the addition of more registers and shadow registers, but that doesn't address the numerous other problems. Yet another feature that is obsolete is the CALL and RET and of course the PUSH and POP instructions, because once again they used a stack. Standard thinking 40 years ago, but today, we know that more flexibility is better, and calls and returns can be achieved with a JMP instruction that stores a return address at a location determined through some indirection, rather than using a specialized CALL and RET instruction that pigs out on a precious register to hold and update a stack pointer for a call stack, and which is a pain to work around to implement things like tail end recursion. Finally, the support for task switching, virtual memory, and concurrency was lacking. Their so-called segmented memory architecture was terrible. The first attempt at OS level instructions, in the 80286, was so badly done that hardly anyone tried to use it. The 80386 was much better, but still lacked an atomic instruction for handling semaphores. Wasn't until the 80486 that they finally got it good enough to support a real OS. That's a big reason why PCs had such a poor reputation compared to Big Iron, and were often dismissed as toys.

That's not to say that ARM and other architectures don't have issues. But the x86-- it's like they were trying for the worst possible design they could think of.

Re:Despite it's name

[LordLimecat]

Its not x86 today, which kind of makes me think you have no idea what youre talking about.

opting for a horrible stack based approach.

Im not one to argue architectural advantages, but id point out that both of the top two cpu manufacturers chose the same instruction set. Noone else has been able to catch the pair of them in about a decade.

Re:Despite it's name

[gmhowell]

Where you even came up with an idea like that is beyond me.

Obviously. BTW, isn't tonight a school night, kid?

Re:Despite it's name

[qpqp]

I'm sure the point was that most packages are also available as binaries for ARM.

Re:Despite it's name

[jones_supa]

even windows NT 4.0 supported arm

Not as far as I know. Maybe you are thinking about Alpha?

Re:Despite it's name

[gbjbaanb]

its unfortunate, but sometimes the best way to drive a screw into a piece of wood is just to keep smashing at it with bigger and bigger hammers.

I guess this approach is what Intel and AMD have been doing with x86.

Re:Despite it's name

[fuzzyfuzzyfungus]

Write once, debug in some places, abandon all hope elsewhere...

Re:Despite it's name

[evilviper]

Your criticisms are probably quite apt for a 286 process. Some might be relevant to 686 processors too... But they make no sense in a world that has switched to x86-64.

The proprietary processor wars are over. Alpha and Vax are dead. PA-RISC is dead. MIPS has been relegated to the low-end. SPARC is slowly drowning. And even Itanium's days are severely numbered. Only POWER has kept pace, in fits and starts, and for all the loud press, ARM is only biting at x86's ankles.

    x86 has been shown able to not just keep pace but outclass every other architecture. Complain about CISC all you want, but the instruction complexity made it easy to keep bolting on more instructions... From MMX to SSE3 and everything in-between. The complaints about idiosyncracies are quite important to the 5 x86 ASM programmers out there, and compilier writers, and nobody else.

I wouldn't mind a future where MIPS CPUs overtake x64, but any debate about the future of processors ended when AMD skillfully managed the 64-bit transition, and they and Intel killed off all the competition. With CPU prices falling to a pittance, and no heavy computational loads found for the average person, there's no benefit to be had, even in the wildest imagination, of switching the PC world to a different architecture, painful transition or no.

Re:Despite it's name

[fuzzyfuzzyfungus]

I have no love for Android; but there is one major difference between Intel's latest and assorted ARM:

Has Intel managed to cram some impressive x86 punch into ever lower power envelopes? Yes, yes indeed. Are they the only game in town, period, if you want reasonably speedy x86s at low power? Yes, unfortunately so. And, to the degree that the threat from iPads and the like doesn't keep them in check, prices reflect that.

ARM, by contrast, lacks some punch and a lot of legacy software; but approximately a zillion vendors using undistinguished foundry processes can achieve decent results at low power. Prices reflect this.

So long as ARM remains a looming threat, Intel will price their parts such that they (by virtue of Intel's unquestioned technical prowess) are very, very, compelling. If ARM shows any signs of weakness, it'll be back to the early Pentium M days, when Intel pretended that the 'Pentium 4 Mobile' was good enough, and that a Pentium M deserved a massive price premium. Not fun, at all.

Re:Despite it's name

[Kjella]

TL;DR but to paraphrase Churchill "x86 is the worst form of instruction set, except for all those other forms that have been tried". The rest are dead, Jim. The cruft has been slowly weeded out by extensions and x86-64 and compilers will avoid using poor instructions. The worst are moved to microcode and take up essentially no silicon at all, they're just there so your 8086 software will run unchanged. It's like getting your panties in a bunch over DVORAK, whether or not it's better QWERTY is close enough that the world will never change. The only reason ARM might be the next thing is legal, because there's patents tied to making a x86-compaitble processor (shouldn't they BTW start expiring soon?) while everyone can get an ARM license.

Re:Despite it's name

[DrXym]

Most server code? Most server code is Java, Python, PHP or some other abstraction running over the hardware. Providing the runtime exists to support the abstraction it is largely irrelevant what architecture is powering it. I expect that operations that are already using Linux or some other Unix variant are well positioned to jump over. Windows based operations, not so much though Microsoft are in the cloud computing space too and this might motivate them to support ARM.

Why companies might do choose ARM really depends not on whether it is faster than Intel CPUs, but whether it is fast enough for the task at hand, and better in other regards such as power consumption, cooling, rack space etc. Google, Facebook, Amazon et al run enormous data centers running custom boot images and have teams capable of producing images for different architectures. This would seem to be the market that AMD is targeting.

Re:Despite it's name

[symbolset]

Most 10Gb Ethernet ports use a gig each just for buffers.

Re:Despite it's name

[petermgreen]

Depeneds what exactly the "storage box" is doing with the data.

If it is doing block level deduplication then ram starts to become very important since you really want to keep the deduplication tables in ram. The freenas guys reccomend 5GB of ram per terabyte of storage for ZFS deduplication.

If it's serving up the same files repeately then more ram means more chance that those files will be cached in memory rather than having to be read from relatively slow storage devices.

Re:Despite it's name

[Alioth]

ARM scales fine (in another way). Sophie Wilson (one of the ARM's original developers) indeed said that ARM wouldn't be any better today than x86 in terms of power per unit of computing done. However, an advantage ARM has for parallelizable workloads is you can get more ARM cores onto a given area of silicon. Just the part of an x86 that figures out how long the next instruction is is the size of an entire ARM core, so if you want lots of cores this will count for something (for example, the Spinnaker research project at Manchester University uses absurd numbers of ARM cores).

Re:Despite it's name

[Hal_Porter]

. I mean, the instruction set has specialized instructions for handling packed decimal! And then there's the near worthless string search REPNE CMPSB family of instructions. The Boyer-Moore string search algorithm is much faster, and dates back to 1977. Another sad thing is that for some CPUs, the built in DIV instruction was so slow that sometimes it was faster to do integer division with shifts and subtracts. That's a serious knock on Intel that they did such a poor job of implementing DIV. A long time criticism of the x86 architecture has been that it has too few registers, and what it does have is much too specialized. Like, only AX and DX can be used for integer multiplication and division. And BX is for indexing, and CX is for looping (B is for base and C is for count you know-- it's like the designers took their inspiration from Sesame Street's Cookie Monster and the Count!) This forces a lot of juggling to move data in and out of the few registers that can do the desired operation. This particular problem has been much alleviated by the addition of more registers and shadow registers, but that doesn't address the numerous other problems. Yet another feature that is obsolete is the CALL and RET and of course the PUSH and POP instructions, because once again they used a stack. Standard thinking 40 years ago.

It was standard on the 8086 (introduced in 1978). The 80368 (1985) is a general purpose register machine and can use a 0:32 flat memory mode. And modern x64 (2003) has twice as many registers and the ABI specified SSE for floating point, not 8087. Also in 64 bit mode segment bases and limits for code and data (i.e any instruction which does not have a segment override prefix) are ignored.

I.e pretty much all the things you're complaining about have been fixed and if you look at benchmarks x64 chips have been faster than their Risc competitors pretty much since x64 was introduced. Going on about segments, floating point stacks and REPNE MOVSD now is absurd.

And if you look at the way the 8086 took over from the 8080 what they did made a lot of sense. You could machine convert a CPM 8080 program to a MS DOS 8086 one and have it run fine. Meanwhile a native 8086 program had access to 1M of address space, up from 64K on 8080 and Z80. Like CPM MSDOS ran on commodity hardware which was cheaper than the big iron boxes and given most people were running things like Visicalc and Wordstar it was perfectly sufficient.

Re:Despite it's name

[fatphil]

Total bollocks. Let's take a random CISCO (nexus 7000, the absolute first technical spec that popped out of a "10gbit phy buffer" google search):

"Port buffers:
1 MB plus 65 MB per port on ingress and 80 MB per port on egress for dedicated mode operation
1 MB per port plus 65 MB shared per 4-port group on ingress and 80 MB per 4-port group on egress in shared mode"

That's higher than several other ones I've seen, and even if you're buying a 32-port switch only to use 8 of the ports, you're still nearly an order of magnitude out. Wanna use all 32, and you're a factor of nearly 30 out.

Re:ARM processing

[ne0n]

I believe you've read it wrong. Basically, AMD actually traveled back in time to develop the first ARM processor.

x86 IS efficient

[Crass Spektakel]

Actually x86 IS efficient for for something completely different. The architecture itself is totally unimportant as deep inside it is yet another micro code translator and doesn't differ significantly from PPC or Sparc nowadays.

x86 short instructions allow for highly efficient memory usage and for a much, much, much higher Ops per Cycle. This is just that big of a deal that ARM has created a short command version of ARM opcodes just to close in. But then this instruction set is totally incompatible and also totally ignored.

Short instructions do not matter on slow architectures like todays ARM world. These just want to safe power and therefore it fits in well that ARM also is a heavy user of slow in-order-execution.

A nice example, increasing a 64 bit register in x86 takes ONE byte and recent x86 CPUs can run this operation on different register up to 100 times PER CYCLE, all commands to be loaded in THREE to EIGHT Cycles from memory to cache. On the other hand, the same operation on ARM takes 12 bytes for a single increment operation, to load some dozend of these operations would take THOUSANDS of clock cycles.

And now you know why high end x86 is 20-50 times faster than ARM.

Re:x86 IS efficient

[luminousone11]

1 byte?, you have no idea what you are talking about. AMD64 has a prefix byte before first op code byte, so in 64bit mode no instruction is smaller then 2bytes, Also 64bit arm is a new instruction set, and it does not in any way resemble 32bit arm. The fact is 64bit ARM, looks much more CISC'y then 32bit ARM, providing access to multiple address modes for load instructions, integrating the SIMD instructions rather then using costly co-processor extensions, having lightly variable length instructions, dedicated stack register and access instructions, And in a huge break from prior arm instruction sets they drop the conditional execution instructions from the instruction set. And it manages to increase the register count from 16 to 32 to boot as well. ARM has a bright future, It is not forced to waste huge swaths of transistors on decoding stupidly scatter brained instruction encodings built from 40 years of stacking shit on top of shit.

Re:x86 IS efficient

[TheRaven64]

Actually x86 IS efficient for for something completely different. The architecture itself is totally unimportant as deep inside it is yet another micro code translator and doesn't differ significantly from PPC or Sparc nowadays.

This is true, unless you care about power. The decoder in an x86 pipeline is more accurately termed a parser. The complexity of the x86 instruction set adds 1-3 pipeline stages relative to a simpler encoding. This is logic that has to be powered all of the time (except in Xeons, where they cache decoded micro-ops for tight loops and can power gate the decoder, reducing their pipeline to something more like a RISC processor, but only when running very small loops).

x86 short instructions allow for highly efficient memory usage and for a much, much, much higher Ops per Cycle.

It is more efficient than ARM. My tests with Thumb-2 found that IA32 and Thumb-2 code were about the same density, plus or minus 10%, with neither a clear winner. However, the Thumb-2 decoder is really trivial, whereas the IA32 decoder is horribly complex.

This is just that big of a deal that ARM has created a short command version of ARM opcodes just to close in. But then this instruction set is totally incompatible and also totally ignored.

Thumb-2 is now the default for any ARMv7 (Cortex-A8 and newer) compiler, because it always generates denser code than ARM mode and has no disadvantages. Everything else in your post is also wrong, but others have already added corrections to you there.

Re:x86 IS efficient

[thogard]

There is one disadvantage of the different ARM modes and that is the an arbitrary program will contain all the needed bit patters to make some useful code. This means that any reasonable large program will have enough code to support hacking techniques like Return Oriented Programming if another bug can be exploited. I would love to see some control bits that turn off the other modes.

Re:Another nail in the coffin for x86

[jones_supa]

x86 is thriving and will still be around for a very long time.

Re:ARM processing

[Chrisq]

I believe you've read it wrong. Basically, AMD actually traveled back in time to develop the first ARM processor.

No - its making a food processor for cannibals. The design brief was that you should be able to process a whole arm.

Re:Another nail in the coffin for x86

[Chrisq]

Is this another nail in the coffin for the x86 architecture? Is it realistic to expect Windows/Mac OS X for ARM in their desktop versions in the near future? (Linux is already there). Of course x86 won't suddenly disappear, but may become "legacy". Intel should start moving on the ARM front

No - ARM is still a long way off the high-end x86 chips. At the moment they largely complement each-other with some overlap in the low-mid range.

Re:Why ARM?

[Anonymous Coward]

1) cheap
2) competition
3) custom SoCs

If that is enough to work out remains to be seen.

Re:Pretty low bar...

[gtall]

And the point is that this is about servers, it doesn't matter if there are more ARM chips selling....you wouldn't compare a smart phone SoC with a server chip.

I've heard arguments on both sides about server stats for ARM vs. Intel servers. Personally, I hope Intel gets kicked in the teeth, but I have yet to see a knock down argument that ARM has what it takes to beat them. There will probably be applications for both were each excels.

Making comparisons now is also somewhat pointless. What's more important are the trajectories of both architectures, and Intel could also try to pull another Itanic, only be successful this time. At that point, attempting to plot trajectories now is pointless because a new Intel architecture is an entirely different trajectory.

Competing for 0.46% of server market

[edxwelch]

The microserver market is still less than half a percent of the server market and most of that is x86, not ARM. That's probably why Calxeda went bust.

Re:Pretty low bar...

[fisted]

ARM chips are currently outselling x86 ships

That doesn't surprise me at all. It might be interesting to have an ARM-powered x86 ship though.