Why the Z-80's Data Pins Are Scrambled
An anonymous reader writes "The Z-80 microprocessor has been around since 1976, and it was used in many computers at the beginning of the PC revolution. (For example, the TRS-80, Commodore 128, and ZX Spectrum.) Ken Shirriff has been working on reverse engineering the Z-80, and one of the things he noticed is that the data pins coming out of the chip are in seemingly random order: 4, 3, 5, 6, 2, 7, 0, 1. (And a +5V pin is stuck in the middle.) After careful study, he's come up with an explanation for this seemingly odd design. "The motivation behind splitting the data bus is to allow the chip to perform activities in parallel. For instance an instruction can be read from the data pins into the instruction logic at the same time that data is being copied between the ALU and registers.
[B]ecause the Z-80 splits the data bus into multiple segments, only four data lines run to the lower right corner of the chip. And because the Z-80 was very tight for space, running additional lines would be undesirable. Next, the BIT instructions use instruction bits 3, 4, and 5 to select a particular bit. This was motivated by the instruction structure the Z-80 inherited from the 8080. Finally, the Z-80's ALU requires direct access to instruction bits 3, 4, and 5 to select the particular data bit. Putting these factors together, data pins 3, 4, and 5 are constrained to be in the lower right corner of the chip next to the ALU. This forces the data pins to be out of sequence, and that's why the Z-80 has out-of-order data pins."
[B]ecause the Z-80 splits the data bus into multiple segments, only four data lines run to the lower right corner of the chip. And because the Z-80 was very tight for space, running additional lines would be undesirable. Next, the BIT instructions use instruction bits 3, 4, and 5 to select a particular bit. This was motivated by the instruction structure the Z-80 inherited from the 8080. Finally, the Z-80's ALU requires direct access to instruction bits 3, 4, and 5 to select the particular data bit. Putting these factors together, data pins 3, 4, and 5 are constrained to be in the lower right corner of the chip next to the ALU. This forces the data pins to be out of sequence, and that's why the Z-80 has out-of-order data pins."
There was a Z-80 in the C=128 , but it wasn't used.
There was virtually no CPM software adapted to the C=128
Typically 128s mostly were used in C=64 mode
That's an interesting anecdote, but is there more of a story here?
This is definitely for nerds, but I'm having trouble understanding the news part.
I'll be the first to suggest i don't know much about Z80 architecture. So, maybe someone informed on the issue could fill us in, here.
Why didn't they just ask Federico Faggin? According to Wikipedia, he's still alive.
When I grow up I also want to be an archaelogist.
The Z-80 was a great chip and overall system design supported by very capable support peripheral chips in that family. The best part of working with it, is Zilog's Documentation, which was very well written and demonstrated the consistency of the entire product line (in terms of it's functional programming interfaces). There really is not any need to 'reverse engineer' the chip, everything you need to know is freely available already. I think this article and author means to say "Here are some plausible possible reasons behind some of these physical implementation decisions...".
I think all first year computer science / programming / engineering students should be introduced to this and learn how to write programs for this environment first before moving on to modern systems. True power is being able to write useful stuff with only 64kb of ram and 1mhz of processor, and have it run in an acceptable time frame, and taking those skills and scaling up today's multi-core/ multi-gigahertz/multi-gigabyte address spaces.
They have to throttle users who don't log in and they have to stick a captcha in their face too. Otherwise the entire site is overrun with GNAA posts or, worse, rants by APK. I'm posting this anonymously - but I am logged in. So there is no captcha, but there is throttling. I know I can post two items like this back to back, but then I do get the "wait a bit" message.
Ahhh, those were the days. a whole CPU in a 40 pin DIP. you could actually do useful things with this mounted on an experimental breadboard. thanks for bringing back memories.
There were full published data sheets, pinouts, etc. back in the 80's. People did hardware upgrades with soldering irons on the Sinclair Spectrum or the cheapo version the ZX81. The Z-80 also had some shared function data/address pins too, alternating between clock cycles and the ULA was somewhat of a mystery.
How can this be a historical discovery? Shit I've gotten old.
Why even bother? There is no rule that a chip has to be bonded out to a package so as to achieve a particular ordering of bit in busses. It's the way it is because it was the least complex, easiest way to do it. A boring reason, but there it is.
Not sure how sarcastic you're trying to be. I know nothing about chip design. I read the article and learned something. These are the type of articles that reflect what I believe slashdot is about. So it's something that I came here to learn about. There's no NSA/Snowden/loss of freedom/political drama/clickbait/ in the article, so there's no trolls. Win win.
Now if only there were more comments to add to the understanding.
Politics; n. : A religion whereby man is god.
I think all first year computer science / programming / engineering students should be introduced to this and learn how to write programs for this environment first before moving on to modern systems. True power is being able to write useful stuff with only 64kb of ram and 1mhz of processor, and have it run in an acceptable time frame, and taking those skills and scaling up today's multi-core/ multi-gigahertz/multi-gigabyte address spaces.
While I agree, I wonder if this is actually true. To what extend does knowledge about efficient coding on an 8 bit machine with limited memory teach us anything about programming these heftier CPUs? Maybe the only people that should really have chewed the bits are the writers of compilers. For all others it might not matter so much how the compiler and the OS handle memory allocations and the like, and it may be more useful to focus on the program structure instead of the implementation on the CPU.
Back in 1980 my parents got me a British ZX81 kit to assemble, with 1024 bytes of RAM. (I still have it buried in the closet along with my other antiques- AFAIK it still works.) It ran BASIC so slowly that you could actually read the code about as fast as it executed, so I was "forced" to learn assembly language. I was amazed by how fast it was- it ran a million operations in just a few seconds! (wow.) You had to start by writing a BASIC program:
10 REM AAAAAAAAAAAAAAAA
20 PRINT USR(16514)
Then you had to POKE each assembly instruction into the comment, starting at 16514 for the first "A". The comment line would slowly turn into "10 REM x&$bL;,$_)[vU7z#AAAAAAAA". The next line was 20 PRINT USR(16514) (printing out the return value from the BC register).
Saving any ZX81 program onto a cassette tape was excruciating- they recorded as several minutes of loud high-pitched screeching. Usually you needed to save them twice because it failed half the time. Then to load the program you had to cue the tape you had to find exactly where the start of the screeching was, rewind several seconds, play the tape, and only then could you hit enter on LOAD. (Otherwise LOAD got confused by the *click* noise when you pushed the play button on the tape player.)
You young people don't realize what an easy life you have.
Right on. What a nice change to have a technically oriented article compared to the usual pissing matches and posturing - regardless of when the technology was generated.
Now if we can only figure out how to create 96 by 64 bit displays.
It looks like the firing order for an 8 cylinder engine. I thought maybe the engineer tasked with that pin out was moonlighting in a garage somewhere.
Damn_registrars has no butt-hole. Damn_registrars has no use for a butt-hole.
I seem to vaguely recall such design allowed for a greater immunity against electrical interference between data lines (maybe during DRAM refresh?)
It's always refreshing to see stuff like this waft across the front page of /. every now and then - I wish there was a way to re-apply the "News For Nerds... Stuff That Matters" logo to top of the page only on stories like this.
(Pro-Tip: Please mod this "+1 Nostalgic" :) )
It's not at all unusual for the 5v and 0v (Vcc and GND) lines to be in the middle of a DIP package (the Slashdot summary sort of implies it's an odd thing). It means the leads within the package are shorter for those lines, lowering parasitic inductance and capacitance for the power supply to the chip, generally you want the decoupling capacitors to be as close to the actual chip as possible so they can be as effective as possible as the power demands change. Putting the supply pins at opposite corners (like it's done on things like 14 pin 74-series standard logic) would very significantly lengthen the distance that the actual supply rails on the chip are from the decoupling capacitors.
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Rather than "reverse engineering" this, why did the author not simply look at the data manual for the chip, where all this is perfectly clear?
Thank you!
Speed of Z80 at 4Mhz was comparable to that of 65xx at 1Mhz
I thought the work per clock ratio between 6502 and Z80 was closer to 2:1, not 4:1. This would put, say, a 1.8 MHz Atari 800 and a 3.5 MHz Spectrum together, or a 1.8 MHz NES and a 3.6 MHz Master System. Where do you get 4:1?
Also cost was a huge factor - the 6502 was significantly less expensive than the Z80s at the time.
And the 6502 gracefully entered the 16 bit field with 100% backward compatibility in the 65C816.
Sadly, too late to make a big dent as the 68000 was just around the corner, although Nintendo took
great advantage of it in their SNES. Franklin Electronic Publishers used the 6502 exclusively in
their early hand-held spell checkers.
Articles like this, makes me warm and fuzzy all over, probably because I'm an old geezer in comparison to kids of today, but I think it's very important for anyone serious about hardware development and/or software development to dive into the past once in a while, it's a great way to learn simplicity and how the hardware inside our relatively complicated devices of today really works.
/. back to the roots.
I'm a moderator of a major international electronics forum, and I don't have the number on just how many times the young generation feel completely lost when they're fresh out of school, trying to understand very complex structures. They either lack understanding of general electronics, or how the microprocessor works with different layers, ram, rom (especially embedded systems when they are working with complex IDE's with a maze of classes & libraries), they simply forget how the hardware works, and get to focus too much on programming.
I understand exactly that frustration, especially since this old geezer was lucky enough to grew up with basic home computers like the Commodore 64, Zx81 (Z80 cpu), Spectrum, Oric, Dragon 32, BBC etc. We often did our own hardware modifications, made fast I/O port load&save systems ourselves because we had a basic understanding of how the innards worked, and it really wasn't rocket science.
Sometimes it is relevant to take a step back in time (Like this article does, explaining some of the oddities with the Z80 processor), and spark interest in these old CPU's and their systems & possible uses even today. As an example, I have a HUGE stash of Micro-Controllers in my workshop, these are an absolute GEM to me. Why? Because they are very simple to work with. Like the good old Commodore 64 or ZX 81 - they don't have advanced hardware layers where you have to do special addressing to access certain memory areas or have to be kind to the operating system in order to write something to control your hardware (homemade or otherwise), it's as simple as writing a few pokes into memory...and you can turn on/off some external units such as relays, lights - or read on/off states from your sensors...maybe build your own satellite tracker the easy way, or control your homemade lawnmover unit.
And we still have VAST amounts of these MCU's unused all over the world, these are SUPER USEFUL (if you didn't get the above, think standalone apps...like each MCU was an app for a specific task). Many of these CPU's (MCU usually comes with internal memory/Ram/Rom/Flash/ and the most important part...an I/O) ready to use, just program it...and watch it go. If the kids of today understood this, they'd have a BLAST programming these (just watch the maker society with their modern versions...Arduino etc.) and the sky's the limit.
More articles like these thanks, brings
What this world is coming to - is for you and me to decide.
If the Z-80 is so much a mystery, I can't wait until 30years from now someone tries to reverse engineer a modern Intel chip or even the old fabled Itanium for educational purposes. Or do modern chips have much better documentation and schematics that would be available?
They have already punished you. Thanks for proving what those people are like. If you are not white then you are not welcome here.
..
I had a ZX81 and TS1000 in high school. My senior year I took it to school and a pal of mine got a hold of one of the Cassette Tapes with programs on it.
He put it in his Walkman and played it, this was 1982.
They thought it was some new dance mix.
I don't know for sure, but this was in Southern California.. shortly there after .. Heavy Metal was born.
The early geeks were hands on in the 70's. ;)
All their non-geek buddies talked about mustaings, corvettes, and big-block v-8
The pin layout was nothing other than the geeks way of emulating a v-8 firing order, which never is in ascending order
And it had a big carb and gass line in the middle of it.... Nothing more, nothing less.
Will be able to sleep tonight.
I had always wondered why the refresh register only counted 7 bits wide, which made that feature mostly useless when 64K DRAMs came out. (a few 64K DRAMs were made with 7-bit refresh, probably because of the Z80) Turns out that the increment/decrement circuit used in the Z80 had carry lookahead for groups of bits: 7 5 3 and 1. The I and R registers were implemented as a single 16-bit register, and to keep the I register from incrementing all the time, only the first group of the increment circuit was used, resulting in only 7 bits counting.
Not surprisingly, this comes from an earlier post on the same guy's web site: http://www.righto.com/2013/11/the-z-80s-16-bit-incrementdecrement.html
#naabhaprzrag, #sverubfr-000, #agi-fcbafberq, negvpyr[pynff*=' negvpyr-ary-'] { qvfcynl: abar !vzcbegnag; }
I know Fred Weeks personally. He retired from his Zilog days a multi-billionaire and landed in Prince Edward County, Ontario.
...Steve
If you aren't rich and white, then the chances of you being educated and a non-felon decrease dramatically. I'm not going to invest my valuable time reading anything an unsuccessful criminal has to say. Don't hate the player.
There is no reason to be loyal to Slashdot anymore. Ad block.
Once they tried to force New Slashdot they destroyed that loyalty.
A zealous grumpy old moderator if you are who I think you are. Moth!
So that's why data pins 3, 4 and 5 are at one side? OK, so then, why aren't they at least in order? Why are the other pins not in order? Why did space constraints force these pins into an odd order when the Z80 designers were apparently quite capable of making all of the other pins come out of the chip in order?
The guy's argument is the position of three fucking transistors out of thousands. Sorry, but it isn't "why the Z80's data pins are scrambled," it's just one little fact that may be a piece of the puzzle, but certainly isn't anywhere near a complete explanation.
In 1983, the 68k had been out for a few years already and new 8-bit computer designs were doomed.
A good example being the "Woz Machine" floppy controller compared with many Z-80 boxes needing a second 6mhz Z-80 to run their floppy drives.
Didn't the C64 need an extra 6502 (@ 1MHz) for its floppy drive? The 1541 basically had the same computing horsepower as the C64 itself ...
I worked at Motorola in the late '80s in the Cellular Infrastructure Group. Moto's cellular switch was Z80 based, but it was a helluva hack. The thing had six Z-80s arranged in three nodes, each with an active processor and a hot standby. We had a custom MMU that extended the address space to 24 bits and could be mapped in 4096-byte blocks. Of the 16MB address space, 4MB was shared and simultaneously accessible by the active and standby processors.
It was mostly programmed in assembly, but we did have a "high level" language called MPL (Motorola Programming Language) which was little more than a big macro set around the assembly. It was very naive, had no optimization, generated crap code, and was buggy as hell. I always called it a pessimizing compiler. There was a newer, less buggy version available but we didn't use it. We had too many hacks and work-arounds that depended on the buggy behavior in the original.
All the code was, of course, linked into a single monolithic executable and loaded from tape. It took about 20-30 minutes to load the program. The processor board had a serial debugger terminal which could be used to poke changes directly into running memory. Each memory page had some space reserved for patches. I sometimes had to patch live customer machines by entering an assembly routine byte-by-byte into memory via the serial terminal and finally patching a CALL instruction into the appropriate address in main executable memory. And hoping really hard that I hadn't made any typos.
Later in its life peripheral boards were being built that were 68000 and PowerPC based and much more powerful than the main Z80 boards. The Z80 software was so crufty by then that the peripherals had hardware hacks to work around weird software behavior just because it was too damned hard to change the software.
Ah, memories...
Chelloveck
I give up on debugging. From now on, SIGSEGV is a feature.
It was so the CPU was forced to slow down so the typebars didn't jam.
Anyone who ever designed circuitry regularly enough with the Z-80 ( I would have designed over 40 boards using the z-80 during my career ) always used to think they did it that way so you could put the ROM chip next to the processor, while only using a few through-board connections. A 16k ROM could easily be connected to the Z-80 on a single-sided PCB with just 6 jumpers that fit neatly beneath the Z-80 chip itself.
Maybe that's not the reason it was built that way, but working with other designers at the time, that's what we all though -
Regards
David
Enjoy science fiction? "Turing Evolved" - AI, Mecha, Androids and rail-gun battles. What more could you want?