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Intel and Micron Unveil 3D XPoint Memory, 1000x Speed and Endurance Over Flash
MojoKid writes: Today at a press conference in San Francisco, Intel and Micron unveiled 3D XPoint (Cross Point) memory technology, a non-volatile memory architecture they claim could change the landscape of consumer electronics and computer architectures for years to come. Intel and Micron say 3D XPoint memory is 1000 times faster than NAND, boasts 1000x the endurance of NAND, and offers 8-10 times the density of conventional memory. 3D XPoint isn't electron based, it's material based. The companies aren't diving into specifics yet surrounding the materials used in 3D XPoint, but the physics are fundamentally different than what we're used to. It's 3D stackable and its cross point connect structure allows for dense packing and individual access at the cell level from the top or bottom of a memory array. Better still, Intel alluded to 3D XPoint not being as cost-prohibitive as you might expect. Intel's Rob Crooke explained, "You could put the cost somewhere between NAND and DRAM." Products with the new memory are expected to arrive in 2016 and the joint venture is in production with wafers now.
At "up to" 1000x the endurance of NAND? Who wants RAM cells that die after "up to" 300k writes?
Too good to be true? The guy's name is Crooke...
Well, we don’t hold it against you that your name is Wanker.
> It's DRAM that's in the crosshairs.
Only to a small extent. This would reduce the need for DRAM cache of SSD data. Computers will still need huge amounts of DRAM for workspace. Workspace memory needs trillions of times more write cycles than this provides.
1 Performance difference based on comparison between 3D XPoint technology and other industry NAND
2 Density difference based on comparison between 3D XPoint technology and other industry DRAM
3 Endurance difference based on comparison between 3D XPoint technology and other industry NAND
They don't actually specify *what* NAND.
So assuming typical marketing weasels, that means it's 1000x the worst TLC they could find anywhere - and that's typically rated at 300 P/E cycles.
But since the XPoint cells are individually addressable bit by bit, the comparison is probably to SLC
Yes, they totally wouldn't write "1000x the endurance of industry-leading IMFT SLC NAND" if that were the case...
in which case the relevant number of P/E cycles for XPoint would be 10E8 and you are off by a factor of more than 33,000.
Would you like a bridge with that?
Nanoscale slider switches? ;-)
Seriously, though, it's some sort of material change according to what little information has been released.:
-- Tom's Hardware
What's really interesting is the PDF with one diagram showing Xpoint sooner and then 3D XPoint on the 2018-2019 timeline at Semicon Taiwan that later has a diagram much similar to Intel/Micron's diagram. It appears to be showing a variable resistor (potentiometer) then a diode between the word line and bit line crossbars.
If they are building a materials-based variable resistor that gets written to be more or less resistive based on voltage what are they calling that process? It needn't be chalcogenide, but it sure sounds like some other sort of phase change to change the resistance. If it is memory that adjusts its resistance based on past voltages and uses that resistance for reading the value, that sounds like a memristor. (According to Chua all PCM, ReRAM, and MRAM are memristors.)
I think perhaps Intel and Micron are saying it's not PCM and it's not memristors just so people don't confuse it with other attempts at similar but different approaches.
It honestly depends on how they measure endurance. If it's measured as 1000x the 3 million writes, then no. If it's 1000x the three-year estimated wear-out time under consumer conditions, then that's phenomenal.