David Patterson Says It's Time for New Computer Architectures and Software Languages (ieee.org)
Tekla S. Perry, writing for IEEE Spectrum: David Patterson -- University of California professor, Google engineer, and RISC pioneer -- says there's no better time than now to be a computer architect. That's because Moore's Law really is over, he says : "We are now a factor of 15 behind where we should be if Moore's Law were still operative. We are in the post -- Moore's Law era." This means, Patterson told engineers attending the 2018 @Scale Conference held in San Jose last week, that "we're at the end of the performance scaling that we are used to. When performance doubled every 18 months, people would throw out their desktop computers that were working fine because a friend's new computer was so much faster." But last year, he said, "single program performance only grew 3 percent, so it's doubling every 20 years. If you are just sitting there waiting for chips to get faster, you are going to have to wait a long time."
I can say dumb shit too, but that does not make it happen.
It is time for the world to give me ten million dollars
Hey, I know. We should use asychhronous techniques! At both the circuit and the architecture level. (P.S. This is sarcasm, which students of Digital Logic and Computer Engineering may find amusing.)
When your computer is fast enough to do everything that you need to get done in a reasonable amount of time, do you really need faster chips?
We've only had three new ones come out this week. We need M0AR! M0AR languages!! M0AR syntaxes!!
M0AR of all the things!
In fact, it should be a requirement for all CS majors to develop their own language before graduations, so everyone can be *THE* subject matter expert in a language. That would be awesome. Everyone would be able to charge $500/hr for being the ONLY expert in their language.
What could be wrong with this??
A SPECint graph shared on Quora shows this slowdown starting back in 2005.
https://qph.fs.quoracdn.net/ma...
3. Profit!
2. ???
1. On Soviet Slashdot, a Beowulf cluster of alien Natalie Portman overlords welcomes YOU!
Moore's Law is over? I've been saying that for 8 years. Of course whenever I say it here on Slashdot I get assailed by people who can't accept the truth.
And? What if we don't need it to keep getting endless faster?
I worked on the BiiN project. https://en.wikipedia.org/wiki/... A 'capability' was a specific -hardware protected- feature that was set up to be unforgeable and contain access rights. This computer architecture approach date back to the Burroughs 6500 https://en.wikipedia.org/wiki/... and even back to some aspects of MULTICS.
They're definitely not von Neumann architectures, since a capability pointing to executable code is a very different thing than a capability pointing to data. In many respects, these would be "direct execution engines" for object-oriented languages (even C++, with some restrictions on that language's definition).
A huge part of this is getting over the illusion that you have any clue about the (set of) instructions generated by your compiler. If you're working on a PDP-8 or even PDP-11, C might well be close to 'assembly language'. But with the much more complex instruction sets and compiler optimizations to support those instruction sets, most languages are far removed from any knowledge of what the underlying hardware executes.
If Intel wasn't so bogged down in their own ME bugs, maybe they could focus a bit more on optical buses.
Various alternate architectures have been tried out over the decades. A lot of other programming models have been tried out as well. They all basically failed or live on only in niches because people could not hack coding for them.
Performance increases for most tasks are over. Deal with it and stop proposing silver bullets. It only makes you look stupid.
Most ACs are not even worth the keystrokes to insult them. Be generically insulted by this and ignored otherwise.
Moore's law predicted early exponential growth in semi-conductors, but as in all fields it eventually hits an inflection point and becomes asymptotic, infinite transistor density will never happen.
we can't make bloated software anymore. Uncle Moore stopped giving us ponies & candy."
As an SGI collector and fan of Unix hardware it pains me to say this, but: get real RISC is shit and so are it's engineers. This guy didn't get enough of being completely wrong in the 1990's he's gotta pile some more bullshit on top. First off, look around you, see any RISC processors that are worth a shit? I'm sure many will say ARM because they don't realize that the compute performance of an ARM chip is utter shit when seen in the light of what CISC has done. Yes, Intel and others have done silly-shit with execution pipelines and other now-dangerous-tricks. However, that still doesn't detract from the big flaw in RISC - the ISA. RISC was supposed to be just fine because everyone would just write everything in C and never get horrified at how idiotic the ISA was underneath. Compilers don't tend to use as many tricks as ASM coders do/can because any tricks they use have to be absolutely rigidly repeatable. A human ASM coder knows when he can use certain techniques and when they are better avoided. So, compilers did get better, and they sorta kinda partially made up for the shitty internal design of their RISC chips. Trouble was, RISC solved a problem that was temporary - lack of space on the silicon. The advances in lithography since the 1990's has made RISC seem pretty damn ridiculous. In fact, chip makers had so much space from the smaller litho, they didn't even know what to do with it! Heaven forbid they hire more engineers or do anything interesting - so they just stamped out more cores on the same silicon. These days, we are drowning in so much geography on the chips that the problems RISC aimed to solve are totally irrelevant. Anyone who cut their teeth making RISC chips is already extremely suspect to me. Though I can see why they'd call for new architectures, they are used to ones that suck balls.
I have the start for a new language compiler concept. It is: designed to be secure; hugely scaleable; designed to take advantage of genetic algorithms; resilient; able to automatically port compiled code to new CPUs; hot updatable; able to use a variety of programming languages (though not existing ones); able to run a single problem across multiple CPUs on multiple machines automatically; etc.
The question is: how do I develop this while keeping the mortgage paid and making a profit?
Note: in theory, I could hand it off to someone else but, as the concept is mine, it would kill me if they mucked it up.
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Seriously, I use to think that republicans were just idiots for giving California such a hard time. But, seriously, now I wonder, just what the hell really is wrong with California?
People there seem to have no basis at all in reality and just think because you wish it, it can and should be so. More architectures? Is he insane?
More languages? Aren't there at least two or three new languages that come out almost on a monthly basis, none of which are better than the one from yesterday?
The problem is not the lack of language or architecture. It's the opposite - it's the distraction of existing intellect away from improving what exists to focus on unicorn fantasies that were proved impossible or impractical during the development of those existing ones.
FFS, maybe it really is time to let California secede so they can invent all the solutions they want to problems that don't exist. Then they can create new problems to justify those solutions and be happy in their poverty.
Um, all modern processors are RISC. Careful who you are calling an idiot.
This all points back to software devs. I've spent 2 decades dealing with low-level drivers and optimizations in assembly language. Now, not that I would expect developers to write assembly language, the problem I run into is that software developers of high level languages can't even write efficient code at their level. On top of that, they don't even understand how the language stack works, what code constructs give better performance in one language versus another. In addition, they can't even profile their code anymore or look at logs.
If anything needs changing, it's software developers first. They keep eating up all the computer resources and say "get more this/that for your computer." No, pull your head out of your 4th point of contact and learn to write efficient code. We were doing this shit in the 90s all the time. We even advertised for assembly programmers in NEXT Generation magazine, constantly!
While there's nothing wrong with using high-level languages, programmers today have lost the art of what it means to be lean and mean. I don't hire any developer unless they can demonstrate they know the stack for the language in which they use.
Me: "Oh, no assembly language experience?"
Applicant: "Oh, no. Is that required here?"
Me: "In rare cases, but I'm trying to understand if you even understand how a computer works at a fundamental level. In fact, have you ever worked with state diagrams?"
Applicant: "No."
Me: "Okay, you write an application that simply opens a file. What are the failure modes of your application and the opening of the file? Can you draw a state diagram for this?"
Application: "A flow chart?"
Me: "No, a state diagram. Given a set of inputs, I want you to diagram all outputs and failure modes for each state."
Applicants could answer these questions in the 90s and early 00s, but rarely anymore. I blame software devs for this problem. Hardware engineers are always having to pick up the slack and drag everyone up hill because software devs can't pull their own weight.
My thoughts exactly. In what hell-less world dies he think those of us who are willing and able would ever be incentivesed to do it.
Your chips may be fast enough for you, but it still takes far too long to do the things I need done. Days, weeks, months...
Faster chips help everyone. They not only speed up individual processes, but that extends far and wide to things like faster networking(more bandwidth), reduced costs, better opportunities for the future.
While I have always FUCKING HATED the moronic programmers that proclaim 'CPU/Memory/Disk is cheap so what does it matter if I layer on another four bloated frameworks?' I absolutely want some assembler level compact and fast code. But, even the fastest code will further benefit me with better chips.
I assume such a laptop would be pretty fast.
In a time of universal deceit, telling the truth is a revolutionary act. George Orwell
I know we've said this before, but I think we really have reached the point where the overwhelming majority of users can no longer tell, use, or appreciate an increase in processing speed. It wasn't that long ago that it was necessary to have a cutting edge CPU to do a lot of important end-user tasks. Now I do the majority of my work - which is vastly more computationally intensive than work I did not long ago - on my laptop. This isn't a cutting-edge gaming laptop or workstation replacement laptop either, it is a ThinkPad that I bought for ~$1,000 a few years ago.
Can we make processors even faster yet? Sure. Can we make code even faster too? Certainly. Will most uses notice it? Almost certainly not.
Damn_registrars has no butt-hole. Damn_registrars has no use for a butt-hole.
Can't read the link so I assume it's about parallelism.
I think we welcome languages that encourage users to divide a problem into many smaller ones. But do we really need them?
What I mean to say is that the value of software lies in the APIs and libs you develop. Having it perform well in a parallel environment takes a bit of clever thinking but most of us will hack it.
There are quite a few programming models and frameworks that already allow astonishing things to happen in parallel. What is Patterson hinting at?
Moore's original law on the number of transistors in a dense integrated circuit is over. But there are sufficient derived/similar observation for parallelism. So, well designed parallel programs will still run faster or cheaper in a similar way as Moore observed more than 50 years ago.
I hadn't the slightest objection to his spending his time planning massacres for the bourgeoisie... (P.G. Wodehouse)
In his blog https://caseymuratori.com/blog... Casey Muratori advocates the move away from drivers to instruction set architectures (ISAs). Back in the day individual software could boot the entire computer in relatively few lines of code and still do its job while fitting on a single sided, single density floppy disk. Even today, you don't see game vendors making bootable Linux versions of their games that could theoretically work on both Mac and Windows, but I get his point.
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Really what I want is a dual core with 32GB RAM. I don't do nuclear weapons simulations I just want to run a web browser and not have it not work anymore because of memory leaks in the browser or OS. Meanwhile I want to be able to run video players, be it standalone or another web browser such that I can play this video with no interruption because of swapping gigabytes on HDD, and also run old or cheap video games. And I'm not yet doing anything useful.
Sure. So Moore is no more. What are we supposed to do now? If you think RISC sux, then you haven't met x86_64.
The 'industry' does not seem to have a requirement for new computer architectures or ngeneral-purpose programming languages. So maybe the answer is to design custom processors and custom programming for each app to solve the problem of software piracy. The new Wintel Fenestrium will have a reduced instrucion set, consisting of of Word, Excel, Outlook, Edge, PowerPoint, Access, Paint, Skype.
Maybe can eliminate shared libraries, dynamic linking and other archaic constructs that came into existence to protect scarce resources like RAM and disk space. Let's put each process in its own 'jail' like existence with closely monitored mechanisms for communication between processes.
Suppose you were an idiot. And suppose you were a member of congress. But then I repeat myself. -- Mark Twain
Various alternate architectures have been tried out over the decades. A lot of other programming models have been tried out as well. They all basically failed or live on only in niches because people could not hack coding for them.
Performance increases for most tasks are over. Deal with it and stop proposing silver bullets. It only makes you look stupid.
So what! Why in the 21st century are we still TYPING code?!
It's like if we were still using patch cords in the 1980s to program computers.
Seriously.
Human computer programming interfaces have been stagnant for 40 years now. But hardware has progressed much faster.
Text programming languages? How 1960s. How droll.
In the 21st Century, I would expect to program computers with anything BUT something that I can use a 1950s teletype to program.
Computer interfaces haven't improved in 50 years.
We're stuck.
Transistors are doubling every 24 months or so, on par with moore's original enunciation of the law, and slightly off the 18 months of his revision of said law.
What is not working anymore is _*"People's Interpretation"*_ of said law, that dictate that computers sould be 2x faster every 18 months. Moore never said that. He only said that in a given sqr centimeter of silicon, the optimum number of transistors would double every 24 months. then he latter revised the number to every 18 months.
When Moore's law was in full swing, say, in the 80's and 90's, making transistors smaller every 18 months allowed computer and processor architects to make the transistors switch faster, consume less power, we could pack more features, and make the processors cheaper, all of that at the same time. So, we had a Mhz race, on top of wich we integrated things in the processor, first paging unit, the Caches (L1 and latter L2) and Math coprocessor, then the memory controller, and more pipelines (starting with the UV pipes) and we depeloped new features/functionality, like protected mode, IA32, MMX, SSE, AMD64, et al, all of this at the same time. Please notice that all of that was made possible by moore's law, because, to implement most of those things, one needs, you know, more transistors...
At some point in the mid 00's, we hit the first roadblock, and it was not possible to make the transistors switch faster without consuming a significant amount of power, so, one dimension less.
But moore's law did not stop. We still were able to double the number of transsistors every 18 months. That's why we were still able to pack more features (SSE*, AVX*, transactional memory, virtualization support, advanced Ecryption support) and more cheaper things (higher core counts, a GPU, PCIe controllers, ETH controllers and more) in the processor for the same price. But not with increased Ghz. And the SW world has been slow to make use of many of those new features/things, it seems that performance has stagnated. If moore's law had stoped, we wouldn't have been able to increase core counts (and cache, and all the other stuff) as we did, because all those things require, you know, transistors to implement...
Now, in 2018, finally, the REAL Moore's law is strugling and limping (ask intel 10nm and GloFo 7nm people). It has a few cycles left (ask the TSMC and Samsung 7nm people), but not many more.
In the meantime, yes, new architectures are worthwhile, fine and dandy (and more publishing and headline worthy), but a more inmediate thing would be to make better use of what we already have (SSE, AVX, GPGPU, Multiple cores)...
JM2C, YMMV
*** Suerte a todos y Feliz dia!
I Am Not A Programmer, but I hope the diminishing returns of hardware performance means that software will be better optimized and less bloated. Every year, a new version of some creative software comes out. For many, many years, the software became fatter and slower, but hardware got faster. This produced the illusion that the software was staying at the same level of performance, when in fact it was getting worse every year. I hope the end of Moore's Law will mean that software companies will prioritize efficiency over useless features that no one uses, but merely give the market department something to crow about.
So, shit is a universal word, no comma are needed, you fucking shit?
I think it's time for teleporters, holodecks, and replicators. Is everyone with me??
Laws are rules for the court, but merely a bottom bar to hit for life. Think beyond laws in your actions always.
And another new architecture.
There is an old saying, "It's not the pen you use; it's how you sign your name."
so.. slightly delayed then?
Right anymore the CISC target is an abstraction, that lets the decode unit in the chip one last chance at optimization before sending data to the computational assemblies. 80% of the out-of-order speed advantage comes better static schedules on chip. And most of the circuitry on a modern chip is dedicated to figuring out what to do next and getting ready to do it, vs actual silicon dedicated to is. Something like a VLIW can get a lot more performance/watt by letting the compiler do the scheduling and set-up, at the penalty of being poor at branch heavy code.
Idiot.
You do realize that your CISC Intel/AMD instruction set architecture all gets converted to RISC internally for efficient and fast execution.
Never mind all this human assembler programmers. I bet none of them even knows more than 10% of all the instructions available today in x86.
bitsavers.org has a huge quantity of documentation on it available. I was looking at it a while back as something I would like to make an FPGA implementation of, and if it works as expected, see about updating it to support real 32/64/128/256+ bit addressing schemes.
It was designed with limitations similar to the 286 but with 1TB of virtual memory addressing. Given some updates it could be a very interesting secure processor today.
Compiler do the setup/scheduling ? That's was tried, and failed miserably - it was called Itanium.
If you let the chip itself reorder instructions and fill the pipeline with ops that are ready-to-run (all inputs available), you get MUCH better performance (and can have effectively a VLIW backend). This is akin to what the current X64-64 chips from Intel and AMD do.
That being said, the instructions being actually scheduled to functional units are RISC; what CISC instructions exist are most microcode sequences of RISC instructions that can be sent thru the execution pipeline. For most instructions, the scheduling ISN'T static, which is why it works as well as it does.
You're a fucking idiot and anyone else who keeps on drumbeating the "DURR X86 IS RISC BECOS DECODE ENGINE" is a fucktard.
x86 is **CISC**. It might be *translated internally* to RISC, but if you can't specify those micro-ops, it means fuck all to the ISA or programmer, except you have more side effects of instructions you have to consider if you are doing hand assembly.
The *instructions* you can actually specify are CISC, so the exposed architecture is CISC. Microarchitecture is not something controllable by the programmer except indirectly.
Would love an x86 system with the uops exposed as an ISA. Then we're talking actual RISC in a meaningful sense.
Trouble was, RISC solved a problem that was temporary - lack of space on the silicon.
There is the core of your misunderstanding. The idea of RISC was not to use fewer transistors, but to have a simpler, more orthogonal instruction set with homogenous stages all running in about the same time to enable high clock speeds and pipelining. And yes, there are excellent RISC designs out there - ARM is one, and so is RISC-V. "CISC" nowadays is 99% RISC - they copied the large register sets with x86_64, and they have broken down the CISC instructions into microops that are executed RISC style since roughly forever.
Stephan
Moore revised his BS multiple times on and off record.
Also, there' little to create in comp. Arch. from the "new" pov.
What will happen is that there will be hybrid architectures, combining RISC CISC ISAs and VLIW/OoO/In Order/e.t.c. approaches.
One example of the post 2010 era of comp. arch. is the DSP arch that Samsung uses in their exynos SoCs, which has an additional engine to schedule the instructions (from the compiler because it's vliw) using data training from various workloads... and even that is not new. we've been studying binaries in order to decide the stronk and the weak point in an architecture.
The final solution for better performance and less power consumption is dedicated h/w for everything and h/w acceleration libraries for everything.
AMD tried to do that with the APUs and people laughed at them.
Patterson should talk about how software lags behind everything, despite being more agile and easy to change.
You mean "logistic growth". Different thing.
I am of the opinion there is still plenty of innovation to be had that can increase our processing capabilities, although maybe in a different direction that Moore's law directed us so far.
For example, using Trinary instead of Binary for Storage systems or network communications. Switching from Silicone in chips to some other substance. Or maybe a push for more efficient programs, or offloading smaller tasks to dedicated low-power cores (Already doing this for some smartphones). There's all kinds of different directions we can go, and a slowdown will only drive exposing more creativity and solutions in these other areas
Of course, but have we hit that inflection point? By all accounts were only slightly behind the times in transistor count in ICs with them doubling every 3 years now instead of every 2. Still very much a large logarithmic gain.
Why is is that there are always those people on here that think we don't need anything new or faster?
Have you never run any development system and think, OMG, why is this taking so long?
We need way faster CPU's and computers, In fact we need Quantum computers.
I would love to compile 1.3 million LOC for 10 different platforms in 3 seconds.
The faster we go, the bigger the systems are they we can build. Try running a Neural Network the size of your brain!
A NN with 10^11 (one hundred billion) and 10^15 synaptic connects on your computer today...You can't...
We will need to make ones 10 to 100 times the power..
Yes. Some tasks have got a lot faster with the standard box of chips (primarily tasks that take advantage of GPUs), and a lot of tasks are faster on a single processor, as long as they take advantage of multithreading.
Honestly I'm a little surprised that clock speed increase seems to have slowed so much but an 8th generation i7 will knock compile times down a lot from a first gen.
Oh oh oh CDR
If today's games were threaded the same as when your machine was new. They would not run well on your box. Be honest. What FPS do you get on doom4 on reasonably high settings?
CDR: AI will never go anywhere it's super dumb and full of hype
Also CDR: I don't know why this guy is saying we need new architectures and languages? Word and Edge work great on older machines!
Computers aren't getting any faster. But don't use C/C++ -- instead, invent slower and slower languages. Let's try Visual Python Script# on Rails.
You're looking in the wrong direction. No, over here.
No, you're still looking in the direction of more pixels. This way. Yes, over here. That's right. Yes, I assure you, you're in the right place.
I wanted to show you a game. Yes, a game. Dammit, quit asking: yes, you're in the right place, I promise.
The name of this game is Dwarf Fortress.
We are at the performance scale he's talking about,
it just so that the software got so bloated layered convoluted and abstracted
that it works as if it was running on computers from 20 years ago
YMMV
passphrase : faculty
Well, I have to admit you are right. My beef with RISC isn't so much any problem with an internal microarchitecture, it's the lack of handy ASM instructions I'm used to from other platforms (most notably the VAX and the 68k). When you spend time coding on the 68k or VAX then switch to a RISC platform, you feel the suck. However, I do question your assertion that RISC was just have a more machine-clean ISA. There *was* a lack of space on silicon in the 1990's and some of the motivation to "go RISC" did stem from that fact, too.
"...he cannot let go of the old, failed ideas..."
So that explains why he's calling for new ideas then! Right, got it...
It is computers are becoming more tied to the The Cloud where to do anything the computer has to be online. And then there's constant upgrades to upgrade in order to meet the next upgrade (and pay more money). For most of my stuff I don't need a faster computer, just something to do stuff without having to deal with downloading crap I don't need.
mfwright@batnet.com
Bullshit. Fool. I know several ASM programmers who definitely at least 98% of the modern x86_64 ISA like a fucking encyclopedia. I mean give me a fucking break, it's not that huge. The only parts that are even marginally hard are the SIMD ops. It's easily learned by a kid (taught my brother ASM when he was 12). It's the design patterns and memorizing lots of ROM holes on weird architectures that make ASM a challenge. Anyhow, do you even code, bro? I program in C and ASM about 4 times a week. You?
Umm, no. People could write in anything, the simpler instruction set meant that program binaries would be larger but faster. More real estate on the CPU could be put into registers, L1 cache and operand width. Different people used different choices.
I don't give a rat's about ARM or PA-RISC. MIPS64, which you'll know all about from SGI, is a better architecture. Not tried the MIPS R8000. T9000 was interesting but no longer exists.
SPARC is a genuine RISC architecture, and by extension so is the UltraSPARC and the UltraSparc T5. Wanna tell me about how only C programmers use an UltraSPARC?
All modern Intel processors are two-layer - a RISC core and a CISC translation layer.
As for compilers vs programmers, want to put that to the test? In 1980, or 2000, you'd have been right. Programmers could hand-turn code better than any compiler. These days, the top compilers can rival any programmer because the compilers can handle ooo execution, cache coherency, cpu starvation, imbalanced caches and a thousand and one other consequences of multi-core computing in what is in effect a hybrid heterogeneous system.
Further, compilers can remember to profile and rebalance.
Even further, copy the same source onto a different architecture. May be a CPU upgrade. Your hand-turned optimization may now pessimize (see hacker's dictionary), whereas the compiler will simply optimize differently.
Also, I'm not sure if you've ever written in Ada, Occam, Erlang or Haskell, but hand-turning isn't really an option.
I'd rank MIPS as one of the best current RISC architectures.
StrongARM kind of vanished, although it was an interesting enhancement to ARM.
All SPARC architectures (including the UltraSPARC T5) are pure RISC.
SPARC is RISC. Ok, late 80s, but a bit before silicon crunch.
Acorn RISC Machine was 1985.
Inmos Transputer T400 was 1983, and definitely not a silicon real estate issue.
There may have been a space motive by others in the 90s, but the battle had been raging for seven plus years by then.
"people would throw out their desktop computers that were working fine because a friend's new computer was so much faster." Just let that sink in, then think about it in the context of all the e-waste pollution we've created. Perhaps this is now a good thing that people can hold onto their computers for 4 - 8 years until the components actually wear out or become unsatisfactory.
No, They haven't stagnated. My daughter programs in Scratch. I use labview and VBA (shut up, I work for a remarkably retarded organization). Those are most certainly not Typing code. However, tying is better than all of the other things that have been tried, except that things that aren't typing.
Patterson's argument is blatantly intellectual dishonest... he talks about single program performance as if single programs are never parallel these days. He mischaracterizes Moore's law as being about single program performance (his creative definition). It is not, it is about transistor density, which continues to increase roughly according to Moore's law, and with no end in sight. Sure, process node shrink is slowing down, but parallelism is increasing rapidly, roughly balancing that. And 3D stacking is already a thing, it will accelerate. Then there are non-silicon technologies like carbon nanostructures. I don't see Moore's law halting for at least the next 20 years.
I'm sure he has a point, but faulty rhetoric detracts from it.
When all you have is a hammer, every problem starts to look like a thumb.
Compiler do the setup/scheduling ? That's was tried, and failed miserably - it was called Itanium.
If you let the chip itself reorder instructions and fill the pipeline with ops that are ready-to-run (all inputs available), you get MUCH better performance (and can have effectively a VLIW backend). This is akin to what the current X64-64 chips from Intel and AMD do.
So, the failure of Itanium is reason enough to abandon an entire class of architectures? Existing VLIW architectures show the remarkable potential of static scheduling. The Mill is a newer example looking to extend this advantage to general purpose code. Out of order can help a bit, but at tremendous power and complexity, which translates into cost.
How much of this is slowdown is marketing driven? There's no reason to release a chip that's 50% faster if people are buying plenty of the older chip. You want to spread that out over time.
Could aswell have chosen PHP, or JS, or another horrible monstrosity of a turd of a language.
Try again. E.g. with Haskell.
(Look up thread sparks. And stream fusion.)
Mplayer does streaming, and I have used it on the frame buffer console.
The art is to set the right config options in the command line, or preferably, the user's config file.
The best way to get those, with all the bells and whistles, is to use SMPlayer, configure it fully, then play a video, and open the mplayer logs (available via the menu). Copy out the command line, and paste whatever you need into your config file.
Then add the framebuffer playback target settings to it. Done.
Ran perfectly on my box. Although your framebuffer should not suck. Especially in terms of resolution and color space ... and render speed. It usually is the bottleneck, not mplayer.
If you want, you can even script a small keyboard interface to interact with its command pipe. I used LIRC via a LIRC Android app though, since I already had that setup for my home server's Internet radio with StreamRipper track keeper functionality.
The re-order is fairly static/deterministic on x86 on the instruction stream level. Yes there's some dynamism to make up for cache misses and mis-predicts, but that's about 20% of the performance gain. However the re-order logic takes up a lot of die space and power in the critical pathway. Additionally x86 can't be a VLIW machine, it has a really hard time dispatching 4 ops/cycle, whereas static in-order machines can dispatch many more ops. The 32nm Itaniums could do 6-12 ops/cyle. The Mill is designed to sustain 33 ops/second at the high end of the familiy. Whether a compiler can actually find that in the code is a different question. Itanium was a decent architecture even if a commercial flop between delays, compiler problems, and x86_64. I think the Mill may get it's foot in the door not by competing head to head with Xeons in conventional servers, but by being lower power HPC, and be being well-matched for the micro-kernel space. Strong hardware memory and process isolation combined with 3 cycle function calls (including interupts, and calls across permission boundries.) could effectively solve the IPC penalty on mainstream processors.
Out of curiosity, what assembler instructions are you referring to? What stops them from being implemented as pseudo-instructions in the assembler, that are translated to 1 or 2 actual instructions? What stops anyone from writing short macros that are similar in functionality to the most complicated (and microcoded) VAX instructions?
And no, I'm not just making up hypotheticals. Macro-assemblers already exist, and RISC-V, to select an example I happen to know fairly well, supports more complicated operations by implementing them as pseudo-operations. For example, floating point instructions for absolute value, negation, etc. are supported by the RISC-V assembler, and they all are encoded as some variant of the floating-point sign inject instruction. I believe such instructions are not supported on most RISC architecture -- indeed, an instruction for negation of either fixed point or floating point numbers seems like the kind one might find on a CISC machine.
Patterson is right.
That said, more hardware does not solve the real problem of bloated software, non-existent security, and the infestation of incompetent people in tech who should not be in tech at all.
If only I could get every slashdotter to take an hour out from flaming and look over the mill architecture diagram: http://millcomputing.com/wiki/... Or burn an hour grokking some part of it they might want to understand (ivan is a trip to watch) https://millcomputing.com/docs... It would be a better world. The Mill folk think way out of the box.
Itâ(TM)s time to implement the purge!
Just give me more cores, so I can compile faster.
"haha, I never miss an opportunity to show if what a terrible person I am. I have no empathy, and think it's hilarious that other people get upset. Literally nobody actually likes me"
Thanks for sharing, but a therapist might be a better place
What's wrong with today's computer architecture, besides everyfuckingthing?
We already have multi-architecture computing. Ever since MMX, SSE, 3dNow, AVX and all that back in the late 90s SIMD architecture has been on the map. And lots of computing is nowadays offloaded to GPUs. Most real CPU cycles are wasted waiting from stuff from a disk while updating some visual doodah on a screen. We probably need a doodah coprocessor that executes CSS animations directly in hardware.
The dangers of excessive individualism are nothing compared to the oppressiveness of excessive collectivism
This attitude of expecting absolute, immediate solutions for complex problems is one of the reasons why lots of things go wrong, not just with software/hardware but in general. Currently, there are a myriad of available alternatives to account for each single step of the process which are either far from optimal or being systematically misused.
Anyone interested in doing things properly at each single level (efficiency, security, scalability, etc.) has tons of available resources to do it under quite favourable conditions. But no matter how many resources you will have at your disposal, complex things will always require a relevant effort and doing things properly will always be more difficult than taking the easier path. If you focus on immediate goals and let irrelevant-from-the-technical-perspective concerns to affect important decisions, you would get a bad product and lots problems. And it will be your fault, your incompetence, your lack of understanding, your wrong decisions.
I am all for improving and further easing increasingly-complex tasks, but nothing of this should ever be seen as a magical solution. There is no magical solution anywhere. The ones knowing and working harder and caring about doing things properly (and being allowed to make relevant decisions on those fronts! This apparently-evident clarification doesn't seem too clear for quite a few people in the IT world) will get excellent results, everyone else will be, in the best scenario, conditioned by the circumstances, by pure chance.
Custom Solvers 2.0 = Alvaro Carballo Garcia = varocarbas.
Even 'RISC' processors aren't completely any longer either as almost every design have some specific complex ops that don't further decode, usually very specific functionality for Pete reasons... But yeah if you ignore the comparatively small number of such ops that don't further decode v. The majority that do, they're. All disc machines.
For tacos!
It's easy to have an idea about wanting a "better" way to develop software. Many people go farther, actually creating new languages.
Haskell anyone? It's a functional language that's supposed to be superior to classics like C++. It's used by about 0.4% of programmers, according to Stack Overflow. How about Groovy, Scala, Kotlin?
What's hard is to get people on board, excited about your new programming idea.
I recently wrote a program to compare DNA results, using C#. Basically, it has to compare two CSV files containing about a million rows of data, and spit out a list of matching rows.
On my first attempt, it took 37 seconds to match two files.
When I looked into what was taking the most time, it turned out to be my use of RegEx for parsing. Switching to good old Split() and x.Parse() functions brought the time down to 6 seconds.
Next, I found that File.ReadAllLines() was taking about 1.5 seconds per file. Switching to File.ReadAllBytes() took only 20 ms, bringing down the time per pair of files to about 2 seconds.
Next, I switched to parsing the fields character by character, using mainly switch() statements. In the end, I got the total time to match two files down to 160 ms.
No change of language was required, just tuning effort.
I suspect that this is true with much of our bloated software. It's slow, not because of the language, but because nobody does any real work to improve the performance of software.
It's a great time to be a battery engineer. Just create a new battery that's 10 X better than what's out there.
Woo hoo! Now what else should we do?
Enter quantum computing
Who cares what the original source says. This is Slashdot---where facts are not tolerated very well.
Also the lead designer of Itanium died before it was brought to market and the vision was compromised as a result.
Transistors are doubling every 24 months or so, on par with moore's original enunciation of the law, and slightly off the 18 months of his revision of said law.
He did not even say that and even Wikipedia gets it wrong with his original quote right there.
The complexity for minimum component costs has increased at a rate of roughly a factor of two per year.
It is about economics. For a given cost, the number of transistors doubles no matter whether that is due to increased density, increased area, or increased packaging. And this happens even if transistor performance is decreased which has happened several times.