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Intel Cascade Lake-AP Xeon CPUs Embrace the Multi-Chip Module (techreport.com)

Ahead of the annual Supercomputing 2018 conference next week, Intel today announced part of its upcoming Cascade Lake strategy. From a report: The company teased plans for a new Xeon platform called Cascade Lake Advanced Performance, or Cascade Lake-AP, this morning ahead of the Supercomputing 2018 conference. This next-gen platform doubles the cores per socket from an Intel system by joining a number of Cascade Lake Xeon dies together on a single package with the blue team's Ultra Path Interconnect, or UPI. Intel will allow Cascade Lake-AP servers to employ up to two-socket (2S) topologies, for as many as 96 cores per server.

Intel chose to share two competitive performance numbers alongside the disclosure of Cascade Lake-AP. One of these is that a top-end Cascade Lake-AP system can put up 3.4x the Linpack throughput of a dual-socket AMD Epyc 7601 platform. This benchmark hits AMD where it hurts. The AVX-512 instruction set gives Intel CPUs a major leg up on the competition in high-performance computing applications where floating-point throughput is paramount. Intel used its own compilers to create binaries for this comparison, and that decision could create favorable Linpack performance results versus AMD CPUs, as well.

37 of 72 comments (clear)

  1. Linpack throughput by Anonymous Coward · · Score: 1

    Synthetic benchmark completely rigged to give Intel's kit an advantage does indeed give it an advantage, news at 11.

    1. Re:Linpack throughput by LoganTeamX · · Score: 1

      This. Also, "Intel forges ahead using their processor-specific compilers and instructions, ensuring their stranglehold over FPU instruction set adoption remains one generation ahead of the competition's ability to license access to said instructions."

      --
      One of the 187.
    2. Re:Linpack throughput by Tough+Love · · Score: 1

      Right, really just benchmarking AVX512 for a load that doesn't even make sense on the CPU, should be GPGPU. AMD will provide details on Rome (64 core Epyc) tomorrow, apparently. This is Zen 2 said to offer 13% IPC boost over Zen. When Rome comes out, Intel will most probably be a node behind for the first time ever.

      --
      When all you have is a hammer, every problem starts to look like a thumb.
    3. Re:Linpack throughput by Agripa · · Score: 1

      Synthetic benchmark completely rigged to give Intel's kit an advantage does indeed give it an advantage, news at 11.

      Hey, if AMD wanted better results then they should have used their own compiler on Intel's benchmark. It is not Intel's fault that Intel's compiler selects what processor features to use based on CPUID rather than capability.

  2. Times change by Tsolias · · Score: 5, Interesting

    A 1.5 years ago: Glued together CPUs BAD
    Now: Glued together CPUs GOOD

    1. Re:Times change by Octorian · · Score: 1

      25 years ago... multi-chip module good.
      https://en.wikipedia.org/wiki/POWER2

      Seems like IBM had trouble actually fitting an entire POWER CPU on a single die back then. So they started with the CPU being a whole card of individually packaged chips, then later moved onto a multi-chip module. Makes me wonder if anyone else did the MCM thing, since I haven't seen non-IBM old computers taking that approach.

    2. Re:Times change by vux984 · · Score: 1

      Your own wikipedia link mentions AMD Socket G34 and SP3 processors; the WiiU, Pentium Pro, and Pentium D, amongst others...

    3. Re:Times change by rogoshen1 · · Score: 1

      i think 'smoldering' or 'smoking' is the word you're looking for? Unless it was water cooled of course, if so, carry on!

    4. Re:Times change by Tsolias · · Score: 1

      some of those don't have nUMA... so it's literally 2 chips glued together.

    5. Re:Times change by Tsolias · · Score: 1

      I was referring to this
      https://www.pcgamer.com/intel-...

  3. Problem solving, Intel style by Pollux · · Score: 1

    Intel, circa 2017: "We cannot figure out how to successfully engineer 10nm wafers. Our tick-tock strategy is stalled, and we cannot design chips that are any faster. What should we do?"
    Intel Solution: "MORE CORES!"

    Intel, circa 2018: "AMD just released Ryzen, and it's destroying us in benchmarks. Anyone figure out that 10nm thingie yet?"
    Intel Solution: "Nope. But we did add MORE CORES!"

    Now must be a great time to be an Intel engineer.

  4. Intel says Intel CPUs are great by sinij · · Score: 3, Informative

    Intel says Intel CPUs are great. Yeah, what else are they going to say?

    It is all marketing hype until independent third-party bench-marking is done.

  5. Re:Buzzword soup by Waffle+Iron · · Score: 2

    But did they get around to fixing those horrible information leaks they designed right into their CPUs? If not, when will they get to it? Ever?

    This does address those issues: Their theory is that with so many cores thrown at the workload, the chance of malware even finding the the core that is working on sensitive information is negligible.

  6. Re:Licensing implications? by sinij · · Score: 1

    The implication is that Oracle, VM and such will continue having their way with you, and you will continue squealing like a little piggy while taking it.

  7. Hang on a minute by jon3k · · Score: 1

    One of these is that a top-end Cascade Lake-AP system can put up 3.4x the Linpack throughput of a dual-socket AMD Epyc 7601 platform. This benchmark hits AMD where it hurts.

    Now let's see what it costs.

    1. Re:Hang on a minute by Tough+Love · · Score: 1

      Let's see if they can actually make them. Intel's purported Threadripper answer i9-9900k is still out of stock. You can try a scalper for $1k. Then there are persistent tales of overheating, you can't cool it even with a normal water cooler.

      --
      When all you have is a hammer, every problem starts to look like a thumb.
  8. how many pci-e lanes in 1 Socket and 2 socket? by Joe_Dragon · · Score: 3, Insightful

    how many pci-e lanes in 1 Socket and 2 socket?

    With AMD you have 128 with one or 2

    1. Re:how many pci-e lanes in 1 Socket and 2 socket? by Agripa · · Score: 1

      how many pci-e lanes in 1 Socket and 2 socket?

      With AMD you have 128 with one or 2

      None, but they made it thinner, removed the analog headphone jack, and added a notch.

  9. mac pro will have this late 2018 starting at 7-10K by Joe_Dragon · · Score: 1

    mac pro will have this late 2018 starting at 7-10K (dual cpu base with fully loaded ram channels and crap base video card)

  10. Re:Licensing implications? by OtisSnerd · · Score: 1

    The implication is that Oracle, VM and such will continue having their way with you, and you will continue squealing like a little piggy while taking it.

    Which is why getting a dose of Intel's 'CLAP' is such a bad idea.

  11. Intel Compiler by Luthair · · Score: 2

    Specifically blocks non-Intel CPUs from getting an optimized code path, hardly shocking their CPU performs a lot better.

    1. Re:Intel Compiler by DamnOregonian · · Score: 1

      Actually, chooses a specially optimized path for GenuineIntel parts, and falls back to a standard path for non.
      Now I don't disagree with you that this sucks. However, I also think you're a disingenuous shit for wording it the way you did. Hurrah for the death of intellectual honesty.

    2. Re:Intel Compiler by Agripa · · Score: 1

      Actually, chooses a specially optimized path for GenuineIntel parts, and falls back to a standard path for non.

      Now I don't disagree with you that this sucks. However, I also think you're a disingenuous shit for wording it the way you did. Hurrah for the death of intellectual honesty.

      Luthair was more accurate than you. Intel's compiler disables the use of features advertised by the processor in the feature flags like instruction set extensions if the CPUID is not GenuineIntel. The "standard path" is to ignore the processor features.

      After Intel lost the lawsuit over this, the court required them to advertise this fact which they did by posting a non-searchable graphics image with the text as a fuck you to the judge.

    3. Re:Intel Compiler by DamnOregonian · · Score: 1

      The "standard path" is to ignore the processor features.

      No, that is not how compilers work. Try again.

    4. Re:Intel Compiler by Luthair · · Score: 1

      You need to do more reading friend. https://www.agner.org/optimize...

    5. Re:Intel Compiler by DamnOregonian · · Score: 1

      I'm very familiar with the lawsuit.
      The compiler works exactly as I said it did.
      The standard path excludes SSE support. If the runtime code detects a GenuineIntel part, it checks the CPUID flags to see if it has SSE support, and then utilizes the accelerated functions.
      As I said, you can argue all day whether that's crappy behavior (it's not like AMD chips don't have equivalent CPUID registers) but it is factually incorrect to say that they neuter code on AMD processors. They refuse to accelerate it on non-GenuineIntel parts.

    6. Re:Intel Compiler by DamnOregonian · · Score: 1

      The compiler works however the person(s) who wrote it tell it to work. Do you not know how computers work? People give them instructions...

      Let's look at the factual evidence. Intel compiler related code runs slower in some cases on AMD processors than Intel processors.
      There could be 2 reasons for this:
      1) The standard code path uses SSE instructions to accelerate performance, but those are overridden by safe functions if an AMD processor is detected.
      2) The standard code path is unaccelerated and switches in SSE instructions if it detects a GenuineIntel part with SSE support.

      One of those is legally defendable, one is not.
      Being AMD *failed* to win an injunction to change the behavior of the compiler, which of those do you think is actual methodology?

      P.S. you can find multiple articles from this lawsuit he is talking about by searching "amd vs intel lawsuit"

      You can indeed. And you apparently failed to understand them.
      You're right, compilers work how the person(s) who wrote it tell it to work. But you assume a completely illogical code path must be the case, when there is an obvious logical one that produces the same result. I can only conclude that you're an idiot.

  12. intel is losing big time to amd by Joe_Dragon · · Score: 1

    intel is losing big time to amd

  13. 340% faster? by augustz · · Score: 1

    Does no one just ask - is this even a reasonable claim?

    Intel is going to be on an OLDER process node - their architecture is not running 340% faster than AMD.

    Intel is comparing their theoretical future chip with Epyc chips shipping now. https://www.newegg.com/Product...

    Once these chips are available in quantity (they are not) drop them into some servers and start bench-marking them on performance per price /watt. And compare them to AMD chips coming out at that time.

    If this is the benchmark that is hitting AMD where it "hurts" AMD is in good position. When your competitor benchmarks their future products against your current products instead of their current ones, you KNOW you are good.

    And the latest set of benchmark shenanigans don't look good for intel either.

    1. Re:340% faster? by Tough+Love · · Score: 1

      AVX512 is fucking awesome. 16 32bit floating point operations in one instruction gives me a semi.

      Isn't that what the GPU is for? Which has many, many times the flops. Not sure what configuration Intel is targeting here, seems very boutique.

      --
      When all you have is a hammer, every problem starts to look like a thumb.
    2. Re:340% faster? by Agripa · · Score: 1

      AVX512, and even AVX2, are not everything one would hope for. Intel CPUs have to downclock the core when executing AVX512 and some AVX2 instructions which affects everything executing on that core so there are many cases where AVX and a limited selection of AVX2 instructions are faster.

    3. Re:340% faster? by Tough+Love · · Score: 1

      Still seems like a dubious use of silicon. Until the killer app arrives where joe average user is seeing a significant boost, as opposed to a crafted benchmark, more cores and more cache seem like the win. Meanwhile, GPUs dominate the top 500 now, I would guess that CPUs are sitting idle more than GPUs are.

      --
      When all you have is a hammer, every problem starts to look like a thumb.
  14. Re:Buzzword soup by petermgreen · · Score: 1

    https://www.raptorcs.com/conte...

    Expensive certainly but not totally impossible for a "mere mortal" to buy.

    --
    note: i'm known as plugwash most places but i screwd up registering that here somehow in the past and now can't register
  15. Re:90% gamers are poor. by wed128 · · Score: 1

    Xeons aren't for gamers. Most computer equipment isn't.

  16. Advanced Placement by Tough+Love · · Score: 1

    AMD schooled Intel.

    --
    When all you have is a hammer, every problem starts to look like a thumb.
  17. Re:Times change-Coprocessor. by Agripa · · Score: 1

    The nature of the AMD link is that is could add a co-processor to it's design easily. That's one of the reasons both Intel and AMD are going this way is because it makes it easier to adjust to the market.

    The reason is that there are three ways to follow Moore's law of decreasing the cost per transistor; increased transistor density, increased area, and denser packaging. The first two have largely reached their limit so it is time to turn the packaging crank.

  18. Re:Buzzword soup by petermgreen · · Score: 1

    Yeah, I was looking at the price for a complete system.

    Looking at the bits seperately, the CPU prices do indeed seem reasonable, the mainboard prices on the other hand make small core count systems prohibitively expensive.

    --
    note: i'm known as plugwash most places but i screwd up registering that here somehow in the past and now can't register