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MIPS Goes Open Source (eetimes.com)
Junko Yoshida, writing for EETimes: Without question, 2018 was the year RISC-V genuinely began to build momentum among chip architects hungry for open-source instruction sets. That was then. By 2019, RISC-V won't be the only game in town. Wave Computing (Campbell, Calif.) announced Monday (Dec. 17) that it is putting MIPS on open source, with MIPS Instruction Set Architecture (ISA) and MIPS' latest core R6 available in the first quarter of 2019. Art Swift, hired by Wave this month as president of its MIPS licensing business, described the move as critical to accelerate the adoption of MIPS in an ecosystem.
Going open source is "a big plan" that Wave CEO Derek Meyer, a MIPS veteran, has been quietly fostering since Wave acquired MIPS Technologies in June, explained Swift. Swift himself is a MIPS alumnus who worked at the company as a vice president of marketing and business development for four years. Wave, which styles itself as a tech startup poised to bring "AI and deep learning from the datacenter to the edge," sees MIPS as a key to advancing Wave's AI into a host of uses and applications. Included in MIPS instruction sets are extensions such as SIMD (single instruction, multiple data) and DSP. Swift promised that MIPS will bring to the open-source community "commercial-ready" instruction sets with "industrial-strength" architecture. "Chip designers will have opportunities to design their own cores based on proven and well tested instruction sets for any purposes," said Swift.
Going open source is "a big plan" that Wave CEO Derek Meyer, a MIPS veteran, has been quietly fostering since Wave acquired MIPS Technologies in June, explained Swift. Swift himself is a MIPS alumnus who worked at the company as a vice president of marketing and business development for four years. Wave, which styles itself as a tech startup poised to bring "AI and deep learning from the datacenter to the edge," sees MIPS as a key to advancing Wave's AI into a host of uses and applications. Included in MIPS instruction sets are extensions such as SIMD (single instruction, multiple data) and DSP. Swift promised that MIPS will bring to the open-source community "commercial-ready" instruction sets with "industrial-strength" architecture. "Chip designers will have opportunities to design their own cores based on proven and well tested instruction sets for any purposes," said Swift.
Pleeease!
Sent as ripples into the electromagnetic field. No single photon has been harmed in the process.
The FUBAR MIPS instruction set that wasn't backwards compatible with older MIPS code?
If so, why would anyone want to go BACK to MIPS when they can get a fresh architecture, or use an established one with backwards compatibility? What is the suppler, developer, or end user benefit when it has less software compatibility, no compelling differences, and no low cost desktop/development platform or implementation to run atop?
MIPS (what the article is about) is not RISC-V.
Since Nintendo wonâ(TM)t make a classic mini N64 we can make our own with an open mips chip.
What's your graphics hardware going to look like?
Anyway, this is exciting whether it will let you knock off the N64's CPU or not. Like TFA says, MIPS is mature. It's not known for performance, but maybe this will be the shot in the ARM that it's looking for.
"You're right," Fisheye says. "I should have set it on 'whip' or 'chop.'"
Not to sound too disparaging. But Open Source is often the waste bin of dead technology.
Well we worked hard on it, it wasn't profitable. Might as well open source it, and see if anyone else would have any value with it.
There are some successes such as Mozilla which Netscape Dumped its Netscape Communicator Code to the Open Source, because they were not making money from it. But there are a lot of other things that just never did anything with. Because it was garbage.
If something is so important that you feel the need to post it on the internet... It probably isn't that important.
SPARC has been GPL for years (Score:?)
by Anonymous Coward on Monday December 17, 2018 @03:51PM
Risc-V never was the only game in town; SPARC has been avaialable under the GPLv2 since 2006: https://en.wikipedia.org/wiki/OpenSPARC
There definitely needs to be challenges to the dominance of Intel and AMD. I'm looking forward to progress on the MIPS front. After the woes of Spectre and Meltdown, MIPS will be welcome competition!
You could, but you cannot legally get the games.
Besides the mini-Nintendo stuff, is just an emulation of the ROMs not small version of the same hardware.
A lot of these older games, just won't work on newer TV's without some emulation. LCD and the other Digital TVs were based on Pixels. Older game the pixels were more based on timing, and artifacts, granted I am talking more about the old CGA displays and less about the Nintendo.
If something is so important that you feel the need to post it on the internet... It probably isn't that important.
Let's see, what is running on a MIPS here (thing I can interact with):
- TV
- STB
- wireless accesspoints
- router
I think MIPS might very well fall into that category too. Mozilla survived not because Seamonkey/gekko were any good at the time compared to IE. They were not; for all the problems IE 4/5 had; it was better. Mozilla technology was good enough though and solid enough to be built on and made better. Nobody would have bother but for the fact the MS had essentially abandon the idea of making a contemporary web browser available on anything other then 32-bit Windows.
MIPS while a good design is really obsolete. Ever where it might edge some other technologies in say total computation per/watt or something its obsoleted by other advances in batteries etc that make it mostly not worth the trouble. On there other end there are plenty of 8 and 16 bit micro controller products to pick from in energy use is first thing you are optimizing for.
I just don't see a market for other than to people who have fond memories of writing MIPS assembly in school or something. I mean maybe someone can put out a line of MaplePi computers or something as educational toys..
Repeal the 17th Amendment TODAY! Also Please Read http://www.gnu.org/philosophy/right-to-read.html
You're missing the big picture here. While SPARC and MIPS lost out to x86 they are both mature ISAs with many competing features to x86. For example they have their own SIMD implementations on the FPU. This will be a big boon to RISCV. One of the places where RISCV will find it hard to compete with x86 and ARM is that they both have some very important patented extensions. Intel beat its competitors not because x86 was technically better, but because they were able to catch the widespread consumer adoption in PCs which lead to them being able to outspend others in process node technology. Now that TSMC has caught up to them a great deal, the only other major performance hurdle are the ISA extensions and optimizations. If MIPS is truly FOSS then many of those mature features can be re-implemented into RISCV and earn a massive performance boost. Specifically the SIMD extensions and VPE (MIPS equivalent to hyper-threading) will be useful.
Does this mean we'll finally get IRIX running on a new system? It'd be cool to get IRIX running on a laptop form factor. Not overly useful but hey Photoshop 3.0 and Maya 6.0 are pretty cool. Plus we can all pretend to be artiste's with Power Animator.
Yes, seriously – running Linux these days: https://www.youtube.com/watch?... since last month or so also with hardware X.org cursor: https://www.youtube.com/watch?...
Fujitsu has decided to replace SPARC with ARM.
Interesting place to put a period. And a weirdly bioinformatics slant on the technological life cycle.
I don't know about yours, but my copy of the Pythagorean theorem remains as rust-free as it ever was.
There are good ways, however, to incorporate intrinsic vice into your code base, to make sure that once it goes into the trash heap, it stays on the trash heap. One approach to this problem is to write your application on top of MFC. Windows citizenship badges are not printed on acid-free paper like all the best computer-science reference works.
A good ISA that's well tuned to its transistor budget is simply not the same beast.
Nope, MIPS is fully supported, and working, in many WiFi APs or my Sgi Octane: https://www.youtube.com/watch?... or Origin 200: https://www.youtube.com/watch?... among other such things, ;-)
Ideally, we need several.
But to really understand what works and why, you want examples.
I hope, now the Itanium 3 has been discontinued for a while, that and the Intel iWarp are open sourced. Doubt it, but one can always hope.
Between the MIPS, the T2, the GPLed SPARC, the RISC-V, the open source elements of the AMULET series and everything on Open Cores, we've a substantial body of knowledge on very large numbers of threads, very high performance, asynchronous computing and advanced ALU.
Throw in the two above as well and our understanding is almost complete.
It's a small world and it smells funny; I'd buy another if it wasn't for the money; Take back what I paid (SoM)
Well we worked hard on it, it wasn't profitable. Might as well open source it, and see if anyone else would have any value with it.
It's a fair criticism but in this case it's the non-altruistic motive: they want other people to maintain their tech for them.
Wave is a hardware neural net company. They bought MIPS so that they could have an ultra low power CPU to handle the basic overhead of an OS and dispatch training jobs to their custom ASIC. Since the MIPS CPU is nothing more than a necessary evil in their system, open sourcing means they maintain a healthy MIPS ecosystem to keep their CPU architecture from rotting and maybe even evolving. The more people that use their CPU the more free updates they get. Win\Win.
"I'll have whatever he is smoking!"
Ezekiel 23:20
you cannot legally get the games.
Granted for first-party games. But it should be feasible for a sufficiently capitalized toy company to license 20 well-received third-party Nintendo 64 games from their publishers to make and sell a "Classic 64" console without Nintendo's help and without Nintendo's name on the box. At 8 to 32 MB per ROM, it'll fit comfortably on a board with 512 MB flash. Though the present source release does not include the Nintendo 64's RSP (vertex shader) and RDP (triangle filler), a high level emulation thereof would satisfy all but the most hardcore purists.
Sure but any company with the means to actually fab those chips is going to take it and put their own custom spin on it so their MIPS chip is going to work differently to somebody else's MIPS chip. You just end up with a fragmented market.
Not to sound too disparaging. But Open Source is often the waste bin of dead technology.
Yep. The IT industry's equivalent of the movie industry's "If you can't make it good, make it 3D" is "If you can't make it successful, make it open source".
I'd like to see IRIX open sourced!
I posted this at hacker news (tl;dr - SPARC and MIPS had design aspects that were great in 1983, but didn't scale): https://www.jwhitham.org/2016/...
Can be the case, but in this one in particular is most likely a matter of marketing.
With all the spectre and meltdown inferno roaring the x86 land, opening the source of your chip tells the potential clients that they can actually check themselves if the chip have problems or not, specially multibillionaire corporations.
Somebody above referred to fond memories of writing MIPS assembler in school. I have fond memories of writing a MIPS compiler in school. :)
MIPS was always very nice, text-book stuff, in fact. The question is how the ISA would perform in a modern implementation.
Ezekiel 23:20
The CEO is a former MIPS CTO. They had already committed to a technology they were familiar with before MIPS came up for sale. They simply acquired the rights to technology they had already chosen.
They can now make an MIPS-AI CPU with their custom neural net hardware integrated with a MIPS CPU and sell a high quality, well understood and well supported CPU but with an added accelerator for AI tasks. It's similar to Nvidia's similar efforts, except Nvidia is pairing an ARM core as the necessary-evil-component and paying ARM for the license.
Intel beat its competitors not because x86 was technically better, but because they were able to catch the widespread consumer adoption in PCs which lead to them being able to outspend others in process node technology. Now that TSMC has caught up to them a great deal, the only other major performance hurdle are the ISA extensions and optimizations. If MIPS is truly FOSS then many of those mature features can be re-implemented into RISCV and earn a massive performance boost. Specifically the SIMD extensions and VPE (MIPS equivalent to hyper-threading) will be useful.
It was not only process technology. Intel's development budget was larger than all of the RISC developer budgets combined which allowed features like out-of-order execution. Development tools have improved but a high performance RISC design is not going to be significantly easier to produce than a high performance x86 design.