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A $1000 Supercomputer?
Sean Mooney
writes "CNN is reporting that $1000 pc that is 60,000 times
faster than a PII 350 may be on the market within 18 months.
Star Bridge Systems is making the field programmable gate
array (FPGA) computer. These are the same guys who are making
HAL, reported earlier. " I'll believe that when
I see it. Although I can't think of a better way to break
Moore's Law.
Your average C program has very little implicit parallelism (= parallelism not explicitly introduced by using some library of parallel operations or so). Even the best compilers on this planet won't make these programs run much faster on a massively parallel computer than on a single processor (on the contrary, the additional communication overhead can easily make the execution slower with each processor that you add).
Remember what a fuzz it has been to make the Linux kernel perform well on SMPs with more than two or three processors; how do you want to make this scale to tousands and millions of parallel processing units? BTW, the last company that went for many small (and slow) processing units instead of a few very fast ones was Thinking Machines (the machine was called CM-2). Do a search on the Web to see where they are now...
Chilli
PS: Such a machine can be useful for some things, called embarrassingly parallel problems/algorithms in the parallel computing community.
-=- Just a random lambda hacker
or performance claims in this case. Notice that for the performance they compare the IBM Pacific Blue running real code to their machine doing a 4 bit adder. The reason for this provides insight into the technology they're using.
Their computer is based around FPGAs (Field Programable Gate Arrays), in particular they are using the XILINX family of FPGA. These are devices that are composed of thousands of small logic blocks wired together through a switching network. The functionality of these small logic devices is user definable by setting bits in an SRAM. The connectivity between pins and the logic blocks and other logic blocks is also user definable by setting bits in static RAM.
So what they're doing is setting each of these programmable blocks to implement a 4 bit adder and wiring them together such that they're all operating at once. It isn't actually doing any useful calculation. There performance claim is based on wiring together a bunch of useless logic and running it all in parallel. Once you start doing useful things the amount of parallelism will reduce. It'll reduce a lot. FPGA's aren't very fast devices, they'll only get a few percentage points (if that) of their performance claim for real applications.
Porting code to this machine would be non-trivial as well. Rather than the normal programming languages computer scientists and programmers are familiar with you're actually controlling the flow of electrical signals. They've probably got synthesis tools that will take some variant of a program language and translate it into the native data needed to program the device. The synthesis tools are most likely very crude and to get real performance you'd probably have to hack bits. Not fun. I say this because of my experience with synthesis tools used for ASIC design. They're fine if you're doing boring design of maybe 50 or 100 MHz. Beyond that you're pushing there technology and it will probably break. These synthesis tools are designed by billion dollar companies. It would take massive amounts of man hours and money to create a well designed synthesis package for something of this magnitude.
Damn, I was just gonna quote that... but I'll re-quote just a bit:
"become software entrepreneurs by organizing groups of Viva Developers"
Wow... this sounds like Amway to me.... multi-level marketing crap.
Take a good look at the clock speeds on the "state of the art" in FPGAs. While a system like this could, in theory, mark a significant step forward by erasing most of the hardware/software boundary it will still take a huge amount of effort to rebuild our existing base of computing infrastructure to take advantage of such a system. A computer like this is far more likely to find use in niche applications like routers and packet switches (e.g. put the logic for the current packet flows into hardware) and for strange little AI projects.
Don't start short-selling Intel and AMD yet...
If you read the comments on the old story, there were quite a few people that were shooting holes in Star Bridge's announcements, saying that their misuse of technical terms showed that they knew nothing about what they were trying to develop. I'm not an engineer myself, but after seeing so many people say that the computer design is full of holes, I'm guessing we can write this one off.
They say it runs "Unix" and NT (yeah, right!).
Their specs say it has a 1600W power supply. Does that come with a wall plug or a set of jumper cables?
Just junk food for thought...
Imagine for a moment that such a thing is possible. 60,000(!) times faster than a PII-350. Ok, so we get this speed by a machine that re-implements itself into a specialized hardware processor for whatever it needs to do next.
Hmmm... that sounds like a hard program to write -- the part that re-optimizes the hardware. How many different virtual hardware processor "personalities" will it need to achieve 60K x PII speeds? Of course, in order to get full advantage from it, it will have to be done frequently. How fast will *that* be?
I can't wait to buy the equivalent of a 21 Tera Hertz PII in 1.5 years. I assume the "hardware compiler" will be ready as well and included in the $1K.
Geeky modern art T-shirts
Does the warranty cover damages caused by one of these machines should it attain self-awareness?
And what about the human rights, personnel, and vacation time issues concerned with the resulting employee, should the box be owned by a corporation?
If the system had been owned by an individual, should they file manumission papers or would the former owner now be considered a parent responsible for their new cyberchild for the first eighteen years?
And would you want one to marry your sister?
I guess I'd studied FPGA's when I first got a digital design course at univ. Back then, it looked interesting but the overhead for "switching" the circuitry seemed awful.
;)
Now, I recall some news when reconfiguration time was reduced in a significant proportion. I also remember that some guys at Amiga were very keen on it. Hopefully, the FPGA is more than plain old parallel stuff. Wanna see if we can get a hacker's regular hourly thought exercise.
I think reconfiguration is particularly useful if your system is bit wiser than a traditional number crunching procedural system. I'm not suggesting that you can get some NN to let h/w to converge to the ideal. (That's a too difficult problem in itself) Sure I won't. But the thing is, if you let your software know how FPGA can be utilized it can make a difference.
Especially, it occurs to any demo-coder that those tiny cute loops that do the tricks would fit nicely in a hardware design. So, I think you could make your DSP(audio,video,compression,etc.) & 3d stuff really faster. However, I suppose there are other ways in which you could actually improve the existing implementations. A key point is making your algorithms adaptive. Then, they are not the usual kind of "perfect tool" instruments but ones that use some heuristics that try to find the best hardware design for the job.
I suspect that the simplistic kind of translation [ say a 3d algorithm to an FGPA spec., then reconfiguration when the algorithm's needed (probably over one of the custom processors alloc'd for this task) and using it as a subroutine ] might be generalized to implementing a programming paradigm as hardware. It seems that OS and compilation systems would better be revised to get it done effectively, but still it is very interesting in its own right. The array of possibilies might be larger than the excitement in implementing cryptography and NN apps, or fast Java VM's. When I imagine that the cruical parts of an expert system, or an inference engine, or just about any complex application out there could be done that way, I'm awed.
Nevertheless, I don't know the theoretical "sphere" of the work precisely. It would be very satisfactory, for instance, to see some work on the computational complexity induced by such devices. Stuff that says "In x domain, FPGA's are useful" preferred, not the kind of stuff that says "Generally, it's NP-complete" or "Oh no, it's undecidable"....
--exa--
It could conceivably use a genetic algorithm/evolvable hardware approach. This would be REALLY cool (would come up with rather unique solutions...) but I SERIOUSLY doubt it is possible. GAs take exponentially longer to "get it right" as the problem gets harder. The most complex problems I've seen that use GAs with FPGAs was like very simple signal processing and the algorithms took like 3 months to find the "final" solution. I can imagine using the same hardware (allowing for much better algorithms and better/faster FPGAs would really make THAT much of a difference) to solve something as simple as tracing a ray (which is actually quite simple, especially compared to the sims that most supercomputers of this magnitude would be used for) would require MANY years of evolution (maybe a hundred plus) before it got faster than generic hardware.
The REALLY bad thing is that if your problem changed even a tiny bit, the optimization program would have to start over (probably not from scratch, but still a HUGE amount of work).
I remember reading about these guys here 6 months ago. I was stunned and amazed, and I thought, "Well, I might be able to buy one of these in ten years time." Guess I was very wrong. I'm getting one as soon as they come out.
BTW...the point of they earlier article was an announcement of the companies new HAL systems. This one is reporting the news that they are building PCs with this technology too. And they run windows NT under emulation mode. Wonder if that means they run Linux. Probably does, since it would have to be intel emulation, rather than windows emulation. So they would probably be quite useful, and easily integrated into current applications. Can't see how switches and routers could possibly have a problem integrating. They seldom resemble closely the systems that they are communicating with anyway.
----
Every year during my review, I just pray the words "slashdot.org" aren't mentioned.
For a start: chip designers everywhere use FPGA:s to prototype their designs. No magic; they are reasonably fast (but not as fast as custom designed chips), and _way_ more expensive. Having a large array of them would indeed make it possible to run DES at a frightening speed -- but so would a mass of standard computers. The sticking point is that the collection of FPGA:s emulating a standard CPU would be way slower for any given budget for CPU:s than a custom chip (like the PII, PIII or AMD K7) -- and way more expensive.
:)
Think about it: both Intel and AMD (and everybody else) uses FPGA:s for prototyping their chips. If it was so much more efficient, why do they not release chips whith this technology already?
As for the reprogramming component part of this design: translating from low-level code to actual chip surface (which it still is very much about) is largely a manual even for very simple circuits, largely because the available chip-compiler technologies simply aren't up to the job.
Besides, have any of you thought about the context-switch penalty of a computer that will have to reprogram its' logic for every process
Trust the Computer. The Computer is your friend.
It's pretty obvious that these guys are a fraud. If they had a real product, they would have every major hardware in the world lined up to buy them out for a billion dollars. Then they would have the resources to building more than the hundred machines a year they claim to be limited to.
Also, if they had a real product they would have some kind of proof. Like cracking RC5 keys. That would be a great proof! Build a supercomputer, design a distributed.net client for it, and then start beaking records with your demo machines.
So the real question is what these weasels are up to. I'm sure that they know that no one is dumb enough to hand over $26 million for a box full of vaccum tubes. They would have found out a long time ago that no one can award a $26 million contract without an ironclad proof of technology. Besides, their web page doesn't even make sense. They say that they have a proprietary operating system, but then on their hardware page it says that it will run either UNIX (I guess any flavor!) or Windows NT.
I suspect that they may be trying to find suckers willing to get certified in their development language, "Viva". They list a training course as being available. To participate, all you have to do is sign this an NDA and send it right in. Of course, all training will happen over the web. So you won't be able to tell what kind of machine that you are taking your training on. Or complain to someone if you figure out the scam. So even if there is no suckers willing to hand over $26mm, they're probably hoping to find a thousand frustrated postal workers willing to spend $5,000 to be the first to be trained in this technology that will enable them to "ride a great tide of change as one paradigm of computing technology gives way to another". And once they are trained, they get to work for Star Bridge Systems! And they get paid in "valuable computing cycles". I'm not making this up folks!
It's not clear to me how this could possibly match the 60k increase in performance this article claims. Certainly, you can't execute a single stream of instructions at anywhere close to that speed, no matter how fast you can modify the gates. If this is supposed to be a massively parallel system, then you're only going to see this kind of speed up on tasks that can be extensively parallelized. So without even seeing the details, I don't buy it. Yeah, you might approach this level for something like prime number factoring, but I'll bet money they aren't going to achieve anywhere near this speed on everyday computing tasks
Am I missing something?