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First mixed-HDL Simulator for Linux
Gino writes "Model Technology Inc. will be making their two most powerful tools ModelSim(TM) EE and SE available for the Linux platform in VHDL, Verilog and mixed HDL configurations. Demand for Linux support has been tremendous, apparently due to customer migration to simulator farm environments - multiple node machines configured with Linux as simulation farms proofed to be quite effective. It is good news to see the big HDL boys paying attention to Linux at last. "
If you are spending 20K on software.. I think you can do better than comsumer space prossesors (Intel, AMD, PPC G4, etc).. this is a definate case for the big boys like Alpha, PA-RISC, or IBM's high end versions of PPC, etc... This is just simply where those processors are far better, and more economical, than anything else out there.
And I do not want to hear anything about a Beowolf cluster, you simply cannot scale multiple boxes as well as you can a single box with a dedicated backplane like the big boys use...
Well, I've never used Cadence, but I've been using Renoir with ModelSim (on Solaris using VHDL) for a few months now, and it seems to work pretty well. Granted, I haven't been doing any extremely large projects, but it does seem fairly easy to use renoir, and the simulator is pretty good. Only thing, is, from this press release I'm not sure if they've ported Renoir as well, or just the compiler/simulator. If so, that would kind of suck...
And I think the reason it's so expensive is because they can get it. People designing hardware have the money to get it, and they kind of need it... and I think the alternatives are just as pricey. Not that I don't wish it was cheaper...
He said, "You'll be able to tell your grandchildren that you helped assemble the first NT supercomputer," and I cringed.
*smashes head on keyboard*
ARGH! Did you even read my previous post?
(1) It is unprofessional and unethical to edit sunmissions of any sort without clear notification that it may be edited. There is no such notification here, so I would be far more concerned if editing *were* taking place.
(2) I don't recall Hemos being an editor, anyway. He is allowed to post stories *without* being an editor, you know.
(3) The submissions posted in the stories are *not* submissions in the sense of articles in a journal. They are quotes taken from emails. Go try an test submission. The preview says something like:
James Lanfear wrote in to say "blah blah blah."
That is *not* a submitted article (which should probably be edited), but a quote from the text of my messege, which happens to contain a submission of some sort. Do you understand the difference?
I read it. I just know you are wrong. :)
No, it isn't. That was a direct quote (note the italics); changing quotes is a no-no. The most he should have done is drop a '(sic)' after "proofed".
How, exactly, am I wrong? Repeating that you would like Hemos and Taco to do something is not an argument in its favor. If you could actually provide any reason for me to believe that those aren't direct quotes, or that Hemos is an editor, or that editing without notification is OK, I might be more inclined to agree.
Otherwise, you are, IMNSHO, little more than an above-average troll.
Repeating that you would like Hemos and Taco to do something is not an argument in its favor.
:)
This is more than what I want them to do. This is what the editors of other publications do.
Hemos is an editor
Then what else is he?
editing without notification is OK
I for one assume that the posts should be edited, notification is not required.
Or have I gone too far by suggesting that Slashdot is a member of the reputable media?
This is more than what I want them to do. This is what the editors of other publications do.
I never said it wasn't. Yet. It isn't.
Then what else is he?
A maintainer. Poster. Webmaster. Whatever. But he's more of an editor than I am.
I for one assume that the posts should be edited, notification is not required.
Except that notification *is* what professional and reputable journals/newpapers/etc do. It's part of what makes them professionals. Go look in your local newspapers blurb of letter submission. It should say that they will (not) be edited to length, content, etc.
The reason that is their is simple, to most of us with developed cerebrums: you said "I for one assume...". You aren't supposed to *assume* anything; the editors are supposed to make very clear what will be done with your work (if for no other reason than because you own it). I could assume that my paper will automatically be published, but it won't be. Editors tell you that, very plainly. I could assume that submitting it on a stone tablet is OK; that's why most journals specify media. I could assume that mailing stories to Taco is fine; tht's why he tells you to use the Submit Story link. Getting a clue yet?
There, I've fed you enough text to feed a family of trolls. Move on.
'More of an editor' should be 'no more of an editor'. Apparently, I'm correct (either way).
1) Modelsim is probably the premier HDL simulator in the ASIC industry. Despite some minor gripes with it (it has some stability problems as you grow to extremely large simulations as well as a few other issues here and there), it is one of the better EDA tools I've ever worked with.
2) We have been running Modelsim on both Solaris and NT for several years now. On a giant simulations (full ASIC) a solaris box is really our only option. But most of our simulations are small sub-designs where a 350 MHz PII runs circles around our 350 MHz Ultra 2s. Why don't I use modelsim on NT then? It's difficult to do batch simulations (no Perl, no csh), I can't log onto 10 different machines simultaneously and launch a full test suite all over the place, no gnuplot for quick analysis etc. Even though I understand that you can work around all of these issues with 3rd party NT products, why bother? Unix is still the engineer's OS.
This announcement is going to make the best of both worlds possible for us. We've probably got hundreds of fast PIIs around the office that are hardly used for anything more than wordprocessing most of the time. We've also got about 20 Solaris workstations that we fight over tooth and nail. Can anyone say Linux?
Modelsim is almost a bargain in the EDA world. I'm pretty sure a full Synopsys suite for a single seat (yes, one user) will put you over $100k and I've heard that the place and route tools are even worse. Also, most of the licenses use date expiration in some form or another so they keep dipping into your wallet.
But you do need to keep in mind that these are extremely spcialized tools - it's not like they are making their profits from large volume sales.
Modelsim is almost a bargain in the EDA world. I'm pretty sure a full Synopsys suite for a single seat (yes, one user) will put you over $100k and I've heard that the place and route tools are even worse. Also, most of the licenses use date expiration in some form or another so they keep dipping into your wallet.
But you do need to keep in mind that these are extremely spcialized tools - it's not like they are making their profits from large volume sales.
Finally a VHDL platform for linux. This news means inexpensive software to do large scale VLSI chip design and embedded system layouts. I'm curious to find out exactly how much will the package go for if it isn't free for Linux.
For most engineers it is common knowledge how expensive just software and the testbed environment is to developers. i am tired of thumbing through code of ocean or electric that only works on certain environments on a smaller scale. This isn't your grand daddy's pspice.
The two big HDL's (Hardware Description Language) are Verilog and VHDL. VHDL is derived from ADA, while Verilog is derived from K&R C (which means most of the readers here would probably prefer it:-)). BTW, there have been Verilog vs VHDL flame wars that were quite similar to the KDE/Gnome or C/C++ debates.
While companies use HDL's to design application specific integrated circuits (ASIC's) most of us can use an HDL to program a reconfigurable logic chip called an FPGA (Field Programmable Gate Array). An FPGA is a chip that looks like whatever you want it to. You program which gates are connected and how and then the FPGA loads this configuration information straight from an EEPROM. If you mess up, you can reprogram the EEPROM and reboot the FPGA.
:-( ) software for programming only their FPGA line. Most of these software offerings are crippled versions of a full software package like ModelSim. Hopefully soon, we will see a limited version of ModelSim too.
Most of the FPGA vendors offer free (for windows users
-- no sig
Full-blown HDL packages cost a lot for a few reasons: 1. They're difficult to write and support, and they have to be extremely reliable (You don't want the simulator to crash after you've had it working on one design for 5 hours.) 2. The market is small. You won't see this on the shelf of CompUSA anytime soon. 3. The customers really need the product, and they have plenty of money to spend. However, you can get cheap VHDL/Verilog "synthesis" compilers if you're just interested in learning the languages. These are available from some chip manufacturers like Cypress for something like $99 (sometimes free), since they want to encourage use of their parts.
Speaking as someone who has thrashed a variety of simulators *hard* from the PLI side, including Cadence XL and ModelSim as well as many others, I can say that ModelSim is one of the better simulators out there in terms of robustness. It's got the best UI I've seen on a simulator too. Oh, and trust me, Verilog-XL does crash, you just have to know where to poke it. I believe it's being phased out in favour of their NC simulator now anyway. ISTR that Synopsys have VCS (a high speed Verilog simulator) available for Linux now too. With both Synopsys and Mentor putting their simulation products on Linux, I can't see Cadence being too far behind.
Speaking as someone who has thrashed a variety of simulators *hard* from the PLI side, including Cadence XL and ModelSim as well as many others, I can say that ModelSim is one of the better simulators out there in terms of robustness. It's got the best UI I've seen on a simulator too.
Oh, and trust me, Verilog-XL does crash, you just have to know where to poke it. I believe it's being phased out in favour of their NC simulator now anyway.
ISTR that Synopsys have VCS (a high speed Verilog simulator) available for Linux now too. With both Synopsys and Mentor putting their simulation products on Linux, I can't see Cadence being too far behind.
Okay, this is actually interesting - check out this guy's user info, and you'll see that he's posted bunches of stuff, all at the exact same time - he later replied to himself, with the title "second first post", again all at once. I think he's working on a script to produce "first post"s. I'm glad that _someone_ finally got around to doing this. Oh yeah - third first post!
what is it?
"It's such a fine line between stupid and clever" -- David St. Hubbins, Spinal Tap
Hemos, that should be "proved" not "proofed."
My tongue is firmly in my cheek right now.
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Ok, what does HDL stand for?
For some strange reason, that is a function of the URL. If you remove a small part of the URL ("fq=Linux&", working from memory, could be wrong), it makes Linux red at ever occurance (and not a bitmap). To try it, check out this URL: http://www.newsalert.com/bin/story?StoryId=Cob0Eub KbytaWmte&Nav=na-search-&StoryT itle=Linux
Finally, something a beowulf cluster might be useful for...
Starman97@Gmail.com (bring it on spammers)
HDL stands for Hardware Description Language. They are used by engineers to simulate a computer chips (and other ICs) before they are created. Used mainly for testing to see if what they designed truly does what they want it to do. Very neat. You can simulate an entirely different computer architecture using an HDL.
"Evil will always triumph over good, because good is dumb." - Dark Helmet (Spaceballs)
FIRST POSTxyz11!!!
Hopefully they'll have a demo version out...these things are not for the average hardware tinkerer....some of these licenses can exceed well over ten grand for some of the better HDL packages out there. And the few demo ones I've seen don't include VHDL (ugh) or verilog entry and only run on windows.
second first post!?!?!
Did it strike anyone else as odd that throughout the entire article, every instance of the word 'Linux' was enlarged and, in fact, a colored bitmap?
Can you boys and girls say 'hype'? I knew that you could!
Seriously though, isn't about time that people stop worrying so darn much about the operating system that the application is running on.. and worry about the actual application?
As for the actual article, kudos to Model Technology Inc. I know that this will make quite a few people happy.
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rJames.org - illustration
This is one more indication that Linux has become a mainstream OS and another shot in the arm for the increased utilization of Linux outside of the mailserver realm.
NT is based on the premise that anyone who can manipulate a mouse can administer a system. Huh?!?
This is one area that the open source model isn't going to play quite so easily - basicly because there's 0 tolerance for bugs when you're taping out a $500k chip - people are very conservative about what they use - look how long it took for VCS to catch on (and it was probably 20 times faster than the interpreted standard of its day).
But remember that these numbers are also 'list' price - there's a LOT of discounting goes on - hit the sales guy up at the end of the quarter when he's up against his quota, or bundle it with some other purchase and you can get a much better price. Oh yeah and make SURE they see that you're trying out the competitor's product :-)
This is great news for me. I work at intel, and it seems like all the HP and Solaris machines are overused. I keep griping to IT to get more/faster machines, but that'll never happen any time soon. =) In my group we have our own personal Quad Xeon linux server that we use for the majority of our development, but everything involving VHDL requires us to jump back to those lagged HP or Solaris machines.
I've got the source code, but I'll have to reinstall gcc 2.7.2 to compile it (I love you Debian). The static binary core dumped immediately.
Has anyone used VBS? How does it compare to the commercial packages -- where on the scale from Wellspring VeriWell (sucks) to Cadence Verilog (powerful, expensive, runs on SPARCs) is it?
I currently use the free (limited circuit size) version of VeriWell on my Linux box and my SPARC (we can use Cadence on the ECE computers here, but I have yet to design anything that complex). I'd just as soon use something free (or better, Free) that doesn't suck.
I think the word Linux was highlighted in the press release by the newswire service, not the writers of the release. My theory is that this release was discovered by searching for Linux, and the wire service automatically highlights the matching terms when it displays the results of a search.
Part of the reason Linux just hasn't hosted much in the way of high end EDA software is that if you're going to spend $35,000 for the license for a piece of software, and plant a $90K a year engineer in front of it, it makes sense to spend some money on the system it will be running on as well.
No, you don't expect the engineer running the thing to follow Usenet articles to keep up with kernel patches, either.
Yes, I'm very glad to finally see Linux applied to the field of medicine. Even if it is for something so common as cholesterol monitoring.
You know, you just can't overlook the benefits of having your High Density Lipid levels measured on a robust, scalable, secure and (most importantly for the HMO's) FREE Operating System...
Wha?? Oh, nevemind.
-- What you do today will cost you a day of your life.
For any HDL hobbyists out there, or anyone who would be intersted in a bare-bones verilog simulator check out the VBS (Verilog Behavioral Simulator) project. You can download the Linux binaries and/or and source code. There's a pre-processor avialable too. This program works pretty well, I had it running on a Linux box of mine for a bit last year. I even wrote a CGI front end for it so I could run some simulations remotly over the web. That was cool. :)
Hi there. This isn't a troll. I'm just having a hard time understanding something. Surely for applications like this - and a lot of other staunch applications, an operating system written mostly in FORTRAN would be stauncher than an operating system written mostly in C. (which most are at the moment). From what I understand Fortran is better for staunch mathematical and scientific applications. Maybe I'm out by a mile, and if so I do apologize profusely:)
There has been demand for Linux in the EDA/HDL world from the engineering side of the house for years (EETimes has covered it for three years now, and it has to be big enough for them stumble over it). This was a response in most design houses to management wanting to dump UNIX workstations for NT, and most of the software companies were doing that as NT became more reliable for intensive tasks (still not there yet).
Software like this will allow EE programs in schools to have a choice. Many of them were phasing out UNIX for NT because of the software available to VHDL and other courses.
Also, many of the most intense users of computers are the designers that do VHDL and simulation. These people buy a lot of hardware and spend a lot on software, so they tend to carry a bit of influence in where the overall computer market is going.
at $20k/license this is one thing you go out and buy that cyro-athlon to run on ....
There are two popular languages for hardware design: Verilog and VHDL. Just like in the software world, there are times when you have to make stuff written in different languages play together. ModelSim allows you to compile code in both languages to a common object format that the simulator executes. Of course, some people will just use it as a pure Verilog or pure VHDL simulator.
Of course, there are a few other HDL simulators that run on Linux. VCS (from Synopsys) announced in June that they would be porting to Linux. This is one of the "big boys" used in large ASIC and system-on-chip designs. The other is Cadence Verilog-XL (or NC) which has made no Linux announcements yet.
A great, yet not very popular, Verilog simulator is Fintronic. This is a serious simulator, and it supports every UNIX you can think of. I also love their licensing model, because it is very fine-grained and based on the complexity of the simulation rather than something arbitrary. (I happen to know that Transmeta has been using a Linux server farm running Fintronic for quite some time.)
More info: www.linuxeda.com
Every HDL I've tried other than cadance verilog has pretty much sucked. Granted Cadance's user interface isn't as nice as say, verilogger, but it never crashes. So how is this going to be in terms of stabiliy? Even the HDL that shipps in my professors book "The Verilog Hardware Description Language" sucks.
And I havn't looked yet but did I see 20k? Ugh, why is this stuff so darn expensive?
Sorry, but this isn't the first HDL sim for Linux. A company called SynaptiCAD has a non-GUI port of their product available for Linux.